X-Git-Url: http://git.megacz.com/?a=blobdiff_plain;f=compiler%2FnativeGen%2FRegAlloc%2FLinear%2FPPC%2FFreeRegs.hs;h=aa6822c091885880b028dce63b4f3c49dd08aa2b;hb=d436c70d43fb905c63220040168295e473f4b90a;hp=1e31625c37a9587e72d3152e722ab28ab52f33e7;hpb=cbc96da034482b769889c109f6cc822f42b12027;p=ghc-hetmet.git diff --git a/compiler/nativeGen/RegAlloc/Linear/PPC/FreeRegs.hs b/compiler/nativeGen/RegAlloc/Linear/PPC/FreeRegs.hs index 1e31625..aa6822c 100644 --- a/compiler/nativeGen/RegAlloc/Linear/PPC/FreeRegs.hs +++ b/compiler/nativeGen/RegAlloc/Linear/PPC/FreeRegs.hs @@ -3,13 +3,15 @@ module RegAlloc.Linear.PPC.FreeRegs where -import MachRegs +import PPC.Regs +import RegClass +import Reg import Outputable import Data.Word import Data.Bits -import Data.List +-- import Data.List -- The PowerPC has 32 integer and 32 floating point registers. -- This is 32bit PowerPC, so Word64 is inefficient - two Word32s are much @@ -28,27 +30,31 @@ data FreeRegs = FreeRegs !Word32 !Word32 noFreeRegs :: FreeRegs noFreeRegs = FreeRegs 0 0 -releaseReg :: RegNo -> FreeRegs -> FreeRegs -releaseReg r (FreeRegs g f) +releaseReg :: RealReg -> FreeRegs -> FreeRegs +releaseReg (RealRegSingle r) (FreeRegs g f) | r > 31 = FreeRegs g (f .|. (1 `shiftL` (fromIntegral r - 32))) | otherwise = FreeRegs (g .|. (1 `shiftL` fromIntegral r)) f + +releaseReg _ _ + = panic "RegAlloc.Linear.PPC.releaseReg: bad reg" initFreeRegs :: FreeRegs initFreeRegs = foldr releaseReg noFreeRegs allocatableRegs -getFreeRegs :: RegClass -> FreeRegs -> [RegNo] -- lazilly +getFreeRegs :: RegClass -> FreeRegs -> [RealReg] -- lazilly getFreeRegs cls (FreeRegs g f) | RcDouble <- cls = go f (0x80000000) 63 | RcInteger <- cls = go g (0x80000000) 31 | otherwise = pprPanic "RegAllocLinear.getFreeRegs: Bad register class" (ppr cls) where go _ 0 _ = [] - go x m i | x .&. m /= 0 = i : (go x (m `shiftR` 1) $! i-1) + go x m i | x .&. m /= 0 = RealRegSingle i : (go x (m `shiftR` 1) $! i-1) | otherwise = go x (m `shiftR` 1) $! i-1 -allocateReg :: RegNo -> FreeRegs -> FreeRegs -allocateReg r (FreeRegs g f) +allocateReg :: RealReg -> FreeRegs -> FreeRegs +allocateReg (RealRegSingle r) (FreeRegs g f) | r > 31 = FreeRegs g (f .&. complement (1 `shiftL` (fromIntegral r - 32))) | otherwise = FreeRegs (g .&. complement (1 `shiftL` fromIntegral r)) f - +allocateReg _ _ + = panic "RegAlloc.Linear.PPC.allocateReg: bad reg"