X-Git-Url: http://git.megacz.com/?a=blobdiff_plain;f=compiler%2FnativeGen%2FRegAllocInfo.hs;h=2361e7762c1818f0f08037aa9a24c788bf5fc6b8;hb=f1d525d1f140bb695cd3a746ba7dd16402868dde;hp=9b60fb9d60956a5045f76b0421e803864cff53e4;hpb=0168c633a9d209e978528f059193d19cdb5e6740;p=ghc-hetmet.git

diff --git a/compiler/nativeGen/RegAllocInfo.hs b/compiler/nativeGen/RegAllocInfo.hs
index 9b60fb9..2361e77 100644
--- a/compiler/nativeGen/RegAllocInfo.hs
+++ b/compiler/nativeGen/RegAllocInfo.hs
@@ -1,3 +1,10 @@
+{-# OPTIONS -w #-}
+-- The above warning supression flag is a temporary kludge.
+-- While working on this module you are encouraged to remove it and fix
+-- any warnings in the module. See
+--     http://hackage.haskell.org/trac/ghc/wiki/Commentary/CodingStyle#Warnings
+-- for details
+
 -----------------------------------------------------------------------------
 --
 -- Machine-specific parts of the register allocator
@@ -35,7 +42,7 @@ import MachInstrs
 import MachRegs
 import Outputable
 import Constants	( rESERVED_C_STACK_BYTES )
-import FastTypes
+import FastBool
 
 -- -----------------------------------------------------------------------------
 -- RegUsage type
@@ -767,7 +774,7 @@ isRegRegMove (MOV _ (OpReg r1) (OpReg r2)) = Just (r1,r2)
 #elif powerpc_TARGET_ARCH
 isRegRegMove (MR dst src) = Just (src,dst)
 #else
-#warning ToDo: isRegRegMove
+#error ToDo: isRegRegMove
 #endif
 isRegRegMove _ = Nothing
 
@@ -775,14 +782,12 @@ isRegRegMove _ = Nothing
 -- Generating spill instructions
 
 mkSpillInstr
-   :: Reg		-- register to spill (should be a real)
+   :: Reg		-- register to spill
    -> Int		-- current stack delta
    -> Int		-- spill slot to use
    -> Instr
 mkSpillInstr reg delta slot
- -- = ASSERT(isRealReg reg)			-- BUGS: used for graph coloring: is this ok?
-  = let	
-        off     = spillSlotToOffset slot
+  = let	off     = spillSlotToOffset slot
     in
 #ifdef alpha_TARGET_ARCH
     {-Alpha: spill below the stack pointer (?)-}
@@ -809,7 +814,7 @@ mkSpillInstr reg delta slot
                                     RcInteger -> I32;
 				    RcFloat   -> F32;
                                     RcDouble  -> F64}}
-                        in ST sz reg (fpRel (- off_w))
+                        in ST sz reg (fpRel (negate off_w))
 #endif
 #ifdef powerpc_TARGET_ARCH
     let sz = case regClass reg of
@@ -820,14 +825,12 @@ mkSpillInstr reg delta slot
 
 
 mkLoadInstr
-   :: Reg		-- register to load (should be a real)
+   :: Reg		-- register to load
    -> Int		-- current stack delta
    -> Int		-- spill slot to use
    -> Instr
 mkLoadInstr reg delta slot
- -- = ASSERT(isRealReg reg)			-- BUGS: used for graph coloring: is this ok?
-  = let
-        off     = spillSlotToOffset slot
+  = let off     = spillSlotToOffset slot
     in
 #if alpha_TARGET_ARCH
 	 LD  sz dyn (spRel (- (off `div` 8)))
@@ -874,6 +877,8 @@ mkRegRegMoveInstr src dst
 #endif
 #elif powerpc_TARGET_ARCH
     = MR dst src
+#else
+#error ToDo: mkRegRegMoveInstr
 #endif
 
 mkBranchInstr