X-Git-Url: http://git.megacz.com/?a=blobdiff_plain;f=compiler%2FnativeGen%2FRegAllocStats.hs;h=9f8415f5186eb799fea553ce2480f705020f477e;hb=fa1c8a7e7013b1e9a37326b80abadec737c9347e;hp=81578a33312701053b2bda0391562fd8d0f42f36;hpb=220a12e946b80166d3fe20419091135cef01f668;p=ghc-hetmet.git

diff --git a/compiler/nativeGen/RegAllocStats.hs b/compiler/nativeGen/RegAllocStats.hs
index 81578a3..9f8415f 100644
--- a/compiler/nativeGen/RegAllocStats.hs
+++ b/compiler/nativeGen/RegAllocStats.hs
@@ -1,7 +1,7 @@
+{-# OPTIONS -fno-warn-missing-signatures #-}
 -- Carries interesting info for debugging / profiling of the 
 --	graph coloring register allocator.
 --
-{-# OPTIONS -fno-warn-missing-signatures #-}
 
 module RegAllocStats (
 	RegAllocStats (..),
@@ -30,7 +30,7 @@ import MachInstrs
 import Cmm
 
 import Outputable
-import UniqFM
+import LazyUniqFM
 import UniqSet
 import State
 
@@ -54,7 +54,8 @@ data RegAllocStats
 
 	-- a successful coloring
 	| RegAllocStatsColored
-	{ raGraph	:: Color.Graph Reg RegClass Reg -- ^ the colored graph
+	{ raGraph	 :: Color.Graph Reg RegClass Reg -- ^ the uncolored graph
+	, raGraphColored :: Color.Graph Reg RegClass Reg -- ^ the coalesced and colored graph
 	, raCoalesced	:: UniqFM Reg			-- ^ the regs that were coaleced
 	, raPatched	:: [LiveCmmTop] 		-- ^ code with vregs replaced by hregs
 	, raSpillClean  :: [LiveCmmTop]			-- ^ code with unneeded spill/reloads cleaned out
@@ -100,10 +101,14 @@ instance Outputable RegAllocStats where
  ppr (s@RegAllocStatsColored { raSRMs = (spills, reloads, moves) })
  	=  text "#  Colored"
 
-	$$ text "#  Register conflict graph."
+	$$ text "#  Register conflict graph (initial)."
 	$$ Color.dotGraph regDotColor trivColorable (raGraph s)
 	$$ text ""
 
+	$$ text "#  Register conflict graph (colored)."
+	$$ Color.dotGraph regDotColor trivColorable (raGraphColored s)
+	$$ text ""
+
 	$$ (if (not $ isNullUFM $ raCoalesced s)
 		then 	text "#  Registers coalesced."
 			$$ (vcat $ map ppr $ ufmToList $ raCoalesced s)
@@ -322,6 +327,7 @@ regDotColor reg
  = case regClass reg of
  	RcInteger	-> text "blue"
 	RcFloat		-> text "red"
+	RcDouble	-> text "green"
 #endif