X-Git-Url: http://git.megacz.com/?a=blobdiff_plain;f=compiler%2FnativeGen%2FX86%2FRegs.hs;h=be83ad68f46d070ab99d38b4b4699c0392f65216;hb=1353826e5159c9a5a81e75e0b7459271f27c08ea;hp=3432090ff73975d591c60269b90660560ff18450;hpb=9de520b7194c9d759147db98deb3cd8d47d0de76;p=ghc-hetmet.git diff --git a/compiler/nativeGen/X86/Regs.hs b/compiler/nativeGen/X86/Regs.hs index 3432090..be83ad6 100644 --- a/compiler/nativeGen/X86/Regs.hs +++ b/compiler/nativeGen/X86/Regs.hs @@ -31,23 +31,17 @@ module X86.Regs ( -- machine specific EABase(..), EAIndex(..), addrModeRegs, -#if i386_TARGET_ARCH - -- part of address mode. shared for both arches. eax, ebx, ecx, edx, esi, edi, ebp, esp, fake0, fake1, fake2, fake3, fake4, fake5, -#endif -#if x86_64_TARGET_ARCH - -- part of address mode. shared for both arches. - ripRel, - allFPArgRegs, - + rax, rbx, rcx, rdx, rsi, rdi, rbp, rsp, - eax, ebx, ecx, edx, esi, edi, ebp, esp, - r8, r9, r10, r11, r12, r13, r14, r15, + r8, r9, r10, r11, r12, r13, r14, r15, xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15, xmm, -#endif + + ripRel, + allFPArgRegs, -- horror show freeReg, @@ -76,6 +70,7 @@ import Outputable ( Outputable(..), pprPanic, panic ) import qualified Outputable import Unique import FastBool +import Constants -- ----------------------------------------------------------------------------- -- Sizes on this architecture @@ -253,38 +248,6 @@ argRegs _ = panic "MachRegs.argRegs(x86): should not be used!" --- -allArgRegs :: [Reg] - -#if i386_TARGET_ARCH -allArgRegs = panic "X86.Regs.allArgRegs: should not be used!" - -#elif x86_64_TARGET_ARCH -allArgRegs = map RealReg [rdi,rsi,rdx,rcx,r8,r9] - -#else -allArgRegs = panic "X86.Regs.allArgRegs: not defined for this architecture" -#endif - - --- | these are the regs which we cannot assume stay alive over a C call. -callClobberedRegs :: [Reg] - -#if i386_TARGET_ARCH --- caller-saves registers -callClobberedRegs - = map RealReg [eax,ecx,edx,fake0,fake1,fake2,fake3,fake4,fake5] - -#elif x86_64_TARGET_ARCH --- all xmm regs are caller-saves --- caller-saves registers -callClobberedRegs - = map RealReg ([rax,rcx,rdx,rsi,rdi,r8,r9,r10,r11] ++ [16..31]) - -#else -callClobberedRegs - = panic "X86.Regs.callClobberedRegs: not defined for this architecture" -#endif -- | The complete set of machine registers. @@ -312,11 +275,10 @@ regClass :: Reg -> RegClass -- However, we can get away without this at the moment because the -- only allocatable integer regs are also 8-bit compatible (1, 3, 4). regClass (RealReg i) = if i < 8 then RcInteger else RcDouble -regClass (VirtualRegI u) = RcInteger -regClass (VirtualRegHi u) = RcInteger -regClass (VirtualRegD u) = RcDouble -regClass (VirtualRegF u) = pprPanic "regClass(x86):VirtualRegF" - (ppr (VirtualRegF u)) +regClass (VirtualRegI _) = RcInteger +regClass (VirtualRegHi _) = RcInteger +regClass (VirtualRegD _) = RcDouble +regClass (VirtualRegF u) = pprPanic ("regClass(x86):VirtualRegF") (ppr u) #elif x86_64_TARGET_ARCH -- On x86, we might want to have an 8-bit RegClass, which would @@ -324,11 +286,10 @@ regClass (VirtualRegF u) = pprPanic "regClass(x86):VirtualRegF" -- However, we can get away without this at the moment because the -- only allocatable integer regs are also 8-bit compatible (1, 3, 4). regClass (RealReg i) = if i < 16 then RcInteger else RcDouble -regClass (VirtualRegI u) = RcInteger -regClass (VirtualRegHi u) = RcInteger -regClass (VirtualRegD u) = RcDouble -regClass (VirtualRegF u) = pprPanic "regClass(x86_64):VirtualRegF" - (ppr (VirtualRegF u)) +regClass (VirtualRegI _) = RcInteger +regClass (VirtualRegHi _) = RcInteger +regClass (VirtualRegD _) = RcDouble +regClass (VirtualRegF u) = pprPanic "regClass(x86_64):VirtualRegF" (ppr u) #else regClass _ = panic "X86.Regs.regClass: not defined for this architecture" @@ -345,6 +306,7 @@ showReg n then regNames !! n else "%unknown_x86_real_reg_" ++ show n +regNames :: [String] regNames = ["%eax", "%ebx", "%ecx", "%edx", "%esi", "%edi", "%ebp", "%esp", "%fake0", "%fake1", "%fake2", "%fake3", "%fake4", "%fake5", "%fake6"] @@ -355,6 +317,7 @@ showReg n | n >= 8 = "%r" ++ show n | otherwise = regNames !! n +regNames :: [String] regNames = ["%rax", "%rbx", "%rcx", "%rdx", "%rsi", "%rdi", "%rbp", "%rsp" ] @@ -384,9 +347,9 @@ regs. @regClass@ barfs if you give it a VirtualRegF, and mkVReg above should never generate them. -} -#if i386_TARGET_ARCH fake0, fake1, fake2, fake3, fake4, fake5, eax, ebx, ecx, edx, esp, ebp, esi, edi :: Reg + eax = RealReg 0 ebx = RealReg 1 ecx = RealReg 2 @@ -402,7 +365,6 @@ fake3 = RealReg 11 fake4 = RealReg 12 fake5 = RealReg 13 -#endif {- @@ -413,13 +375,6 @@ AMD x86_64 architecture: -} -#if x86_64_TARGET_ARCH -allFPArgRegs :: [Reg] -allFPArgRegs = map RealReg [xmm0 .. xmm7] - -ripRel imm = AddrBaseIndex EABaseRip EAIndexNone imm - - rax, rbx, rcx, rdx, rsp, rbp, rsi, rdi, r8, r9, r10, r11, r12, r13, r14, r15, xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, @@ -458,7 +413,15 @@ xmm13 = RealReg 29 xmm14 = RealReg 30 xmm15 = RealReg 31 +allFPArgRegs :: [Reg] +allFPArgRegs = map RealReg [16 .. 23] + +ripRel :: Displacement -> AddrMode +ripRel imm = AddrBaseIndex EABaseRip EAIndexNone imm + + -- so we can re-use some x86 code: +{- eax = rax ebx = rbx ecx = rcx @@ -467,10 +430,11 @@ esi = rsi edi = rdi ebp = rbp esp = rsp +-} +xmm :: RegNo -> Reg xmm n = RealReg (16+n) -#endif @@ -602,7 +566,7 @@ freeReg REG_Hp = fastBool False #ifdef REG_HpLim freeReg REG_HpLim = fastBool False #endif -freeReg n = fastBool True +freeReg _ = fastBool True -- | Returns 'Nothing' if this global register is not stored @@ -686,9 +650,50 @@ globalRegMaybe CurrentNursery = Just (RealReg REG_CurrentNursery) #endif globalRegMaybe _ = Nothing +-- +allArgRegs :: [Reg] + +#if i386_TARGET_ARCH +allArgRegs = panic "X86.Regs.allArgRegs: should not be used!" + +#elif x86_64_TARGET_ARCH +allArgRegs = map RealReg [rdi,rsi,rdx,rcx,r8,r9] + +#else +allArgRegs = panic "X86.Regs.allArgRegs: not defined for this architecture" +#endif + + +-- | these are the regs which we cannot assume stay alive over a C call. +callClobberedRegs :: [Reg] + +#if i386_TARGET_ARCH +-- caller-saves registers +callClobberedRegs + = map RealReg [eax,ecx,edx,fake0,fake1,fake2,fake3,fake4,fake5] + +#elif x86_64_TARGET_ARCH +-- all xmm regs are caller-saves +-- caller-saves registers +callClobberedRegs + = map RealReg ([rax,rcx,rdx,rsi,rdi,r8,r9,r10,r11] ++ [16..31]) + +#else +callClobberedRegs + = panic "X86.Regs.callClobberedRegs: not defined for this architecture" +#endif + #else /* i386_TARGET_ARCH || x86_64_TARGET_ARCH */ + + freeReg _ = 0# globalRegMaybe _ = panic "X86.Regs.globalRegMaybe: not defined" +allArgRegs = panic "X86.Regs.globalRegMaybe: not defined" +callClobberedRegs = panic "X86.Regs.globalRegMaybe: not defined" + + #endif + +