X-Git-Url: http://git.megacz.com/?a=blobdiff_plain;f=ghc%2Fincludes%2FMachRegs.h;h=317e72a0cc10551679da074c441ef4a33d635ae9;hb=d708060681ffe69afa4574cacb3bde6b430d062f;hp=8297023dfd67c02c7f9e6d83257e3e26e5936bee;hpb=423d477bfecd490de1449c59325c8776f91d7aac;p=ghc-hetmet.git diff --git a/ghc/includes/MachRegs.h b/ghc/includes/MachRegs.h index 8297023..317e72a 100644 --- a/ghc/includes/MachRegs.h +++ b/ghc/includes/MachRegs.h @@ -1,5 +1,5 @@ /* ----------------------------------------------------------------------------- - * $Id: MachRegs.h,v 1.16 2004/08/13 13:09:18 simonmar Exp $ + * $Id: MachRegs.h,v 1.21 2005/01/28 12:55:51 simonmar Exp $ * * (c) The GHC Team, 1998-1999 * @@ -15,12 +15,48 @@ * only in here please. */ -/* define NO_REGS to omit register declarations - used in RTS C code - * that needs all the STG definitions but not the global register - * settings. +/* + * Defining NO_REGS causes no global registers to be used. NO_REGS is + * typically defined by GHC, via a command-line option passed to gcc, + * when the -funregisterised flag is given. + * + * NB. When NO_REGS is on, calling & return conventions may be + * different. For example, all function arguments will be passed on + * the stack, and components of an unboxed tuple will be returned on + * the stack rather than in registers. */ #ifndef NO_REGS +/* NOTE: when testing the platform in this file we must test either + * *_HOST_ARCH and *_TARGET_ARCH, depending on whether COMPILING_GHC + * is set. This is because when we're compiling the RTS and HC code, + * the platform we're running on is the HOST, but when compiling GHC + * we want to know about the register mapping on the TARGET platform. + */ +#ifdef COMPILING_GHC +#define alpha_REGS alpha_TARGET_ARCH +#define hppa1_1_REGS hppa1_1_TARGET_ARCH +#define i386_REGS i386_TARGET_ARCH +#define x86_64_REGS x86_64_TARGET_ARCH +#define m68k_REGS m68k_TARGET_ARCH +#define mips_REGS (mipsel_TARGET_ARCH || mipseb_TARGET_ARCH) +#define powerpc_REGS (powerpc_TARGET_ARCH || powerpc64_TARGET_ARCH || rs6000_TARGET_ARCH) +#define ia64_REGS ia64_TARGET_ARCH +#define sparc_REGS sparc_TARGET_ARCH +#define darwin_REGS darwin_TARGET_OS +#else +#define alpha_REGS alpha_HOST_ARCH +#define hppa1_1_REGS hppa1_1_HOST_ARCH +#define i386_REGS i386_HOST_ARCH +#define x86_64_REGS x86_64_HOST_ARCH +#define m68k_REGS m68k_HOST_ARCH +#define mips_REGS (mipsel_HOST_ARCH || mipseb_HOST_ARCH) +#define powerpc_REGS (powerpc_HOST_ARCH || powerpc64_HOST_ARCH || rs6000_HOST_ARCH) +#define ia64_REGS ia64_HOST_ARCH +#define sparc_REGS sparc_HOST_ARCH +#define darwin_REGS darwin_HOST_OS +#endif + /* ---------------------------------------------------------------------------- Caller saves and callee-saves regs. @@ -76,7 +112,7 @@ t12 $27 NCG_reserved -------------------------------------------------------------------------- */ -#if defined(alpha_TARGET_ARCH) +#if alpha_REGS # define REG(x) __asm__("$" #x) # define CALLER_SAVES_R2 @@ -117,7 +153,7 @@ # define NCG_Reserved_F1 f29 # define NCG_Reserved_F2 f30 -#endif /* alpha_TARGET_ARCH */ +#endif /* alpha_REGS */ /* ----------------------------------------------------------------------------- The HP-PA register mapping @@ -140,7 +176,7 @@ \tr{%fr8}--\tr{%fr11} are some available caller-save fl-pt registers. -------------------------------------------------------------------------- */ -#if hppa1_1_TARGET_ARCH +#if hppa1_1_REGS #define REG(x) __asm__("%" #x) @@ -195,7 +231,7 @@ -------------------------------------------------------------------------- */ -#if i386_TARGET_ARCH +#if i386_REGS #define REG(x) __asm__("%" #x) @@ -204,6 +240,10 @@ #endif #define REG_Sp ebp +#ifndef STOLEN_X86_REGS +#define STOLEN_X86_REGS 4 +#endif + #if STOLEN_X86_REGS >= 3 # define REG_R1 esi #endif @@ -241,7 +281,7 @@ %r15 YES --------------------------------------------------------------------------- */ -#if x86_64_TARGET_ARCH +#if x86_64_REGS #define REG(x) __asm__("%" #x) @@ -292,7 +332,7 @@ \end{tabular} -------------------------------------------------------------------------- */ -#if m68k_TARGET_ARCH +#if m68k_REGS #define REG(x) __asm__(#x) @@ -334,7 +374,7 @@ We can steal some, but we might have to save/restore around ccalls. -------------------------------------------------------------------------- */ -#if mipsel_TARGET_ARCH || mipseb_TARGET_ARCH +#if mips_REGS #define REG(x) __asm__("$" #x) @@ -379,24 +419,32 @@ 0 system glue? (caller-save, volatile) 1 SP (callee-save, non-volatile) - 2 RTOC (callee-save, non-volatile) + 2 AIX, powerpc64-linux: + RTOC (a strange special case) + darwin: + (caller-save, volatile) + powerpc32-linux: + reserved for use by system + 3-10 args/return (caller-save, volatile) 11,12 system glue? (caller-save, volatile) - 13-31 (callee-save, non-volatile) + 13 on 64-bit: reserved for thread state pointer + on 32-bit: (callee-save, non-volatile) + 14-31 (callee-save, non-volatile) f0 (caller-save, volatile) f1-f13 args/return (caller-save, volatile) f14-f31 (callee-save, non-volatile) - \tr{13}--\tr{31} are wonderful callee-save registers. + \tr{14}--\tr{31} are wonderful callee-save registers on all ppc OSes. \tr{0}--\tr{12} are caller-save registers. \tr{%f14}--\tr{%f31} are callee-save floating-point registers. - I think we can do the Whole Business with callee-save registers only! + We can do the Whole Business with callee-save registers only! -------------------------------------------------------------------------- */ -#if powerpc_TARGET_ARCH || rs6000_TARGET_ARCH +#if powerpc_REGS #define REG(x) __asm__(#x) @@ -409,7 +457,7 @@ #define REG_R7 r20 #define REG_R8 r21 -#ifdef darwin_TARGET_OS +#ifdef darwin_REGS #define REG_F1 f14 #define REG_F2 f15 @@ -453,7 +501,7 @@ \tr{f16-f32} are the callee-saved floating point registers. -------------------------------------------------------------------------- */ -#ifdef ia64_TARGET_ARCH +#if ia64_REGS #define REG(x) __asm__(#x) @@ -538,7 +586,7 @@ -------------------------------------------------------------------------- */ -#if sparc_TARGET_ARCH +#if sparc_REGS #define REG(x) __asm__("%" #x)