X-Git-Url: http://git.megacz.com/?a=blobdiff_plain;f=ghc%2Frts%2FSTM.c;h=d3283a92f04fbf9f89437aaa3443d6794c475232;hb=6a710247bc1a7b9bced7a4e6f143de91eb4f9552;hp=bc8e9bf911c07f8debde5c7f74cdec58216f0d97;hpb=afd08a9c06ae4b15e33e26e5a2818801c7fee429;p=ghc-hetmet.git

diff --git a/ghc/rts/STM.c b/ghc/rts/STM.c
index bc8e9bf..d3283a9 100644
--- a/ghc/rts/STM.c
+++ b/ghc/rts/STM.c
@@ -28,7 +28,7 @@
  * in STM.h:
  * 
  * STM_UNIPROC assumes that the caller serialises invocations on the STM interface.
- * In the Haskell RTS this means it is suitable only for non-SMP builds.
+ * In the Haskell RTS this means it is suitable only for non-THREADED_RTS builds.
  *
  * STM_CG_LOCK uses coarse-grained locking -- a single 'stm lock' is acquired during
  * an invocation on the STM interface.  Note that this does not mean that 
@@ -97,8 +97,8 @@
 #define TRUE 1
 #define FALSE 0
 
-// ACQ_ASSERT is used for assertions which are only required for SMP builds with
-// fine-grained locking. 
+// ACQ_ASSERT is used for assertions which are only required for
+// THREADED_RTS builds with fine-grained locking.
 
 #if defined(STM_FG_LOCKS)
 #define ACQ_ASSERT(_X) ASSERT(_X)
@@ -621,6 +621,7 @@ static StgBool entry_is_update(TRecEntry *e) {
   return result;
 } 
 
+#if defined(STM_FG_LOCKS)
 static StgBool entry_is_read_only(TRecEntry *e) {
   StgBool result;
   result = (e -> expected_value == e -> new_value);
@@ -634,6 +635,7 @@ static StgBool tvar_is_locked(StgTVar *s, StgTRecHeader *h) {
   result = (c == (StgClosure *) h);
   return result;  
 }
+#endif
 
 // revert_ownership : release a lock on a TVar, storing back
 // the value that it held when the lock was acquired.  "revert_all"
@@ -792,7 +794,7 @@ static volatile StgInt64 max_commits = 0;
 
 static volatile StgBool token_locked = FALSE;
 
-#if defined(SMP)
+#if defined(THREADED_RTS)
 static void getTokenBatch(Capability *cap) {
   while (cas(&token_locked, FALSE, TRUE) == TRUE) { /* nothing */ }
   max_commits += TOKEN_BATCH_SIZE;
@@ -997,7 +999,7 @@ StgBool stmCommitNestedTransaction(Capability *cap, StgTRecHeader *trec) {
   lock_stm(trec);
 
   et = trec -> enclosing_trec;
-  result = validate_and_acquire_ownership(trec, FALSE, TRUE);
+  result = validate_and_acquire_ownership(trec, (!use_read_phase), TRUE);
   if (result) {
     // We now know that all the updated locations hold their expected values.
 
@@ -1250,7 +1252,7 @@ StgTVar *stmNewTVar(Capability *cap,
   SET_HDR (result, &stg_TVAR_info, CCS_SYSTEM);
   result -> current_value = new_value;
   result -> first_wait_queue_entry = END_STM_WAIT_QUEUE;
-#if defined(SMP)
+#if defined(THREADED_RTS)
   result -> num_updates = 0;
 #endif
   return result;