X-Git-Url: http://git.megacz.com/?a=blobdiff_plain;f=includes%2FSMP.h;h=873bbbbfc2702c7ac868aeefbbe855ee75e5d69c;hb=19e299bbfa64f239999c23baa7fe42530a157393;hp=2cc3fb2009bd055d22676b3f63b73bcc2fb95dbd;hpb=ff074624e44467e87687b7c96d42cb8a7e047914;p=ghc-hetmet.git

diff --git a/includes/SMP.h b/includes/SMP.h
index 2cc3fb2..873bbbb 100644
--- a/includes/SMP.h
+++ b/includes/SMP.h
@@ -18,7 +18,7 @@
 
 #if defined(THREADED_RTS)
 
-#if  defined(TICKY_TICKY)
+#if defined(TICKY_TICKY)
 #error Build options incompatible with THREADED_RTS.
 #endif
 
@@ -179,7 +179,7 @@ write_barrier(void) {
 #elif powerpc_HOST_ARCH
     __asm__ __volatile__ ("lwsync" : : : "memory");
 #elif sparc_HOST_ARCH
-    /* Sparc in TSO mode does not require write/write barriers. */
+    /* Sparc in TSO mode does not require store/store barriers. */
     __asm__ __volatile__ ("" : : : "memory");
 #elif !defined(WITHSMP)
     return;
@@ -197,8 +197,7 @@ store_load_barrier(void) {
 #elif powerpc_HOST_ARCH
     __asm__ __volatile__ ("sync" : : : "memory");
 #elif sparc_HOST_ARCH
-    /* Sparc in TSO mode does not require store/load barriers. */
-    __asm__ __volatile__ ("membar" : : : "memory");
+    __asm__ __volatile__ ("membar #StoreLoad" : : : "memory");
 #elif !defined(WITHSMP)
     return;
 #else