X-Git-Url: http://git.megacz.com/?a=blobdiff_plain;f=ships%2FDRAM.ship;h=161928e6d593b8bb7ab0df1dcd23fd0219209410;hb=b1ccdbab38d0c60a084df048883a41d8ac6e97f0;hp=978d3e068ae4cc589f99415c38d9d10dc4f2e5b8;hpb=ce93756637d7ea889bf7a8113adfabc56834bd58;p=fleet.git

diff --git a/ships/DRAM.ship b/ships/DRAM.ship
index 978d3e0..161928e 100644
--- a/ships/DRAM.ship
+++ b/ships/DRAM.ship
@@ -66,7 +66,7 @@ percolate inout:         ddr1_DQ            32
           .ddr_cke( ddr1_CE_pin ),
    
           .clk(clk),
-          .reset(!rst),
+          .reset(rst),
           .rot(3'b100),
    
           .fml_wr(!dram_isread && dram_addr_r),
@@ -80,13 +80,12 @@ percolate inout:         ddr1_DQ            32
 
   always @(posedge clk) begin
 
-    if (!rst) begin
+    if (rst) begin
       `reset
       dram_isread <= 0;
       dram_addr_r <= 0;
 
     end else begin
-      `flush
       `cleanup
 
       if (dram_addr_r && !dram_addr_a) begin
@@ -114,6 +113,7 @@ percolate inout:         ddr1_DQ            32
 
 
 == Test ========================================================
+#skip
 // expected output
 #expect 10