X-Git-Url: http://git.megacz.com/?a=blobdiff_plain;f=ships%2FFifo.ship;h=616c97b7c4dd07c88f937252dc7fc17c526ddc8c;hb=cbafca81451a452015ea365b3546c3bc0ac7bdbd;hp=f4d8ea1fe3f9430a2d72a2e9b63df36ae43df457;hpb=56553c511a9c2a6d110095ea7ca7c860fa7a31c5;p=fleet.git

diff --git a/ships/Fifo.ship b/ships/Fifo.ship
index f4d8ea1..616c97b 100644
--- a/ships/Fifo.ship
+++ b/ships/Fifo.ship
@@ -2,12 +2,22 @@ ship: Fifo
 
 == Ports ===========================================================
 data  in:   in
+
 data  out:  out
 
 == Constants ========================================================
+
 == TeX ==============================================================
+
+The {\tt Fifo} ship is a simple fifo.  Word-sized delivered to the {\tt
+in} port are enqueued into the fifo, and values which arrive at the
+end of the fifo are provided to the {\tt out} port.
+
+The internal capacity of the fifo is unspecified, but guaranteed to be
+at least 16 words.
+
 == Fleeterpreter ====================================================
-    private Queue<Integer> fifo = new LinkedList<Integer>();
+    private Queue<Long> fifo = new LinkedList<Long>();
     public void service() {
         if (box_in.dataReadyForShip()) {
             fifo.add(box_in.removeDataForShip());
@@ -17,33 +27,37 @@ data  out:  out
         }
     }
 
-== ArchSim ==============================================================
+== FleetSim ==============================================================
+
 == FPGA ==============================================================
-`include "macros.v"
-
-// fifo *ship*: a 16-deep word-wide fifo
-module fifo (clk, 
-             in_r,  in_a, in_d,
-             out_r, out_a, out_d);
-
-  input  clk;
-  input  in_r;
-  input  out_a;
-  output in_a;
-  output out_r;
-  input  [(`DATAWIDTH-1):0] in_d;
-  output [(`DATAWIDTH-1):0] out_d;
-
-  wire   [(`DATAWIDTH-1):0] d12;
-  wire   [(`DATAWIDTH-1):0] d23;
-  wire   [(`DATAWIDTH-1):0] d34;
-
-  fifo4 s1(clk, in_r, in_a, in_d, r12, a12,     d12);
-  fifo4 s2(clk, r12,  a12,  d12,  r23, a23,     d23);
-  fifo4 s3(clk, r23,  a23,  d23,  r34, a34,     d34);
-  fifo4 s4(clk, r34,  a34,  d34,  out_r, out_a, out_d);
-
-endmodule
+
+// not used
+
+== Test =================================================================
+// expected output
+#expect 9
+
+// ships required in order to run this code
+#ship debug        : Debug
+#ship fifo         : Fifo
+
+debug.in:   set ilc=*;  recv, deliver;
+fifo.in:
+  set word= 9;
+  deliver;
+  set ilc=63;
+  recv, deliver;
+  set ilc=37;
+  recv, deliver;
+
+fifo.out:
+  set ilc=63;
+  collect, send to fifo.in;
+  set ilc=36;
+  collect, send to fifo.in;
+  collect, send to debug.in;
+
+
 
 == Contributors =========================================================
 Adam Megacz <megacz@cs.berkeley.edu>