X-Git-Url: http://git.megacz.com/?a=blobdiff_plain;f=src%2Fedu%2Fberkeley%2Ffleet%2Ffpga%2FFpgaShip.java;h=072aae45196f64e00974a552c1c042f5e0e43d9a;hb=75c6a5bd47f04b052a57e5ef1f5d1fe64ada7d9e;hp=f285cdaea69b25e4b1285d0239cf09b9eefc4c3d;hpb=5c781a8b790923f388c107553e66f580e221bd06;p=fleet.git diff --git a/src/edu/berkeley/fleet/fpga/FpgaShip.java b/src/edu/berkeley/fleet/fpga/FpgaShip.java index f285cda..072aae4 100644 --- a/src/edu/berkeley/fleet/fpga/FpgaShip.java +++ b/src/edu/berkeley/fleet/fpga/FpgaShip.java @@ -1,60 +1,39 @@ package edu.berkeley.fleet.fpga; -import edu.berkeley.fleet.doc.*; import edu.berkeley.fleet.api.*; import java.util.*; import java.io.*; +import edu.berkeley.fleet.two.*; +import static edu.berkeley.fleet.two.FleetTwoFleet.*; +import static edu.berkeley.fleet.fpga.verilog.Verilog.*; /** a ship, which belongs to a fleet and which may have many ports */ -public class FpgaShip extends Ship { +public class FpgaShip extends FleetTwoShip { + private Module module; + private Module.InstantiatedModule instance; + private LinkedHashMap ports = new LinkedHashMap(); + LinkedHashMap docklessPorts = new LinkedHashMap(); + /** You should instantiate a bunch of Inboxes and Outboxes in your constructor */ - public FpgaShip(Fpga fleet, String name, String type, ShipDescription sd) { - this.fleet = fleet; this.type = type; - for(BenkoBoxDescription sdbb : sd) { - FpgaBenkoBox sbb = new FpgaBenkoBox(sdbb.isInbox(), this, sdbb.getName()); - for(String port : sdbb) { - if (port.equals("")) continue; - sbb.addDestination(port); + public FpgaShip(Fpga fleet, ShipDescription sd) { + super(fleet, sd); + this.module = new Module(getType().toLowerCase()); + this.instance = new Module.InstantiatedModule(fleet.getVerilogModule(), module); + for(DockDescription sdbb : sd.ports()) { + if (sdbb.isDockless()) { + module.createOutputPort(sdbb.getName(), fleet.WIDTH_PACKET); + docklessPorts.put(sdbb.getName(), instance.getOutputPort(sdbb.getName())); + } else { + if (sdbb.isInputDock()) module.createInputPort(sdbb.getName(), getFleet().getWordWidth()+1); + else module.createOutputPort(sdbb.getName(), getFleet().getWordWidth()+1); + ports.put(sdbb.getName(), new FpgaDock(this, sdbb)); } } - if (type.equals("Debug")) { - new FpgaBenkoBox(false, this, "out", true); - - } else if (type.equals("Execute")) { - new FpgaBenkoBox(false, this, "ihorn", true, true, false); - new FpgaBenkoBox(false, this, "dhorn", true, false, true); - - } else if (type.equals("Memory")) { - new FpgaBenkoBox(true, this, "command", true); - new FpgaBenkoBox(false, this, "ihorn", true, true, false); - new FpgaBenkoBox(false, this, "dhorn", true, false, true); - } + for(PercolatedPort pp : sd.percolatedPorts) + this.module.percolatedPorts.add(pp); } - private Fpga fleet; - private String type; - - public long resolveLiteral(String s) { - if (s.equals("NEG")) return 0; - if (s.equals("INC")) return 1; - if (s.equals("DEC")) return 2; - if (s.equals("ABS")) return 3; - if (s.equals("ADD")) return 0; - if (s.equals("SUB")) return 1; - if (s.equals("MAX")) return 2; - if (s.equals("MIN")) return 3; - return super.resolveLiteral(s); - } - - // this is dumb, the fpga fleet currently requires these in declaration-order; it shouldn't - private ArrayList portlist = new ArrayList(); - private HashMap ports = new HashMap(); - - public Iterable getBenkoBoxes() { return (Iterable)(Object)portlist; } - public String getType() { return type; } - public Fleet getFleet() { return fleet; } - public Fpga getSlipway() { return fleet; } - - void addBenkoBox(String name, FpgaBenkoBox port) { ports.put(name, port); portlist.add(port); } + public Iterator iterator() { return (Iterator)(Object)ports.values().iterator(); } + public Module.InstantiatedModule getVerilogModule() { return instance; } }