enable clockHack for VerilogModel
authorAdam Megacz <adam.megacz@sun.com>
Sun, 19 Apr 2009 02:38:37 +0000 (02:38 +0000)
committerAdam Megacz <adam.megacz@sun.com>
Sun, 19 Apr 2009 02:38:37 +0000 (02:38 +0000)
commit734fd12cdf47586988232a58fe59bc25c7d6ec3c
tree08c3ccd53999f69a4e7fef4336af59470c317855
parented2ebdfb2f6886d9828b09e4f1c9c496e41fd4a7
enable clockHack for VerilogModel
testCode/com/sun/vlsi/chips/marina/test/ProperStopper.java