comments from meeting

darcs-hash:20080323204502-5007d-d83f6765934b57e81fa6cae8e4f92c626d4233cd.gz

diff --git a/am33.tex b/am33.tex
index 8d02767..ea6d0be 100644 (file)
--- a/am33.tex
+++ b/am33.tex
@@ -54,6 +54,9 @@ Changes:
 
 \begin{tabular}{rl}
 \color{red}
 
 \begin{tabular}{rl}
 \color{red}

+??-Mar
+\color{black}
+& added ``if its predicate is true'' to repeat count \\

 12-Mar
 \color{black}
 & renamed loop+repeat to outer+inner (not in red) \\
 12-Mar
 \color{black}
 & renamed loop+repeat to outer+inner (not in red) \\

@@ -111,7 +114,6 @@ from a data packet with a unknown payload.
 
 \begin{center}
 \epsfig{file=overview,width=3in}\\
 
 \begin{center}
 \epsfig{file=overview,width=3in}\\

-\color{red}

 {\it Overview of a Fleet processor; gray shading represents a
   packet-switched network fabric; blue lines carry data, red lines
   carry instructions.}
 {\it Overview of a Fleet processor; gray shading represents a
   packet-switched network fabric; blue lines carry data, red lines
   carry instructions.}

@@ -149,7 +151,7 @@ Note that the pump in each dock has a destination of its own; this is
 the {\it instruction destination} mentioned in the previous section.
 Note that unlike all other destinations, there is no buffering fifo
 guarding this one.  The size of these fifos are exposed to the
 the {\it instruction destination} mentioned in the previous section.
 Note that unlike all other destinations, there is no buffering fifo
 guarding this one.  The size of these fifos are exposed to the

-software programmer so \color{red}he\color{black}\ can avoid deadlock.
+software programmer so he can avoid deadlock.

 
 \pagebreak
 \section{Instructions}
 
 \pagebreak
 \section{Instructions}

@@ -199,8 +201,6 @@ Each instruction word is called a {\it micro instruction}.
 Collections of one or more micro instruction are known as {\it
   composite instructions}.
 
 Collections of one or more micro instruction are known as {\it
   composite instructions}.
 

-\color{red}
-

 The {\tt A} bit stands for {\tt Armor}\footnote{this is to be
   pronounced with a Boston accent (``AAHH-mir'')}.
 The {\tt OL} bit indicates whether or not this instruction is part of
 The {\tt A} bit stands for {\tt Armor}\footnote{this is to be
   pronounced with a Boston accent (``AAHH-mir'')}.
 The {\tt OL} bit indicates whether or not this instruction is part of

@@ -215,7 +215,7 @@ code that indicates if the instruction should be executed or ignored.
 
 \pagebreak
 \subsection{Life Cycle of an Instruction}
 
 \pagebreak
 \subsection{Life Cycle of an Instruction}

-\color{red}
+

 The diagram below shows an input dock for purposes of illustration
 (behavior at an output dock is identical).
 
 The diagram below shows an input dock for purposes of illustration
 (behavior at an output dock is identical).
 

@@ -273,7 +273,7 @@ hatch to be unsealed.
 
 \subsection{Inner and Outer Loops}
 
 
 \subsection{Inner and Outer Loops}
 

-\color{red}
+

 
 Using the mechanisms described above, a programmer can perform two
 types of loops: {\it inner} loops of only one instruction and {\it
 
 Using the mechanisms described above, a programmer can perform two
 types of loops: {\it inner} loops of only one instruction and {\it

@@ -297,12 +297,16 @@ paths used by inner loops and outer loops are shown below:
 \end{center}
 
 Each type of loop has a counter associated with it: the {\tt IC}
 \end{center}
 
 Each type of loop has a counter associated with it: the {\tt IC}

-counter for inner loops and the {\tt OC} counter for outer loops.
-The inner loop counter applies only to {\tt send} instructions; all
-other instructions ignore the inner loop counter.  When a {\tt send}
-instruction reaches the on deck position, it will execute at least
-once; the number of times it executes after that is determined by the
-inner loop counter.
+counter for inner loops and the {\tt OC} counter for outer loops.  The
+inner loop counter applies only to {\tt send} instructions; all other
+instructions ignore the inner loop counter.  When a {\tt send}
+instruction reaches the on deck position,
+\color{red}
+if its predicate is true
+\color{black}
+it
+will execute at least once; the number of times it executes after that
+is determined by the inner loop counter.

 
 The outer loop counter applies to all instructions {\it except} the
 instruction {\tt setOuter} with {\tt OL=0}, because such instructions
 
 The outer loop counter applies to all instructions {\it except} the
 instruction {\tt setOuter} with {\tt OL=0}, because such instructions

@@ -314,7 +318,7 @@ resetting the loop counter in the middle of the execution of a loop.
 
 \subsection{Flags}
 
 
 \subsection{Flags}
 

-The pump has four flags: {\tt A}, {\tt B}, {\tt S}, {\tt L}.  Of
+The pump has four flags: {\tt A}, {\tt B}, {\tt L}, and {\tt S}.  Of

 these four, only the first two may be modified directly by
 instructions.
 
 these four, only the first two may be modified directly by
 instructions.
 

@@ -323,7 +327,7 @@ instructions.
       may be set and cleared by the programmer.
 
 \item
       may be set and cleared by the programmer.
 
 \item

-\color{red}
+

  The {\tt L} flag, known as the {\it last} flag, is set whenever
       the value in the outer counter ({\tt OC}) is one,
 \color{black}
  The {\tt L} flag, known as the {\it last} flag, is set whenever
       the value in the outer counter ({\tt OC}) is one,
 \color{black}

@@ -725,7 +729,7 @@ bits of the data latch unchanged.
   \bitbox[tbr]{16}{} 
 \end{bytefield}}
 
   \bitbox[tbr]{16}{} 
 \end{bytefield}}
 

-\color{red}
+

 When a {\tt torpedo} instruction reaches the instruction horn, it will
 wait there until an instruction is on deck whose {\tt A}rmor bit is
 not set.  The {\tt torpedo} will then cause ``Process \#2'' of the on
 When a {\tt torpedo} instruction reaches the instruction horn, it will
 wait there until an instruction is on deck whose {\tt A}rmor bit is
 not set.  The {\tt torpedo} will then cause ``Process \#2'' of the on