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change igor/archsim to fleetsim
author
adam
<adam@megacz.com>
Mon, 12 Feb 2007 15:51:23 +0000
(16:51 +0100)
committer
adam
<adam@megacz.com>
Mon, 12 Feb 2007 15:51:23 +0000
(16:51 +0100)
ships/Alu1.ship
patch
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blob
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history
ships/Alu2.ship
patch
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blob
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history
ships/Debug.ship
patch
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history
ships/Dscratch.ship
patch
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blob
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history
ships/Execute.ship
patch
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blob
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ships/Fifo.ship
patch
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blob
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history
ships/Halt.ship
patch
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blob
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history
ships/Iscratch.ship
patch
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blob
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history
ships/Lut.ship
patch
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blob
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ships/Shift.ship
patch
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blob
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src/edu/berkeley/fleet/Main.java
patch
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diff --git
a/ships/Alu1.ship
b/ships/Alu1.ship
index
7f487c2
..
a16ffd8
100644
(file)
--- a/
ships/Alu1.ship
+++ b/
ships/Alu1.ship
@@
-30,7
+30,7
@@
data out: out
*/
}
*/
}
-== ArchSim ==============================================================
+== FleetSim ==============================================================
== FPGA ==============================================================
`include "macros.v"
== FPGA ==============================================================
`include "macros.v"
diff --git
a/ships/Alu2.ship
b/ships/Alu2.ship
index
1c567c9
..
4e12ea5
100644
(file)
--- a/
ships/Alu2.ship
+++ b/
ships/Alu2.ship
@@
-42,7
+42,7
@@
public void service() {
}
}
}
}
-== ArchSim ==============================================================
+== FleetSim ==============================================================
== FPGA ==============================================================
`include "macros.v"
== FPGA ==============================================================
`include "macros.v"
diff --git
a/ships/Debug.ship
b/ships/Debug.ship
index
842059c
..
590394b
100644
(file)
--- a/
ships/Debug.ship
+++ b/
ships/Debug.ship
@@
-13,7
+13,7
@@
public void service() {
((Interpreter)getFleet()).debug(box_in.removeDataForShip());
}
((Interpreter)getFleet()).debug(box_in.removeDataForShip());
}
-== ArchSim ==============================================================
+== FleetSim ==============================================================
== FPGA ==============================================================
`include "macros.v"
== FPGA ==============================================================
`include "macros.v"
diff --git
a/ships/Dscratch.ship
b/ships/Dscratch.ship
index
d82de3d
..
30d0396
100644
(file)
--- a/
ships/Dscratch.ship
+++ b/
ships/Dscratch.ship
@@
-35,7
+35,7
@@
token out: outWriteDone
}
}
}
}
-== ArchSim ==============================================================
+== FleetSim ==============================================================
== FPGA ==============================================================
`include "macros.v"
== FPGA ==============================================================
`include "macros.v"
diff --git
a/ships/Execute.ship
b/ships/Execute.ship
index
a50b463
..
4fe66a4
100644
(file)
--- a/
ships/Execute.ship
+++ b/
ships/Execute.ship
@@
-10,7
+10,7
@@
data in: in
//throw new Error("the Execute ship is only for FPGA simulations");
}
//throw new Error("the Execute ship is only for FPGA simulations");
}
-== ArchSim ==============================================================
+== FleetSim ==============================================================
== FPGA ==============================================================
`include "macros.v"
== FPGA ==============================================================
`include "macros.v"
diff --git
a/ships/Fifo.ship
b/ships/Fifo.ship
index
f4d8ea1
..
ff674a4
100644
(file)
--- a/
ships/Fifo.ship
+++ b/
ships/Fifo.ship
@@
-17,7
+17,7
@@
data out: out
}
}
}
}
-== ArchSim ==============================================================
+== FleetSim ==============================================================
== FPGA ==============================================================
`include "macros.v"
== FPGA ==============================================================
`include "macros.v"
diff --git
a/ships/Halt.ship
b/ships/Halt.ship
index
5e0c9df
..
b5cef92
100644
(file)
--- a/
ships/Halt.ship
+++ b/
ships/Halt.ship
@@
-15,7
+15,7
@@
public void service() {
Log.println(Log.yellow(" HALT: ====== halt ship got a token; halting the fleet ======"));
}
Log.println(Log.yellow(" HALT: ====== halt ship got a token; halting the fleet ======"));
}
-== ArchSim ==============================================================
+== FleetSim ==============================================================
== FPGA ==============================================================
// not implemented FIXME
== FPGA ==============================================================
// not implemented FIXME
diff --git
a/ships/Iscratch.ship
b/ships/Iscratch.ship
index
99549ea
..
4d89911
100644
(file)
--- a/
ships/Iscratch.ship
+++ b/
ships/Iscratch.ship
@@
-67,7
+67,7
@@
data in: inCBD
== Constants ========================================================
== TeX ==============================================================
== Constants ========================================================
== TeX ==============================================================
-== ArchSim ==============================================================
+== FleetSim ==============================================================
== FPGA ==============================================================
`include "macros.v"
`define BRAM_ADDR_WIDTH 14
== FPGA ==============================================================
`include "macros.v"
`define BRAM_ADDR_WIDTH 14
diff --git
a/ships/Lut.ship
b/ships/Lut.ship
index
91489d7
..
f33c43e
100644
(file)
--- a/
ships/Lut.ship
+++ b/
ships/Lut.ship
@@
-24,7
+24,7
@@
data out: out
}
}
}
}
-== ArchSim ==============================================================
+== FleetSim ==============================================================
== FPGA ==============================================================
// not implemented FIXME
== FPGA ==============================================================
// not implemented FIXME
diff --git
a/ships/Shift.ship
b/ships/Shift.ship
index
6476ab1
..
a2f6655
100644
(file)
--- a/
ships/Shift.ship
+++ b/
ships/Shift.ship
@@
-18,7
+18,7
@@
data out: out
}
}
}
}
-== ArchSim ==============================================================
+== FleetSim ==============================================================
== FPGA ==============================================================
// not implemented FIXME!
== FPGA ==============================================================
// not implemented FIXME!
diff --git
a/src/edu/berkeley/fleet/Main.java
b/src/edu/berkeley/fleet/Main.java
index
ceee8d5
..
7381036
100644
(file)
--- a/
src/edu/berkeley/fleet/Main.java
+++ b/
src/edu/berkeley/fleet/Main.java
@@
-35,7
+35,7
@@
public class Main {
Fleet fleet;
if ("fpga".equals(target)) {
fleet = new Slipway();
Fleet fleet;
if ("fpga".equals(target)) {
fleet = new Slipway();
- } else if ("igor".equals(target)) {
+ } else if ("sim".equals(target) || "fleetsim".equals(target)) {
fleet = (Fleet)Class.forName("com.sunlabs.fleetsim.fleet.FleetDescription").newInstance();
} else {
fleet = new Interpreter.DynamicInterpreter();
fleet = (Fleet)Class.forName("com.sunlabs.fleetsim.fleet.FleetDescription").newInstance();
} else {
fleet = new Interpreter.DynamicInterpreter();
@@
-147,7
+147,7
@@
public class Main {
System.err.println("usage: java -jar fleet.jar [options] [command] [filename] [args]");
System.err.println("");
System.err.println("[options] is in the form key=val; supported keys are:");
System.err.println("usage: java -jar fleet.jar [options] [command] [filename] [args]");
System.err.println("");
System.err.println("[options] is in the form key=val; supported keys are:");
- System.err.println(" target={igor,fpga,interp}");
+ System.err.println(" target={sim,fpga,interp}");
System.err.println(" bitfile=(hardware image for fpga)");
System.err.println(" verbose={yes,no}");
System.err.println("");
System.err.println(" bitfile=(hardware image for fpga)");
System.err.println(" verbose={yes,no}");
System.err.println("");