prln("End testFlagAB");
}
-
private void recvData(Marina marina) {
prln("Begin recvData");
adjustIndent(2);
prln("End recvData");
}
+ private void testSignExtendedLiteral(Marina marina) {
+ prln("Begin testSignExtendedLiteral");
+ adjustIndent(2);
+
+ for(long val : new long[] { -1, 0, 1, (-1L << 14) }) {
+ prln("inserting Set Data Latch (sign-extended) 37'b" + Long.toString(val, 1));
+ marina.instrIn.fill(new Instruction.Set(DOCK,false,Predicate.IgnoreOLC,
+ Instruction.Set.SetDest.DataLatch,
+ val));
+
+ BitVector bv = marina.getDRegister();
+ prln("got back " + bv);
+
+ boolean mismatch = false;
+ String err = "";
+ for(int i=0; i<37; i++) {
+ if (bv.get(37-i) != ( (val & (1L << i)) != 0 )) {
+ mismatch = true;
+ err += ""+i+", ";
+ }
+ }
+ fatal(mismatch, "data read back did not match inserted literal; mismatch on bits " + err);
+ }
+
+ adjustIndent(-2);
+ prln("End testSignExtendedLiteral");
+ }
+
+ private void testShiftedLiteral(Marina marina) {
+ prln("Begin testShiftedLiteral");
+ adjustIndent(2);
+
+ prln("clearing the D register");
+ marina.instrIn.fill(new Instruction.Set(DOCK,false,Predicate.IgnoreOLC,
+ Instruction.Set.SetDest.DataLatch,
+ 0));
+
+ BitVector dreg = new BitVector(37, "what we think is in the d-register");
+ for(int i=0; i<37; i++) dreg.set(i, false);
+
+ for(long val : new long[] { -1, 0, 1, (-1L << 18) }) {
+
+ prln("inserting Shift 19'b" + Long.toString(val, 1));
+ edu.berkeley.fleet.api.BitVector immediate =
+ new edu.berkeley.fleet.api.BitVector(19);
+ for(int i=0; i<immediate.length(); i++)
+ immediate.set(i, (val & (1L << i)) != 0);
+ marina.instrIn.fill(new Instruction.Shift(DOCK,false,Predicate.IgnoreOLC,immediate));
+
+ // shift over 19 LSB's towards MSB
+ for(int i=0; i<19; i++)
+ if (36-(i+19) >= 0)
+ dreg.set(36-(i+19), dreg.get(36-i));
+ for(int i=0; i<19; i++)
+ dreg.set(36-i, immediate.get(i));
+
+ BitVector bv = marina.getDRegister();
+ prln("got back " + bv);
+
+ boolean mismatch = false;
+ String err = "";
+ for(int i=0; i<37; i++) {
+ if (bv.get(37-i) != ( (val & (1L << i)) != 0 )) {
+ mismatch = true;
+ err += ""+i+", ";
+ }
+ }
+ fatal(mismatch, "data read back did not match inserted literal; mismatch on bits " + err);
+ }
+
+ adjustIndent(-2);
+ prln("End testShiftedLiteral");
+ }
+
private void testFlagC(Marina marina) {
prln("Begin testFlagC");
adjustIndent(2);
case 3010: testRequeueStage0to2to3to0(marina); break;
case 3011: recvData(marina); break;
case 3012: testFlagC(marina); break;
+ case 3013: testSignExtendedLiteral(marina); break;
+ case 3014: testShiftedLiteral(marina); break;
default:
fatal(true, "Test number: "+testNum+" doesn't exist.");