added 100mhz timing constraint

diff --git a/src/edu/berkeley/fleet/slipway/main.ucf b/src/edu/berkeley/fleet/slipway/main.ucf
index 1bd01e1..59d4b9a 100644 (file)
--- a/src/edu/berkeley/fleet/slipway/main.ucf
+++ b/src/edu/berkeley/fleet/slipway/main.ucf
@@ -2,6 +2,8 @@
 ## System clock pins
 ######################################
 
+NET User_Clk PERIOD=100MHz;
+
 NET Clkin_p            LOC = AP21 | IOSTANDARD = LVDS_25;
 NET Clkin_m            LOC = AN21 | IOSTANDARD = LVDS_25;