fix Alu3

diff --git a/ships/Alu3.ship b/ships/Alu3.ship
index 5b9d0cb..e605f34 100644 (file)
--- a/ships/Alu3.ship
+++ b/ships/Alu3.ship
@@ -18,7 +18,7 @@ data  out:  outBits
 
 == Fleeterpreter ====================================================
 boolean mode = false;
-Bitfifo.BitStorage outBits = new Bitfifo.BitStorage(74);
+BitFifo.BitStorage outBits = new BitFifo.BitStorage(74);
 public void service() {
   if (box_in1.dataReadyForShip() &&
       box_in2.dataReadyForShip() &&
@@ -56,44 +56,65 @@ public void service() {
 
 == FPGA ==============================================================
 
-  reg                    have_a;
-  reg [(`DATAWIDTH-1):0] a;
-  reg                    have_b;
-  reg [(`DATAWIDTH-1):0] b;
-  reg                    have_c;
-  reg [(`DATAWIDTH-1):0] c;
-  reg                    have_out1;
-  reg                    have_out2;
+  reg                    mode;         initial mode = 0;
+  reg                    have_in1;     initial have_in1 = 0;
+  reg                    have_in2;     initial have_in2 = 0;
+  reg                    have_in3;     initial have_in3 = 0;
+  reg [(`DATAWIDTH-1):0] keep_in1;     initial keep_in1 = 0;
+  reg [(`DATAWIDTH-1):0] keep_in2;     initial keep_in2 = 0;
+  reg [(`DATAWIDTH-1):0] keep_in3;     initial keep_in3 = 0;
+  reg                    have_out1;    initial have_out1 = 0;
+  reg                    have_out2;    initial have_out2 = 0;
+  reg                    have_out3;    initial have_out3 = 0;
+  reg [73:0] bitstorage;
+  reg [7:0] bitstorage_count;          initial bitstorage_count = 0;
+  reg wrote;                           initial wrote = 0;
 
   always @(posedge clk) begin
+    wrote = 0;
     if (have_out1) begin
       `onwrite(out1_r, out1_a) have_out1 <= 0; end
-
     end else if (have_out2) begin
       `onwrite(out2_r, out2_a) have_out2 <= 0; end
-
-    end else if (!have_out1 && !have_out2) begin
-      if (!have_a) begin
-        `onread(in1_r, in1_a) have_a <= 1; a <= in1_d; end
-        end
-      if (!have_b) begin
-        `onread(in2_r, in2_a) have_b <= 1; b <= in2_d; end
-        end
-      if (!have_c) begin
-        `onread(in3_r, in3_a) have_c <= 1; c <= in3_d; end
+    end else if (have_out3) begin
+      `onwrite(out3_r, out3_a) have_out3 <= 0; end
+    end else if (!have_in1) begin
+      `onread(in1_r, in1_a) have_in1 <= 1; keep_in1 <= in1_d; end
+    end else if (!have_in2) begin
+      `onread(in2_r, in2_a) have_in2 <= 1; keep_in2 <= in2_d; end
+    end else if (!have_in3) begin
+      `onread(in3_r, in3_a) have_in3 <= 1; keep_in3 <= in3_d; end
+    end else begin
+        if (mode == 0) begin
+          out1_d    <= keep_in1;
+          out2_d    <= { 1'b0, keep_in2[(`DATAWIDTH-1):1] };
+          out3_d    <= (keep_in2[0]==0) ? 0 : keep_in1;
+        end else begin
+          out1_d           <= { ((keep_in1 & keep_in2) | (keep_in2 & keep_in3) | (keep_in1 & keep_in3)) };
+          out2_d                       <= (keep_in1 ^ keep_in2 ^ keep_in3) >> 1;
+          out3_d                       <= 0;
+          bitstorage_count             <= bitstorage_count+1;
+          bitstorage[bitstorage_count] <= (keep_in1[0] ^ keep_in2[0] ^ keep_in3[0]);
+          wrote = 1;
         end
-  
-      if (have_a && have_b && have_c) begin
-        out1_d    <= { { ((a & b) | (b & c) | (a & c)) } , 1'b0 };
-        out2_d    <= a ^ b ^ c;
-        have_a    <= 0;
-        have_b    <= 0;
-        have_c    <= 0;
         have_out1 <= 1;
         have_out2 <= 1;
-      end
+        have_out3 <= 1;
+        have_in1  <= 0;
+        have_in2  <= 0;
+        have_in3  <= 0;
+        mode <= ~mode;
     end
+
+    if (!wrote && bitstorage_count >= `DATAWIDTH) begin
+       outBits_d         <= bitstorage[(`DATAWIDTH-1):0];
+      `onwrite(outBits_r, outBits_a) begin
+        bitstorage_count <= bitstorage_count - `DATAWIDTH;
+        bitstorage       <= bitstorage >> `DATAWIDTH;
+      end
+    end    
   end
+end
 
 
 == Test ========================================================================