Module.StateWire busy = new StateWire("busy", false);
out.forceNoLatch = true;
- // FIXME: okay to eliminate torpedoWaiting
-
new Event(new Object[] { in, busy.isFull(), out },
new Action[] { in, busy.doDrain() });
new Event(new Object[] { in, busy.isEmpty(), out, torpedo, fpga.PACKET_TOKEN.verilogVal("in") },
Module.Latch flag_c = new Latch("flag_c", 1);
Module.Latch flag_z = new Latch("flag_z", 1);
- Module.StateWire torpedoWaiting = new StateWire("torpedoWaiting", false);
-
Module.SinkPort token_out = fabric_out;
Module.SourcePort token_in = dfifo_out;
Module.SinkPort data_out = inbox ? ship_in : fabric_out;
String magic_standing_value = "(1<<"+fpga.SET_ILC_FROM_IMMEDIATE.valmaskwidth+")";
String done_executing = "(ilc==0 || ilc==1 || !"+fpga.MOVE.verilog(ondeck.getName())+")";
- // Torpedo Arrival
- new Event(new Object[] { torpedo_branch_torpedo, torpedoWaiting.isEmpty() },
- new Action[] { torpedo_branch_torpedo, torpedoWaiting.doFill() });
-
String predicate_met =
"("+
"("+
predicate_met,
fpga.MOVE.verilog(ondeck.getName()),
"!"+fpga.NOT_INTERRUPTIBLE.verilog(ondeck.getName()),
- torpedoWaiting.isFull()
+ torpedo_branch_torpedo
},
new Object[] {
ondeck,
- torpedoWaiting.doDrain(),
+ torpedo_branch_torpedo,
new AssignAction(olc, "0"),
new AssignAction(flag_z, "1"),
new AssignAction(ilc, "1")
data_out,
token_out,
predicate_met,
- "(!"+fpga.MOVE.verilog(ondeck.getName())+" || "+fpga.NOT_INTERRUPTIBLE.verilog(ondeck.getName())+" || !"+torpedoWaiting.isFull()+")",
+ "(!"+fpga.MOVE.verilog(ondeck.getName())+" || "+fpga.NOT_INTERRUPTIBLE.verilog(ondeck.getName())+" || !"+torpedo_branch_torpedo.isFull()+")",
new ConditionalTrigger(fpga.DI.verilog(ondeck.getName()), data_in),
new ConditionalTrigger(fpga.TI.verilog(ondeck.getName()), token_in)
},