public static final int INSTR_SZ = 36;
- public static final int INDEX_OF_ADDRESS_BIT_COPIED_TO_C_FLAG_WHEN_DC_EQUALS_ONE = 13;
- public static final int INDEX_OF_ADDRESS_BIT_COPIED_TO_C_FLAG_WHEN_DC_EQUALS_ZERO = 0;
-
+
public static final Instruction.Set.FlagFunction CLEAR_FLAG
= Instruction.Set.FlagFunction.ZERO;
public static final Instruction.Set.FlagFunction SET_FLAG
if (model instanceof VerilogModel) {
VerilogModel vm = (VerilogModel)model;
- vm.start("verilog", "marina.v", VerilogModel.DUMPVARS);
+ vm.start("verilog", "marina.v", VerilogModel.DUMPVARS, !cmdArgs.jtagShift);
vm.setNodeState("sid[9]", 1);
vm.setNodeState("sic[9]", 1);
vm.setNodeState("sir[9]", 1);
prln("Inserting ["+(predicate_olc_nonzero?"olc!=0":"olc==0")+"] send data");
marina.instrIn.fill(new Instruction.Move(dock,
- predicate_olc_nonzero /* predicate */
+ predicate_olc_nonzero // predicate
? only_if_olc_nonzero
: only_if_olc_zero
,
- false, /* torpedoable */
- null, /* path */
- false, /* tokenIn */
- false, /* dataIn */
- false, /* latchData */
- false, /* latchPath */
- true, /* dataOut */
- false /* tokenOut */
+ false, // torpedoable
+ null, // path
+ false, // tokenIn
+ false, // dataIn
+ false, // latchData
+ false, // latchPath
+ true, // dataOut
+ false // tokenOut
));
toks = marina.data.drainMany();
int expected = (predicate_olc_nonzero == (olc!=0)) ? 1 : 0;
BitVector addr = new BitVector(14, "empty");
for(int i=0; i<data.getNumBits(); i++) data.set(i, false);
for(int i=0; i<addr.getNumBits(); i++) addr.set(i, false);
- addr.set(INDEX_OF_ADDRESS_BIT_COPIED_TO_C_FLAG_WHEN_DC_EQUALS_ONE, c_state);
+ addr.set(Marina.INDEX_OF_ADDRESS_BIT_COPIED_TO_C_FLAG_WHEN_DC_EQUALS_ONE, c_state);
marina.fillNorthProperStopper(new MarinaPacket(data, false, addr));
marina.instrIn.fill(RECV_DATA);
marina.instrIn.fill(new Instruction.Set(dock,Predicate.IgnoreFlagD, CLEAR_FLAG, CLEAR_FLAG));
marina.instrIn.fill(new Instruction.Move(dock,
- Predicate.IgnoreFlagD, /* predicate */
- false, /* torpedoable */
- null, /* path */
- false, /* tokenIn */
- true, /* dataIn */
- false, /* latchData */
- false, /* latchPath */
- false, /* dataOut */
- false /* tokenOut */
+ Predicate.IgnoreFlagD, // predicate
+ false, // torpedoable
+ null, // path
+ false, // tokenIn
+ true, // dataIn
+ false, // latchData
+ false, // latchPath
+ false, // dataOut
+ false // tokenOut
));
marina.instrIn.fill(new Instruction.Set(dock,Predicate.IgnoreFlagD, SET_FLAG, SET_FLAG));
+ model.waitNS(64 * CYCLE_TIME_NS);
+
prln("checking to confirm that A flag is cleared");
fatal(marina.getFlagA(), "bad A flag: "+marina.getFlagA());
for(int i=0; i<addr.getNumBits(); i++) addr.set(i, false);
int whichbit = dc
- ? INDEX_OF_ADDRESS_BIT_COPIED_TO_C_FLAG_WHEN_DC_EQUALS_ONE
- : INDEX_OF_ADDRESS_BIT_COPIED_TO_C_FLAG_WHEN_DC_EQUALS_ZERO;
+ ? Marina.INDEX_OF_ADDRESS_BIT_COPIED_TO_C_FLAG_WHEN_DC_EQUALS_ONE
+ : Marina.INDEX_OF_ADDRESS_BIT_COPIED_TO_C_FLAG_WHEN_DC_EQUALS_ZERO;
prln("setting addr["+whichbit+"] to "+(c_flag?"1":"0"));
addr.set(whichbit, c_flag);
Instruction.Set.FlagFunction.ZERO.add(Predicate.FlagC),
CLEAR_FLAG
));
+
+ model.waitNS(CYCLE_TIME_NS * 64);
prln("checking to confirm that A flag is " + c_flag);
fatal(marina.getFlagA()!=c_flag, "bad A flag: "+marina.getFlagA());
prln("execute a move instruction that does nothing but loops until torpedo arrives");
marina.instrIn.fill(
new Instruction.Move(dock,
- Predicate.IgnoreFlagD, /* predicate */
- true, /* torpedoable */
- null, /* path */
- false, /* tokenIn */
- false, /* dataIn */
- false, /* latchData */
- false, /* latchPath */
- false, /* dataOut */
- false /* tokenOut */
+ Predicate.IgnoreFlagD, // predicate
+ true, // torpedoable
+ null, // path
+ false, // tokenIn
+ true, // dataIn
+ false, // latchData
+ false, // latchPath
+ false, // dataOut
+ false // tokenOut
));
+
- prln("A=1, B=1 This instruction should get torpedoed along with the Move");
+ prln("A=1, B=B This instruction should not execute because D-flag is set");
marina.instrIn.fill(new
- Instruction.Set(dock,Predicate.Default, SET_FLAG, SET_FLAG));
+ Instruction.Set(dock,Predicate.Default,
+ SET_FLAG,
+ Instruction.Set.FlagFunction.ZERO.add(Predicate.FlagB)
+ ));
+
+ prln("Set A=A, B=1 This instruction should execute because D-flag is set");
+ marina.instrIn.fill(new
+ Instruction.Set(dock, Predicate.FlagD,
+ Instruction.Set.FlagFunction.ZERO.add(Predicate.FlagA),
+ SET_FLAG
+ ));
prln("send torpedo. This should clear the OLC");
marina.instrIn.fillTorpedo();
+ model.waitNS(64 * CYCLE_TIME_NS);
- getCtrsFlags(marina);
-
- prln("A and B should remain false");
+ prln("A should remain false, B should be true");
fatal(marina.getFlagA(), "bad A flag: true");
- fatal(marina.getFlagB(), "bad B flag: true");
+ fatal(!marina.getFlagB(), "bad B flag: false");
- prln("OLC = 63. Reload OLC after torpedo");
+ prln("OLC = 63. Reload OLC after torpedo, clears D-flag");
marina.instrIn.fill(new
Instruction.Set(dock,Predicate.IgnoreFlagD,SetDest.OuterLoopCounter, 63));
prln("End sendTorpedo");
}
- private void testTorpedoOnAnInfiniteNop(Marina marina) {
- prln("Begin testTorpedoOnAnInfiniteNop");
+ private void testTorpedoOnAnInfinite(Marina marina) {
+ prln("Begin testTorpedoOnAnInfinite");
adjustIndent(2);
List<BitVector> dataItems;
for(boolean torpedoable : new boolean[] { true, false }) {
+
+ prln("send token");
+ marina.instrIn.fill(new Instruction.Move(dock,
+ Predicate.IgnoreFlagD, // predicate
+ false, // torpedoable
+ null, // path
+ false, // tokenIn
+ false, // dataIn
+ false, // latchData
+ false, // latchPath
+ false, // dataOut
+ true // tokenOut
+ ));
+
prln("set ilc=\\infty");
marina.instrIn.fill(new Instruction.Set(dock,Predicate.IgnoreFlagD,SetDest.InnerLoopCounter,SetSource.Infinity));
-
- prln("nop");
+
+ prln("recv-and-send token");
marina.instrIn.fill(new Instruction.Move(dock,
- Predicate.IgnoreFlagD, /* predicate */
- torpedoable, /* torpedoable */
- null, /* path */
- false, /* tokenIn */
- false, /* dataIn */
- false, /* latchData */
- false, /* latchPath */
- false, /* dataOut */
- false /* tokenOut */
+ Predicate.IgnoreFlagD, // predicate
+ torpedoable, // torpedoable
+ null, // path
+ true, // tokenIn
+ false, // dataIn
+ false, // latchData
+ false, // latchPath
+ false, // dataOut
+ true // tokenOut
));
+
+ // FIXME: this probably should be removed, unless Ivan doesn't want to change the behavior
+ prln("set ilc=1");
+ marina.instrIn.fill(new Instruction.Set(dock,Predicate.IgnoreFlagD,SetDest.InnerLoopCounter,1));
+
prln("send data");
marina.instrIn.fill(SEND_DATA);
// expect nothing to come out, because the NOP is executing
- dataItems = marina.data.drainMany(10);
+ dataItems = marina.data.drainMany(2);
fatal(dataItems.size()!=0, "Expected no data item(s) to emerge but got at least: "+dataItems.size()+" data items");
prln("send torpedo");
}
adjustIndent(-2);
- prln("End testTorpedoOnAnInfiniteNop");
+ prln("End testTorpedoOnAnInfinite");
}
private void testOlcDecrementAtHighSpeed(Marina marina) {
// of the OLC will be checked by executing a MOVE with
// [olc!=0] as the predicate.
- int[] olcs = new int[] { 3 /*, 3, 3, 10, 41*/ };
- int[] decr_amounts = new int[] { 2 /*, 3, 4, 9, 10*/ };
+ int[] olcs = new int[] { 3, 3, 3, 10, 41 };
+ int[] decr_amounts = new int[] { 2, 3, 4, 9, 9 };
for(int which=0; which<olcs.length; which++) {
int olc = olcs[which];
prln("enabling instruction recirculate");
marina.enableInstructionRecirculate(true);
- prln("inserting "+decr_amount+" olc-- instructions");
+ prln("inserting: "+decr_amount+" olc-- instructions");
for(int i=0; i<decr_amount; i++)
marina.instrIn.fill(new Instruction.Set(dock,Predicate.IgnoreFlagD,
SetDest.OuterLoopCounter,SetSource.Decrement));
- prln("inserting [olc!=0] send data");
+ prln("inserting: [!d] send data");
marina.instrIn.fill(new Instruction.Move(dock,
Predicate.Default, /* predicate */
false, /* torpedoable */
prln("calling marina.instrIn.run()");
marina.instrIn.run();
- model.waitNS(5);
+ model.waitNS(64 * CYCLE_TIME_NS);
int expected = decr_amount>=olc ? 0 : 1;
dataItems = marina.data.drainMany(2);
doOneTest(4);
doOneTest(5);
doOneTest(1001);
+ doOneTest(1003);
doOneTest(3000);
doOneTest(3001);
+ doOneTest(3003);
+ doOneTest(3004);
doOneTest(3009);
doOneTest(3010);
doOneTest(3011);
doOneTest(3013);
doOneTest(3014);
doOneTest(3015);
+ doOneTest(3019);
+ doOneTest(3020);
+ doOneTest(3023);
// these tests take a while and usually pass
doOneTest(1000);
+ doOneTest(1002);
doOneTest(1004);
doOneTest(1005);
doOneTest(1006);
doOneTest(3016);
doOneTest(3021);
doOneTest(3024);
+ doOneTest(3025);
+
+ // this takes an insanely long time
+ doOneTest(3017);
break;
}
// Russell's tests begin with 1000
case 1000: walkOneILC(marina); break; // 20-Apr (+verilog)
case 1001: countIlc(marina); break; // 20-Apr (+verilog)
- case 1002: countOlc(marina); break;
+ case 1002: countOlc(marina); break; // 23-Apr (+verilog)
- case 1003: sendTorpedo(marina); break;
+ case 1003: sendTorpedo(marina); break; // 23-Apr (+verilog) [with wor-hack]
case 1004: flipIlcBit(marina); break; // 20-Apr (+verilog)
case 1005: flipOlcBit(marina); break; // 21-Apr (+verilog)
case 3000: sendToken(marina); break; // passes, 24-Mar (+verilog)
case 3001: testFlagAB(marina); break; // passes, 08-Apr (+verilog)
case 3002: testPredicationOnAB(marina); break; // 22-Apr (+verilog)
- case 3003: testFlagC(marina); break;
- case 3004: testFlagD(marina); break;
+ case 3003: testFlagC(marina); break; // 23-Apr (+verilog)
+ case 3004: testFlagD(marina); break; // 23-Apr (+verilog)
case 3005: testRequeueStage0(marina); break;
case 3006: testRequeueStage0to1(marina); break;
case 3007: testRequeueStage0to1to3to0(marina); break;
case 3008: testRequeueStage0to2to3to0(marina); break;
- case 3009: testWaitForTail(marina); break; // 22-Apr (+verilog)
-
//case 3010: testRequeueStageDrop(marina); break; // no longer relevant (behavior changed)
+ case 3009: testWaitForTail(marina); break; // 22-Apr (+verilog)
+
case 3010: sendData(marina); break; // passes, 24-Mar (+verilog)
case 3011: recvData(marina); break; // 21-Apr (+verilog)
case 3012: sendDataWithPath(marina); break; // passes, 13-Apr (+verilog)
case 3015: testSendAndRecvToken(marina); break; // 21-Apr (+verilog)
case 3016: sendDataIlcInfinite(marina); break; // 22-Apr (+verilog)
- case 3017: testFlagTruthTable(marina); break;
+ case 3017: testFlagTruthTable(marina); break; // 23-Apr (+verilog)
- case 3019: setOlcFromDataLatch(marina); break;
- case 3020: setIlcFromDataLatch(marina); break;
+ case 3019: setOlcFromDataLatch(marina); break; // 23-Apr (+verilog)
+ case 3020: setIlcFromDataLatch(marina); break; // 23-Apr (+verilog)
case 3021: recvPath(marina); break; // 22-Apr (+verilog)
- case 3022: testILC(marina); break;
- case 3023: testTorpedoOnAnInfiniteNop(marina); break;
+ case 3022: testILC(marina); break; // 23-Apr (+verilog)
+ case 3023: testTorpedoOnAnInfinite(marina); break;
case 3024: testRecvAndSendWalkingOne(marina); break; // 21-Apr (+verilog)
- case 3025: testOlcDecrementAtHighSpeed(marina); break;
+ case 3025: testOlcDecrementAtHighSpeed(marina); break; // 23-Apr (+verilog)
default:
fatal(true, "Test number: "+testNum+" doesn't exist.");