X
# Cell marina;1{sch}
-Cmarina;1{sch}||schematic|1226940444999|1227470246738|I
+Cmarina;1{sch}||schematic|1226940444999|1227477166187|I
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-49|-1||||
NOff-Page|conn@1||70|-2||||
IorangeTSMC090nm:wire90;1{ic}|wire90@0||12|6|||D0G4;|ATTR_L(D5G1;PUD)D291.79999999999995|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
IorangeTSMC090nm:wire90;1{ic}|wire90@1||33|6|||D0G4;|ATTR_L(D5G1;PUD)D291.79999999999995|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
IorangeTSMC090nm:wire90;1{ic}|wire90@2||-9|6|||D0G4;|ATTR_L(D5G1;PUD)D291.79999999999995|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
-Awire|a[14]|D5G2;||900|pin@52||-9|-3|pin@53||-9|-11
+Awire|ain[14]|D5G2;||900|pin@52||-9|-3|pin@53||-9|-11
Abus|cl[T,F],clS[T,F],rd[T,F],mc|D5G2;|-0.5|IJ2700|dataPath@0|cl[T,F],clS[T,F],rd[T,F],mc|0|8|pin@62||0|18
Awire|ddo[D]|D5G2;||900|pin@20||51|3|pin@21||51|0
Abus|ddo[T,D]|D5G2;|-0.5|IJ900|pin@17||10|3|pin@18||10|0
Awire|doo[D]|D5G2;||900|pin@25||67|6|pin@30||67|3
Abus|doo[T,D]|D5G2;|-0.5|IJ900|pin@22||-11|3|pin@27||-11|1
Awire|doo[T]|D5G2;||900|pin@78||32|1|pin@79||32|-3
-Abus|dout[1:37,T],aou[1:14]|D5G2;|-0.5|IJ900|pin@80||40|-9|pin@81||40|-12
+Abus|dout[1:37,T],douta[1:14]|D5G2;|-0.5|IJ900|pin@80||40|-9|pin@81||40|-12
Abus|iout[1:36],aout[T]|D5G2;|-0.5|IJ2700|pin@60||-14|-6|pin@61||-14|-2
Abus|iout[1:37],aout[T,1:14]|D5G2;|-0.5|IJ900|pin@58||-27|-6|pin@59||-27|-12
Abus|net@6||-0.5|IJ1800|pin@60||-14|-6|dataPath@0|in[1:36,T]|-2|-6
"southFif@0.tapPropS@0.tapStage@1";
private static final String TOK_FIFO_PATH = "tokenFIF@0";
private static final String TOK_PRED_PATH = "dataPath@0.ringSkip@0.moveLit@1.scanKhx5@0.scanCell@5";
+ private static final String INSTRUCTION_COUNTER_PATH = "southFif@0.tapPropS@0";
+ private static final String DATA_COUNTER_PATH = "northFif@0.fillDrai@0";
+ private static final int COUNTER_LENGTH = 34;
private static final int INSTRUCTION_SEND_NDX = MarinaTest.NEW ? 1 : 1;
private static final int INSTRUCTION_RECIRCULATE_NDX = 0;
private static final int A_FLAG_NDX = MarinaTest.NEW ? 0 : 0;
private static final int B_FLAG_NDX = MarinaTest.NEW ? 1 : 1;
+ public static final int SOUTH_RING_CAPACITY = 11;
+
// ILC appears in scan chain as "count[1:6], zLo, i, dLo"
public class Ilc {
// value is bit reversed and complemented
private void shiftControl(boolean readEnable, boolean writeEnable) {
cc.shift(CONTROL_CHAIN, readEnable, writeEnable);
}
+
+ /** Shift the data scan chain */
+ private void shiftData(boolean readEnable, boolean writeEnable) {
+ cc.shift(DATA_CHAIN, readEnable, writeEnable);
+ }
public Marina(ChainControl cc, ChipModel model, Indenter indenter) {
this.cc = cc;
DATA_CHAIN,
REPORT_CHAIN,
cc, model, indenter);
-// tokOut = new ProperStopper("tokOut",
-// CONTROL_CHAIN,
-// DATA_CHAIN,
-// REPORT_CHAIN,
-// cc, model, indenter);
instrIn = new InstructionStopper("southFif@0.tapPropS@0.properSt@0",
CONTROL_CHAIN,
DATA_CHAIN,
public BitVector getDRegister() {
throw new RuntimeException("please implement this!");
}
+ /** return value of instruction counter. Instruction counter is in south ring
+ * after the proper stopper. Caution: instruction counter is written by all scans,
+ * regardless of readEnable or writeEnable! */
+ public long getInstructionCounter() {
+ shiftData(true, false);
+ BitVector count = cc.getOutBits(REPORT_CHAIN+"."+INSTRUCTION_COUNTER_PATH);
+ int sz = count.getNumBits();
+ MarinaTest.fatal(sz!=COUNTER_LENGTH, "wrong number of counter bits: "+sz+
+ " expected: "+COUNTER_LENGTH);
+ return count.bitReverse().toLong();
+ }
+ /** return value of data counter. Data counter is in north ring
+ * after the proper stopper. Caution: data counter is written by all scans,
+ * regardless of readEnable or writeEnable! */
+ public long getDataCounter() {
+ shiftData(true, false);
+ BitVector count = cc.getOutBits(REPORT_CHAIN+"."+DATA_COUNTER_PATH);
+ int sz = count.getNumBits();
+ MarinaTest.fatal(sz!=COUNTER_LENGTH, "wrong number of counter bits: "+sz+
+ " expected: "+COUNTER_LENGTH);
+ return count.bitReverse().toLong();
+ }
/** Fill the "North" Fifo ring */
public void fillNorthProperStopper(BitVector data, boolean tokenhood, BitVector address) {
int len = 37+1+14;
// FIXME: temporary modification to make
// troublshooting easier; this will be removed
- for(int i=0; i<addr.getNumBits(); i++) addr.set(i, c_flag);
+ //for(int i=0; i<addr.getNumBits(); i++) addr.set(i, c_flag);
- int whichbit = dc ? 0 : 13;
+ int whichbit = dc ? 13 : 0;
prln("setting addr["+whichbit+"] to "+(c_flag?"1":"0"));
addr.set(whichbit, c_flag);
null, /* path */
false, /* tokenIn */
true, /* dataIn */
- dc, /* latchData */
+ !dc, /* latchData */
false, /* latchPath */
false, /* dataOut */
false /* tokenOut */
prln("checking to confirm that A flag is " + c_flag);
fatal(marina.getFlagA()!=c_flag, "bad A flag: "+marina.getFlagA());
}
-
}
adjustIndent(-2);
prln("End testFlagC");
private void testSouthRecirculate (Marina marina) {
marina.enableInstructionSend(false);
marina.enableInstructionRecirculate(true);
- for (int i=0; i<11; i++) {
+
+ // test capacity
+ for (int i=0; i<Marina.SOUTH_RING_CAPACITY; i++) {
BitVector instr = new BitVector(36, "Instr"+i);
instr.setFromLong(i);
marina.instrIn.fill(instr);
}
+ List<BitVector> out = marina.instrIn.drainMany();
+ for (int i=0; i<Marina.SOUTH_RING_CAPACITY; i++) {
+ int expect = (i+Marina.SOUTH_RING_CAPACITY-1) % Marina.SOUTH_RING_CAPACITY;
+ long got = out.get(i).toLong();
+ fatal(got!=expect, "bad instruction: "+got+" expected: "+expect);
+ }
+
+ for (int i=0; i<5; i++) {}
}
private void doOneTest(int testNum) {
*** SPICE deck for cell marina{sch} from library marinaL
*** Created on Mon Nov 17, 2008 08:47:24
-*** Last revised on Sun Nov 23, 2008 11:57:53
-*** Written on Sun Nov 23, 2008 11:58:39 by Electric VLSI Design System,
+*** Last revised on Sun Nov 23, 2008 13:52:46
+*** Written on Sun Nov 23, 2008 13:52:59 by Electric VLSI Design System,
*version 8.08k
*** Layout tech: cmos90, foundry TSMC
*** UC SPICE *** , MIN_RESIST 50.0, MIN_CAPAC 0.04FF
+dout[22] dout[23] dout[24] dout[25] dout[26] dout[27] dout[28] dout[29]
+dout[2] dout[30] dout[31] dout[32] dout[33] dout[34] dout[35] dout[36]
+dout[37] dout[3] dout[4] dout[5] dout[6] dout[7] dout[8] dout[9] dout[T]
-+net@14 doo[D] doo[T] rd[F] rd[T] a[14] net@105 net@100 ddo[D] ddo[T] dataPath
++net@14 doo[D] doo[T] rd[F] rd[T] ain[14] net@105 net@100 ddo[D] ddo[T]
++dataPath
XnorthFif@0 douta[10] douta[11] douta[12] douta[13] douta[14] douta[1]
+douta[2] douta[3] douta[4] douta[5] douta[6] douta[7] douta[8] douta[9]
+dout[T] ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] ain[3] ain[4]