add additional reset logic to instances of Generator.Port

diff --git a/src/edu/berkeley/fleet/fpga/Generator.java b/src/edu/berkeley/fleet/fpga/Generator.java
index e0f9c6c..b44a299 100644 (file)
--- a/src/edu/berkeley/fleet/fpga/Generator.java
+++ b/src/edu/berkeley/fleet/fpga/Generator.java
@@ -353,6 +353,19 @@ public class Generator {
             }
             pw.println(precrap);
             pw.println("always @(posedge clk) begin");
+            pw.println("  if (!rst) begin");
+            for(Port p : ports.values()) {
+                if (p instanceof SourcePort) {
+                    SourcePort ip = (SourcePort)p;
+                    if (ip.hasLatch)
+                        pw.println(ip.getAck()+" <=1;");
+                } else {
+                    SinkPort op = (SinkPort)p;
+                    if (op.hasLatch)
+                        pw.println(op.getReq()+" <=0;");
+                }
+            }
+            pw.println("  end else begin");
             for(Port p : ports.values()) {
                 if (p instanceof SourcePort) {
                     SourcePort ip = (SourcePort)p;
@@ -366,10 +379,10 @@ public class Generator {
                                    op.getResetBehavior()+" end");
                 }
             }
-
             for(Event a : events) a.dump(pw, fix);
-            pw.println(" begin end");
-            pw.println("end");
+            pw.println("    begin end");
+            pw.println("    end");
+            pw.println("  end");
 
             pw.println(crap);
             pw.println("endmodule");