reg [3:0] wait_until_write;
reg [3:0] wait_until_video;
reg [37:0] addr;
- wire [31:0] data_out;
+ wire [35:0] data_out;
reg [37:0] out_d;
reg [37:0] writeData;
assign data_out[29] = sram_d29; assign sram_d29 = oe ? 1'bz : writeData[29];
assign data_out[30] = sram_d30; assign sram_d30 = oe ? 1'bz : writeData[30];
assign data_out[31] = sram_d31; assign sram_d31 = oe ? 1'bz : writeData[31];
+ assign data_out[32] = sram_dqp0; assign sram_dqp0 = oe ? 1'bz : writeData[32];
+ assign data_out[33] = sram_dqp1; assign sram_dqp1 = oe ? 1'bz : writeData[33];
+ assign data_out[34] = sram_dqp2; assign sram_dqp2 = oe ? 1'bz : writeData[34];
+ assign data_out[35] = sram_dqp3; assign sram_dqp3 = oe ? 1'bz : writeData[35];
assign sram_mode = 0;
assign sram_clk = clk;
+ { 7'b0000000, y_coord[8:0], 5'b00000 }
+ { 3'b000, y_coord[8:0], 9'b0000000000 };
- assign dvi_red = on_screen ? mem_out[23:16] : 0;
- assign dvi_green = on_screen ? mem_out[15:8] : 0;
- assign dvi_blue = on_screen ? mem_out[7:0] : 0;
+ assign dvi_red = on_screen ? { mem_out[17:12], 2'b0 } : 0;
+ assign dvi_green = on_screen ? { mem_out[11:6], 2'b0 } : 0;
+ assign dvi_blue = on_screen ? { mem_out[5:0], 2'b0 } : 0;
always @(posedge pix_clk) begin
vga_pixel_addr <= vga_pixel_addr_;