import static edu.berkeley.fleet.fpga.verilog.Verilog.*;
-public class FpgaPath extends Path {
+public class FpgaPath extends FleetTwoPath {
private boolean[] path;
private FpgaDestination dest;
this.dest = dest;
}
+ public BitVector toBitVector() {
+ BitVector bv = new BitVector(((Fpga)dest.dock.getShip().getFleet()).PACKET_DEST.getWidth() +
+ ((Fpga)dest.dock.getShip().getFleet()).PACKET_SIGNAL.getWidth());
+ bv.set(toLong());
+ return bv;
+ }
public long toLong() {
long ret = 0;
for(int i=0; i<path.length; i++) {