better parenthesization in FpgaDock
authoradam <adam@megacz.com>
Sun, 16 Nov 2008 14:23:10 +0000 (15:23 +0100)
committeradam <adam@megacz.com>
Sun, 16 Nov 2008 14:23:10 +0000 (15:23 +0100)
src/edu/berkeley/fleet/fpga/FpgaDock.java

index b4f44cc..2fd0b6e 100644 (file)
@@ -218,12 +218,12 @@ public class FpgaDock extends FleetTwoDock implements FabricElement {
             String data_latch_input  = inbox ? data_in.getName() : data_in.getName();
 
             String magic_standing_value = "(1<<"+fpga.SET_ILC_FROM_IMMEDIATE.valmaskwidth+")";
-            String done_executing       = "(ilc==0 || ilc==1 || !"+fpga.MOVE.verilog(ondeck.getName())+")";
+            String done_executing       = "((ilc==0) || (ilc==1) || !"+fpga.MOVE.verilog(ondeck.getName())+")";
 
             String predicate_met = 
                 "("+
                 "("+
-                "!"+fpga.MOVE.verilog(ondeck.getName())+" || ilc!=0"+
+                "!"+fpga.MOVE.verilog(ondeck.getName())+" || (ilc!=0)"+
                 ") && ("+
                 "("+
                 fpga.P_ALWAYS.verilog(ondeck.getName())+