move serial port verilog files to mem directory

diff --git a/src/edu/berkeley/fleet/fpga/sasc_brg.v b/src/edu/berkeley/fleet/fpga/mem/sasc_brg.v
similarity index 100%
rename from src/edu/berkeley/fleet/fpga/sasc_brg.v
rename to src/edu/berkeley/fleet/fpga/mem/sasc_brg.v

diff --git a/src/edu/berkeley/fleet/fpga/sasc_fifo4.v b/src/edu/berkeley/fleet/fpga/mem/sasc_fifo4.v
similarity index 100%
rename from src/edu/berkeley/fleet/fpga/sasc_fifo4.v
rename to src/edu/berkeley/fleet/fpga/mem/sasc_fifo4.v

diff --git a/src/edu/berkeley/fleet/fpga/sasc_top.v b/src/edu/berkeley/fleet/fpga/mem/sasc_top.v
similarity index 100%
rename from src/edu/berkeley/fleet/fpga/sasc_top.v
rename to src/edu/berkeley/fleet/fpga/mem/sasc_top.v