From: simonmar Date: Mon, 15 May 2000 14:49:14 +0000 (+0000) Subject: [project @ 2000-05-15 14:49:14 by simonmar] X-Git-Tag: Approximately_9120_patches~4459 X-Git-Url: http://git.megacz.com/?a=commitdiff_plain;h=5394f0455fa206f9e418f1a6b52f2e2c0a4097e5;hp=703e1415ca2171c1a9a13a48a12d1649975e9161;p=ghc-hetmet.git [project @ 2000-05-15 14:49:14 by simonmar] fix bug in module initialization --- diff --git a/ghc/compiler/nativeGen/AbsCStixGen.lhs b/ghc/compiler/nativeGen/AbsCStixGen.lhs index b42f0b7..35649a1 100644 --- a/ghc/compiler/nativeGen/AbsCStixGen.lhs +++ b/ghc/compiler/nativeGen/AbsCStixGen.lhs @@ -44,10 +44,7 @@ import TyCon ( tyConDataCons ) import DataCon ( dataConWrapId ) import BitSet ( intBS ) import Name ( NamedThing(..) ) - -#ifdef REALLY_HASKELL_1_3 -ord = fromEnum :: Char -> Int -#endif +import Char ( ord ) \end{code} For each independent chunk of AbstractC code, we generate a list of @@ -160,8 +157,9 @@ Here we handle top-level things, like @CCodeBlock@s and : StData IntRep [StInt 0] : StSegment TextSegment : StLabel lbl - : StCondJump tmp_lbl (StPrim IntNeOp [StCLbl moduleRegdLabel, - StInt 0]) + : StCondJump tmp_lbl (StPrim IntNeOp + [StInd IntRep StCLbl moduleRegdLabel, + StInt 0]) : StAssign IntRep (StInd IntRep (StCLbl moduleRegdLabel)) (StInt 1) : code [ StLabel tmp_lbl