From: rkao Date: Mon, 22 Sep 2008 19:57:00 +0000 (+0000) Subject: add cfg, isolatedInDock.spi and isolatedInDock.xml for Adam X-Git-Url: http://git.megacz.com/?a=commitdiff_plain;h=55cffa1cff58bac31fe486c0215f7454d5614b71;p=fleet.git add cfg, isolatedInDock.spi and isolatedInDock.xml for Adam --- diff --git a/testCode/cfg b/testCode/cfg new file mode 100644 index 0000000..48ee78a --- /dev/null +++ b/testCode/cfg @@ -0,0 +1,11 @@ +set_sim_tres 10ps +set_sim_eou sim=3 model=3 net=3 +set_elem_acc *XhalfBit* *xcontRx* *xclockedrx* *xclk_regen* *xsimpleRx* *xrxc_offs* *xdutyrestore* +print_node_v * +free_ckt_db 99999999 +search_ckt_analog el=*xtx2rxcap* +set_fcap_param report=1 +set_analogfcap_param 0.01f 0.1f +set_analogrelfcap_param 0.0000001 0.000001 +set_tv_window start=5ns +set_mesg_opt limit_per_mesg=100 diff --git a/testCode/isolatedInDock.spi b/testCode/isolatedInDock.spi new file mode 100644 index 0000000..dfe8ffa --- /dev/null +++ b/testCode/isolatedInDock.spi @@ -0,0 +1,2009 @@ +*** SPICE deck for cell isolatedInDock{sch} from library marina +*** Created on Fri Sep 05, 2008 15:05:59 +*** Last revised on Thu Sep 11, 2008 14:57:39 +*** Written on Thu Sep 11, 2008 15:43:10 by Electric VLSI Design System, +*version 8.08e +*** Layout tech: cmos90, foundry TSMC +*** UC SPICE *** , MIN_RESIST 50.0, MIN_CAPAC 0.04FF +.OPTIONS NOMOD NOPAGE +* Model cards are described in this file: +.include '../testCode/header.hsp' + +*** CELL: orangeTSMC090nm:NMOSx{sch} +.SUBCKT NMOSx-X_70 d g s +MNMOSf@0 d g s gnd nch W='210*(1+ABN/sqrt(210*2))' L='2' ++DELVTO='AVT0N/sqrt(210*2)' +.ENDS NMOSx-X_70 + +*** CELL: orangeTSMC090nm:PMOSx{sch} +.SUBCKT PMOSx-X_70 d g s +MPMOSf@0 d g s vdd pch W='420*(1+ABP/sqrt(420*2))' L='2' ++DELVTO='AVT0P/sqrt(420*2)' +.ENDS PMOSx-X_70 + +*** CELL: redFour:inv{sch} +.SUBCKT inv-X_70 in out +XNMOS@0 out in gnd NMOSx-X_70 +XPMOS@0 out in vdd PMOSx-X_70 +.ENDS inv-X_70 + +*** CELL: orangeTSMC090nm:PMOSx{sch} +.SUBCKT PMOSx-X_30 d g s +MPMOSf@0 d g s vdd pch W='180*(1+ABP/sqrt(180*2))' L='2' ++DELVTO='AVT0P/sqrt(180*2)' +.ENDS PMOSx-X_30 + +*** CELL: orangeTSMC090nm:NMOSx{sch} +.SUBCKT NMOSx-X_30 d g s +MNMOSf@0 d g s gnd nch W='90*(1+ABN/sqrt(90*2))' L='2' ++DELVTO='AVT0N/sqrt(90*2)' +.ENDS NMOSx-X_30 + +*** CELL: redFour:nms2{sch} +.SUBCKT nms2-X_15 d g g2 +XNMOS@0 d g2 net@0 NMOSx-X_30 +XNMOS@1 net@0 g gnd NMOSx-X_30 +.ENDS nms2-X_15 + +*** CELL: redFour:nms2_sy{sch} +.SUBCKT nms2_sy-X_30 d g g2 +Xnms2@0 d g g2 nms2-X_15 +Xnms2@1 d g2 g nms2-X_15 +.ENDS nms2_sy-X_30 + +*** CELL: redFour:nand2_sy{sch} +.SUBCKT nand2_sy-X_30 ina inb out +XPMOS@0 out inb vdd PMOSx-X_30 +XPMOS@1 out ina vdd PMOSx-X_30 +Xnms2_sy@0 out ina inb nms2_sy-X_30 +.ENDS nand2_sy-X_30 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-947_7-R_34_667m a b +Ccap@0 gnd net@14 3.475f +Ccap@1 gnd net@8 3.475f +Ccap@2 gnd net@11 3.475f +Rres@0 net@14 a 5.476 +Rres@1 net@11 net@14 10.951 +Rres@2 b net@8 5.476 +Rres@3 net@8 net@11 10.951 +.ENDS wire-C_0_011f-947_7-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-947_7-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-947_7-R_34_667m +.ENDS wire90-947_7-layer_1-width_3 + +*** CELL: driversJ:dataDriver70{sch} +.SUBCKT dataDriver70 inA inB out +Xinv@0 net@8 out inv-X_70 +Xnand2_sy@0 inA inB net@7 nand2_sy-X_30 +Xwire90@0 net@7 net@8 wire90-947_7-layer_1-width_3 +.ENDS dataDriver70 + +*** CELL: orangeTSMC090nm:NMOSx{sch} +.SUBCKT NMOSx-X_1_733 d g s +MNMOSf@0 d g s gnd nch W='5.199*(1+ABN/sqrt(5.199*2))' L='2' ++DELVTO='AVT0N/sqrt(5.199*2)' +.ENDS NMOSx-X_1_733 + +*** CELL: orangeTSMC090nm:PMOSx{sch} +.SUBCKT PMOSx-X_4 d g s +MPMOSf@0 d g s vdd pch W='24*(1+ABP/sqrt(24*2))' L='2' ++DELVTO='AVT0P/sqrt(24*2)' +.ENDS PMOSx-X_4 + +*** CELL: orangeTSMC090nm:PMOSx{sch} +.SUBCKT PMOSx-X_1 d g s +MPMOSf@0 d g s vdd pch W='6*(1+ABP/sqrt(6*2))' L='2' ++DELVTO='AVT0P/sqrt(6*2)' +.ENDS PMOSx-X_1 + +*** CELL: latchPartsK:latchKeep{sch} +.SUBCKT latchKeep out[B] out[s] +XNMOSx@0 out[B] out[s] gnd NMOSx-X_1_733 +XNMOSx@1 out[s] out[B] gnd NMOSx-X_1_733 +XPMOSx@0 out[B] out[s] vdd PMOSx-X_4 +XPMOSx@1 out[s] out[B] vdd PMOSx-X_1 +.ENDS latchKeep + +*** CELL: orangeTSMC090nm:NMOSx{sch} +.SUBCKT NMOSx-X_3 d g s +MNMOSf@0 d g s gnd nch W='9*(1+ABN/sqrt(9*2))' L='2' DELVTO='AVT0N/sqrt(9*2)' +.ENDS NMOSx-X_3 + +*** CELL: orangeTSMC090nm:NMOSx{sch} +.SUBCKT NMOSx-X_6 d g s +MNMOSf@0 d g s gnd nch W='18*(1+ABN/sqrt(18*2))' L='2' ++DELVTO='AVT0N/sqrt(18*2)' +.ENDS NMOSx-X_6 + +*** CELL: orangeTSMC090nm:NMOSx{sch} +.SUBCKT NMOSx-X_10 d g s +MNMOSf@0 d g s gnd nch W='30*(1+ABN/sqrt(30*2))' L='2' ++DELVTO='AVT0N/sqrt(30*2)' +.ENDS NMOSx-X_10 + +*** CELL: orangeTSMC090nm:PMOSx{sch} +.SUBCKT PMOSx-X_5 d g s +MPMOSf@0 d g s vdd pch W='30*(1+ABP/sqrt(30*2))' L='2' ++DELVTO='AVT0P/sqrt(30*2)' +.ENDS PMOSx-X_5 + +*** CELL: redFour:invLT{sch} +.SUBCKT invLT-X_5 in out +XNMOS@0 out in gnd NMOSx-X_10 +XPMOS@0 out in vdd PMOSx-X_5 +.ENDS invLT-X_5 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-124_4-R_34_667m a b +Ccap@0 gnd net@14 0.456f +Ccap@1 gnd net@8 0.456f +Ccap@2 gnd net@11 0.456f +Rres@0 net@14 a 0.719 +Rres@1 net@11 net@14 1.438 +Rres@2 b net@8 0.719 +Rres@3 net@8 net@11 1.438 +.ENDS wire-C_0_011f-124_4-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-124_4-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-124_4-R_34_667m +.ENDS wire90-124_4-layer_1-width_3 + +*** CELL: latchPartsK:latchPointF{sch} +.SUBCKT latchPointF hcl in[1] x[F] x[T] +XPMOSx@0 in[1] hcl x[T] NMOSx-X_3 +XPMOSx@1 net@8 hcl x[F] NMOSx-X_6 +Xinv@0 in[1] net@105 invLT-X_5 +Xwire90@0 net@105 net@8 wire90-124_4-layer_1-width_3 +.ENDS latchPointF + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-146_1-R_34_667m a b +Ccap@0 gnd net@14 0.536f +Ccap@1 gnd net@8 0.536f +Ccap@2 gnd net@11 0.536f +Rres@0 net@14 a 0.844 +Rres@1 net@11 net@14 1.688 +Rres@2 b net@8 0.844 +Rres@3 net@8 net@11 1.688 +.ENDS wire-C_0_011f-146_1-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-146_1-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-146_1-R_34_667m +.ENDS wire90-146_1-layer_1-width_3 + +*** CELL: latchesK:raw1inLatchF{sch} +.SUBCKT raw1inLatchF hcl in[1] out[F] +XlatchFlo@0 out[F] net@58 latchKeep +XlatchPoi@0 hcl in[1] out[F] net@45 latchPointF +Xwire90@0 net@45 net@58 wire90-146_1-layer_1-width_3 +.ENDS raw1inLatchF + +*** CELL: orangeTSMC090nm:NMOSx{sch} +.SUBCKT NMOSx-X_20 d g s +MNMOSf@0 d g s gnd nch W='60*(1+ABN/sqrt(60*2))' L='2' ++DELVTO='AVT0N/sqrt(60*2)' +.ENDS NMOSx-X_20 + +*** CELL: orangeTSMC090nm:PMOSx{sch} +.SUBCKT PMOSx-X_20 d g s +MPMOSf@0 d g s vdd pch W='120*(1+ABP/sqrt(120*2))' L='2' ++DELVTO='AVT0P/sqrt(120*2)' +.ENDS PMOSx-X_20 + +*** CELL: redFour:inv{sch} +.SUBCKT inv-X_20 in out +XNMOS@0 out in gnd NMOSx-X_20 +XPMOS@0 out in vdd PMOSx-X_20 +.ENDS inv-X_20 + +*** CELL: orangeTSMC090nm:NMOSx{sch} +.SUBCKT NMOSx-X_60 d g s +MNMOSf@0 d g s gnd nch W='180*(1+ABN/sqrt(180*2))' L='2' ++DELVTO='AVT0N/sqrt(180*2)' +.ENDS NMOSx-X_60 + +*** CELL: orangeTSMC090nm:PMOSx{sch} +.SUBCKT PMOSx-X_60 d g s +MPMOSf@0 d g s vdd pch W='360*(1+ABP/sqrt(360*2))' L='2' ++DELVTO='AVT0P/sqrt(360*2)' +.ENDS PMOSx-X_60 + +*** CELL: redFour:inv{sch} +.SUBCKT inv-X_60 in out +XNMOS@0 out in gnd NMOSx-X_60 +XPMOS@0 out in vdd PMOSx-X_60 +.ENDS inv-X_60 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-294_8-R_34_667m a b +Ccap@0 gnd net@14 1.081f +Ccap@1 gnd net@8 1.081f +Ccap@2 gnd net@11 1.081f +Rres@0 net@14 a 1.703 +Rres@1 net@11 net@14 3.407 +Rres@2 b net@8 1.703 +Rres@3 net@8 net@11 3.407 +.ENDS wire-C_0_011f-294_8-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-294_8-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-294_8-R_34_667m +.ENDS wire90-294_8-layer_1-width_3 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-242_1-R_34_667m a b +Ccap@0 gnd net@14 0.888f +Ccap@1 gnd net@8 0.888f +Ccap@2 gnd net@11 0.888f +Rres@0 net@14 a 1.399 +Rres@1 net@11 net@14 2.798 +Rres@2 b net@8 1.399 +Rres@3 net@8 net@11 2.798 +.ENDS wire-C_0_011f-242_1-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-242_1-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-242_1-R_34_667m +.ENDS wire90-242_1-layer_1-width_3 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-546_2-R_34_667m a b +Ccap@0 gnd net@14 2.003f +Ccap@1 gnd net@8 2.003f +Ccap@2 gnd net@11 2.003f +Rres@0 net@14 a 3.156 +Rres@1 net@11 net@14 6.312 +Rres@2 b net@8 3.156 +Rres@3 net@8 net@11 6.312 +.ENDS wire-C_0_011f-546_2-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-546_2-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-546_2-R_34_667m +.ENDS wire90-546_2-layer_1-width_3 + +*** CELL: latchesK:latch1in60C{sch} +.SUBCKT latch1in60C hcl inS[1] outS[1] +Xhi2inLat@0 hcl inS[1] net@14 raw1inLatchF +XinvLT@0 net@15 net@18 invLT-X_5 +XinvLT@1 net@16 net@19 inv-X_20 +XinvLT@2 net@17 outS[1] inv-X_60 +Xwire90@0 net@14 net@15 wire90-294_8-layer_1-width_3 +Xwire90@1 net@18 net@16 wire90-242_1-layer_1-width_3 +Xwire90@2 net@19 net@17 wire90-546_2-layer_1-width_3 +.ENDS latch1in60C + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-2565-R_26m a b +Ccap@0 gnd net@14 9.405f +Ccap@1 gnd net@8 9.405f +Ccap@2 gnd net@11 9.405f +Rres@0 net@14 a 11.115 +Rres@1 net@11 net@14 22.23 +Rres@2 b net@8 11.115 +Rres@3 net@8 net@11 22.23 +.ENDS wire-C_0_011f-2565-R_26m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-2565-layer_1-width_4 a b +Xwire@0 a b wire-C_0_011f-2565-R_26m +.ENDS wire90-2565-layer_1-width_4 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-834-R_26m a b +Ccap@0 gnd net@14 3.058f +Ccap@1 gnd net@8 3.058f +Ccap@2 gnd net@11 3.058f +Rres@0 net@14 a 3.614 +Rres@1 net@11 net@14 7.228 +Rres@2 b net@8 3.614 +Rres@3 net@8 net@11 7.228 +.ENDS wire-C_0_011f-834-R_26m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-834-layer_1-width_4 a b +Xwire@0 a b wire-C_0_011f-834-R_26m +.ENDS wire90-834-layer_1-width_4 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-2791-R_26m a b +Ccap@0 gnd net@14 10.234f +Ccap@1 gnd net@8 10.234f +Ccap@2 gnd net@11 10.234f +Rres@0 net@14 a 12.094 +Rres@1 net@11 net@14 24.189 +Rres@2 b net@8 12.094 +Rres@3 net@8 net@11 24.189 +.ENDS wire-C_0_011f-2791-R_26m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-2791-layer_1-width_4 a b +Xwire@0 a b wire-C_0_011f-2791-R_26m +.ENDS wire90-2791-layer_1-width_4 + +*** CELL: registersJ:all1in52{sch} +.SUBCKT all1in52 ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] ain[3] ++ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] aout[10] aout[11] aout[12] ++aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] aout[7] ++aout[8] aout[9] aout[T] fire in[10] in[11] in[12] in[13] in[14] in[15] in[16] ++in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] ++in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] ++in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] out[12] ++out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] out[20] ++out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] out[29] ++out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] out[37] out[3] ++out[4] out[5] out[6] out[7] out[8] out[9] +XdataDriv@0 ain[T] net@90 net@81 dataDriver70 +XhiL[1] net@41 in[1] out[1] latch1in60C +XhiL[2] net@41 in[2] out[2] latch1in60C +XhiL[3] net@41 in[3] out[3] latch1in60C +XhiL[4] net@41 in[4] out[4] latch1in60C +XhiL[5] net@41 in[5] out[5] latch1in60C +XhiL[6] net@41 in[6] out[6] latch1in60C +XhiL[7] net@41 in[7] out[7] latch1in60C +XhiL[8] net@41 in[8] out[8] latch1in60C +XhiL[9] net@41 in[9] out[9] latch1in60C +XhiL[10] net@41 in[10] out[10] latch1in60C +XhiL[11] net@41 in[11] out[11] latch1in60C +XhiL[12] net@41 in[12] out[12] latch1in60C +XhiL[13] net@41 in[13] out[13] latch1in60C +XhiL[14] net@41 in[14] out[14] latch1in60C +XhiL[15] net@41 in[15] out[15] latch1in60C +XhiL[16] net@41 in[16] out[16] latch1in60C +XhiL[17] net@41 in[17] out[17] latch1in60C +XhiL[18] net@41 in[18] out[18] latch1in60C +XhiL[19] net@41 in[19] out[19] latch1in60C +XhiL[20] net@41 in[20] out[20] latch1in60C +XhiL[21] net@41 in[21] out[21] latch1in60C +XhiL[22] net@41 in[22] out[22] latch1in60C +XhiL[23] net@41 in[23] out[23] latch1in60C +XhiL[24] net@41 in[24] out[24] latch1in60C +XhiL[25] net@41 in[25] out[25] latch1in60C +XhiL[26] net@41 in[26] out[26] latch1in60C +XhiL[27] net@41 in[27] out[27] latch1in60C +XhiL[28] net@41 in[28] out[28] latch1in60C +XhiL[29] net@41 in[29] out[29] latch1in60C +XhiL[30] net@41 in[30] out[30] latch1in60C +XhiL[31] net@41 in[31] out[31] latch1in60C +XhiL[32] net@41 in[32] out[32] latch1in60C +XhiL[33] net@41 in[33] out[33] latch1in60C +XhiL[34] net@41 in[34] out[34] latch1in60C +XhiL[35] net@41 in[35] out[35] latch1in60C +XhiL[36] net@41 in[36] out[36] latch1in60C +XhiL[37] net@41 in[37] out[37] latch1in60C +Xlat[1] net@98 ain[1] aout[1] latch1in60C +Xlat[2] net@98 ain[2] aout[2] latch1in60C +Xlat[3] net@98 ain[3] aout[3] latch1in60C +Xlat[4] net@98 ain[4] aout[4] latch1in60C +Xlat[5] net@98 ain[5] aout[5] latch1in60C +Xlat[6] net@98 ain[6] aout[6] latch1in60C +Xlat[7] net@98 ain[7] aout[7] latch1in60C +Xlat[8] net@98 ain[8] aout[8] latch1in60C +Xlat[9] net@98 ain[9] aout[9] latch1in60C +Xlat[10] net@98 ain[10] aout[10] latch1in60C +Xlat[11] net@98 ain[11] aout[11] latch1in60C +Xlat[12] net@98 ain[12] aout[12] latch1in60C +Xlat[13] net@98 ain[13] aout[13] latch1in60C +Xlat[14] net@98 ain[14] aout[14] latch1in60C +Xlatch1in@0 net@90 ain[T] aout[T] latch1in60C +Xwire90@0 net@81 net@41 wire90-2565-layer_1-width_4 +Xwire90@1 net@81 net@41 wire90-2565-layer_1-width_4 +Xwire90@2 fire net@98 wire90-834-layer_1-width_4 +Xwire90@3 net@98 net@90 wire90-2791-layer_1-width_4 +.ENDS all1in52 + +*** CELL: orangeTSMC090nm:PMOSx{sch} +.SUBCKT PMOSx-X_10 d g s +MPMOSf@0 d g s vdd pch W='60*(1+ABP/sqrt(60*2))' L='2' ++DELVTO='AVT0P/sqrt(60*2)' +.ENDS PMOSx-X_10 + +*** CELL: orangeTSMC090nm:PMOSx{sch} +.SUBCKT PMOSx-X_25 d g s +MPMOSf@0 d g s vdd pch W='150*(1+ABP/sqrt(150*2))' L='2' ++DELVTO='AVT0P/sqrt(150*2)' +.ENDS PMOSx-X_25 + +*** CELL: orangeTSMC090nm:NMOSx{sch} +.SUBCKT NMOSx-X_50 d g s +MNMOSf@0 d g s gnd nch W='150*(1+ABN/sqrt(150*2))' L='2' ++DELVTO='AVT0N/sqrt(150*2)' +.ENDS NMOSx-X_50 + +*** CELL: redFour:nms2{sch} +.SUBCKT nms2-X_25 d g g2 +XNMOS@0 d g2 net@0 NMOSx-X_50 +XNMOS@1 net@0 g gnd NMOSx-X_50 +.ENDS nms2-X_25 + +*** CELL: redFour:nand2{sch} +.SUBCKT nand2-X_25 ina inb out +XPMOS@0 out ina vdd PMOSx-X_25 +XPMOS@1 out inb vdd PMOSx-X_25 +Xnms2@0 out ina inb nms2-X_25 +.ENDS nand2-X_25 + +*** CELL: arbiterJ:halfArb{sch} +.SUBCKT halfArb cross grant[B] inA req[B] +XNMOSx@0 vdd req[B] grant[B] PMOSx-X_10 +XPMOSx@0 cross inA grant[B] NMOSx-X_10 +Xnor2n@0 inA req[B] cross nand2-X_25 +.ENDS halfArb + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-853_7-R_34_667m a b +Ccap@0 gnd net@14 3.13f +Ccap@1 gnd net@8 3.13f +Ccap@2 gnd net@11 3.13f +Rres@0 net@14 a 4.932 +Rres@1 net@11 net@14 9.865 +Rres@2 b net@8 4.932 +Rres@3 net@8 net@11 9.865 +.ENDS wire-C_0_011f-853_7-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-853_7-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-853_7-R_34_667m +.ENDS wire90-853_7-layer_1-width_3 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-857_6-R_34_667m a b +Ccap@0 gnd net@14 3.145f +Ccap@1 gnd net@8 3.145f +Ccap@2 gnd net@11 3.145f +Rres@0 net@14 a 4.955 +Rres@1 net@11 net@14 9.91 +Rres@2 b net@8 4.955 +Rres@3 net@8 net@11 9.91 +.ENDS wire-C_0_011f-857_6-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-857_6-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-857_6-R_34_667m +.ENDS wire90-857_6-layer_1-width_3 + +*** CELL: arbiterJ:arbiterH{sch} +.SUBCKT arbiterH grant[A] grant[B] req[A] req[B] +XhalfArb@0 net@12 grant[A] net@5 req[A] halfArb +XhalfArb@1 net@13 grant[B] net@8 req[B] halfArb +Xwire90@0 net@12 net@8 wire90-853_7-layer_1-width_3 +Xwire90@1 net@5 net@13 wire90-857_6-layer_1-width_3 +.ENDS arbiterH + +*** CELL: orangeTSMC090nm:NMOSx{sch} +.SUBCKT NMOSx-X_100 d g s +MNMOSf@0 d g s gnd nch W='300*(1+ABN/sqrt(300*2))' L='2' ++DELVTO='AVT0N/sqrt(300*2)' +.ENDS NMOSx-X_100 + +*** CELL: orangeTSMC090nm:PMOSx{sch} +.SUBCKT PMOSx-X_100 d g s +MPMOSf@0 d g s vdd pch W='600*(1+ABP/sqrt(600*2))' L='2' ++DELVTO='AVT0P/sqrt(600*2)' +.ENDS PMOSx-X_100 + +*** CELL: redFour:inv{sch} +.SUBCKT inv-X_100 in out +XNMOS@0 out in gnd NMOSx-X_100 +XPMOS@0 out in vdd PMOSx-X_100 +.ENDS inv-X_100 + +*** CELL: orangeTSMC090nm:PMOSx{sch} +.SUBCKT PMOSx-X_40 d g s +MPMOSf@0 d g s vdd pch W='240*(1+ABP/sqrt(240*2))' L='2' ++DELVTO='AVT0P/sqrt(240*2)' +.ENDS PMOSx-X_40 + +*** CELL: orangeTSMC090nm:NMOSx{sch} +.SUBCKT NMOSx-X_40 d g s +MNMOSf@0 d g s gnd nch W='120*(1+ABN/sqrt(120*2))' L='2' ++DELVTO='AVT0N/sqrt(120*2)' +.ENDS NMOSx-X_40 + +*** CELL: redFour:nms2{sch} +.SUBCKT nms2-X_20 d g g2 +XNMOS@0 d g2 net@0 NMOSx-X_40 +XNMOS@1 net@0 g gnd NMOSx-X_40 +.ENDS nms2-X_20 + +*** CELL: redFour:nms2_sy{sch} +.SUBCKT nms2_sy-X_40 d g g2 +Xnms2@0 d g g2 nms2-X_20 +Xnms2@1 d g2 g nms2-X_20 +.ENDS nms2_sy-X_40 + +*** CELL: redFour:nand2_sy{sch} +.SUBCKT nand2_sy-X_40 ina inb out +XPMOS@0 out inb vdd PMOSx-X_40 +XPMOS@1 out ina vdd PMOSx-X_40 +Xnms2_sy@0 out ina inb nms2_sy-X_40 +.ENDS nand2_sy-X_40 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-414-R_34_667m a b +Ccap@0 gnd net@14 1.518f +Ccap@1 gnd net@8 1.518f +Ccap@2 gnd net@11 1.518f +Rres@0 net@14 a 2.392 +Rres@1 net@11 net@14 4.784 +Rres@2 b net@8 2.392 +Rres@3 net@8 net@11 4.784 +.ENDS wire-C_0_011f-414-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-414-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-414-R_34_667m +.ENDS wire90-414-layer_1-width_3 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-927-R_34_667m a b +Ccap@0 gnd net@14 3.399f +Ccap@1 gnd net@8 3.399f +Ccap@2 gnd net@11 3.399f +Rres@0 net@14 a 5.356 +Rres@1 net@11 net@14 10.712 +Rres@2 b net@8 5.356 +Rres@3 net@8 net@11 10.712 +.ENDS wire-C_0_011f-927-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-927-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-927-R_34_667m +.ENDS wire90-927-layer_1-width_3 + +*** CELL: centersJ:ctrAND2in100{sch} +.SUBCKT ctrAND2in100 inA inB out +Xinv@5 net@146 out inv-X_100 +Xinv@6 inB net@135 inv-X_20 +Xinv@7 inA net@139 inv-X_20 +Xnand2_sy@1 net@140 net@136 net@144 nand2_sy-X_40 +Xwire90@4 net@135 net@136 wire90-414-layer_1-width_3 +Xwire90@5 net@144 net@146 wire90-927-layer_1-width_3 +Xwire90@6 net@139 net@140 wire90-414-layer_1-width_3 +.ENDS ctrAND2in100 + +*** CELL: redFour:inv{sch} +.SUBCKT inv-X_10 in out +XNMOS@0 out in gnd NMOSx-X_10 +XPMOS@0 out in vdd PMOSx-X_10 +.ENDS inv-X_10 + +*** CELL: orangeTSMC090nm:PMOSx{sch} +.SUBCKT PMOSx-X_9_999 d g s +MPMOSf@0 d g s vdd pch W='59.994*(1+ABP/sqrt(59.994*2))' L='2' ++DELVTO='AVT0P/sqrt(59.994*2)' +.ENDS PMOSx-X_9_999 + +*** CELL: redFour:pms3{sch} +.SUBCKT pms3-X_3_333 d g g2 g3 +XPMOS@0 d g3 net@2 PMOSx-X_9_999 +XPMOS@1 net@2 g2 net@5 PMOSx-X_9_999 +XPMOS@2 net@5 g vdd PMOSx-X_9_999 +.ENDS pms3-X_3_333 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-243_6-R_34_667m a b +Ccap@0 gnd net@14 0.893f +Ccap@1 gnd net@8 0.893f +Ccap@2 gnd net@11 0.893f +Rres@0 net@14 a 1.407 +Rres@1 net@11 net@14 2.815 +Rres@2 b net@8 1.407 +Rres@3 net@8 net@11 2.815 +.ENDS wire-C_0_011f-243_6-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-243_6-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-243_6-R_34_667m +.ENDS wire90-243_6-layer_1-width_3 + +*** CELL: driversJ:predDri60wMC{sch} +.SUBCKT predDri60wMC in mc pred +XNMOSx@0 pred in gnd NMOSx-X_60 +XNMOSx@1 pred mc gnd NMOSx-X_10 +Xinv@0 pred net@145 inv-X_10 +Xpms3@0 pred mc in net@174 pms3-X_3_333 +Xwire90@0 net@174 net@145 wire90-243_6-layer_1-width_3 +.ENDS predDri60wMC + +*** CELL: redFour:invLT{sch} +.SUBCKT invLT-X_10 in out +XNMOS@0 out in gnd NMOSx-X_20 +XPMOS@0 out in vdd PMOSx-X_10 +.ENDS invLT-X_10 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-282-R_34_667m a b +Ccap@0 gnd net@14 1.034f +Ccap@1 gnd net@8 1.034f +Ccap@2 gnd net@11 1.034f +Rres@0 net@14 a 1.629 +Rres@1 net@11 net@14 3.259 +Rres@2 b net@8 1.629 +Rres@3 net@8 net@11 3.259 +.ENDS wire-C_0_011f-282-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-282-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-282-R_34_667m +.ENDS wire90-282-layer_1-width_3 + +*** CELL: latchesK:latch1in10A{sch} +.SUBCKT latch1in10A hcl in[1] out[1] +Xhi2inLat@0 hcl in[1] net@19 raw1inLatchF +XinvLT@0 net@18 out[1] invLT-X_10 +Xwire90@0 net@19 net@18 wire90-282-layer_1-width_3 +.ENDS latch1in10A + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-145_9-R_34_667m a b +Ccap@0 gnd net@14 0.535f +Ccap@1 gnd net@8 0.535f +Ccap@2 gnd net@11 0.535f +Rres@0 net@14 a 0.843 +Rres@1 net@11 net@14 1.686 +Rres@2 b net@8 0.843 +Rres@3 net@8 net@11 1.686 +.ENDS wire-C_0_011f-145_9-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-145_9-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-145_9-R_34_667m +.ENDS wire90-145_9-layer_1-width_3 + +*** CELL: latchesK:raw2inLatchF{sch} +.SUBCKT raw2inLatchF hcl[A] hcl[B] inA[1] inB[1] out[F] +XlatchKee@0 out[F] net@63 latchKeep +XlatchPoi@0 hcl[A] inA[1] out[F] net@45 latchPointF +XlatchPoi@1 hcl[B] inB[1] out[F] net@45 latchPointF +Xwire90@0 net@45 net@63 wire90-145_9-layer_1-width_3 +.ENDS raw2inLatchF + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-311_7-R_34_667m a b +Ccap@0 gnd net@14 1.143f +Ccap@1 gnd net@8 1.143f +Ccap@2 gnd net@11 1.143f +Rres@0 net@14 a 1.801 +Rres@1 net@11 net@14 3.602 +Rres@2 b net@8 1.801 +Rres@3 net@8 net@11 3.602 +.ENDS wire-C_0_011f-311_7-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-311_7-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-311_7-R_34_667m +.ENDS wire90-311_7-layer_1-width_3 + +*** CELL: latchesK:latch2in10Alo{sch} +.SUBCKT latch2in10Alo hcl[A] hcl[B] inA[1] inB[1] out[1] +Xhi2inLat@0 hcl[A] hcl[B] inA[1] inB[1] dataBar raw2inLatchF +XinvLT@0 net@15 out[1] invLT-X_10 +Xwire90@0 dataBar net@15 wire90-311_7-layer_1-width_3 +.ENDS latch2in10Alo + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-218_4-R_34_667m a b +Ccap@0 gnd net@14 0.801f +Ccap@1 gnd net@8 0.801f +Ccap@2 gnd net@11 0.801f +Rres@0 net@14 a 1.262 +Rres@1 net@11 net@14 2.524 +Rres@2 b net@8 1.262 +Rres@3 net@8 net@11 2.524 +.ENDS wire-C_0_011f-218_4-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-218_4-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-218_4-R_34_667m +.ENDS wire90-218_4-layer_1-width_3 + +*** CELL: scanJ:scanCellE{sch} +.SUBCKT scanCellE dIn[1] p1p p2p rd sin sout +Xlatch1in@0 p2p sin net@2 latch1in10A +Xlatch2in@0 p1p rd net@10 dIn[1] sout latch2in10Alo +Xwire90@0 net@2 net@10 wire90-218_4-layer_1-width_3 +.ENDS scanCellE + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-297_6-R_34_667m a b +Ccap@0 gnd net@14 1.091f +Ccap@1 gnd net@8 1.091f +Ccap@2 gnd net@11 1.091f +Rres@0 net@14 a 1.719 +Rres@1 net@11 net@14 3.439 +Rres@2 b net@8 1.719 +Rres@3 net@8 net@11 3.439 +.ENDS wire-C_0_011f-297_6-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-297_6-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-297_6-R_34_667m +.ENDS wire90-297_6-layer_1-width_3 + +*** CELL: scanJ:scanEx2vert{sch} +.SUBCKT scanEx2vert dIn[1] dIn[2] mc sir[1] sir[2] sir[3] sir[4] sir[5] ++sir[6] sir[7] sir[8] sor[1] +XscanCell@1 dIn[1] sir[3] sir[2] sir[5] sir[1] net@26 scanCellE +XscanCell@2 dIn[2] sir[3] sir[2] sir[5] net@27 sor[1] scanCellE +Xwire90@0 net@26 net@27 wire90-297_6-layer_1-width_3 +.ENDS scanEx2vert + +*** CELL: latchPartsK:latchPointFmcHI{sch} +.SUBCKT latchPointFmcHI mc x[F] x[T] +XPMOSx@0 gnd mc x[T] NMOSx-X_3 +XPMOSx@1 vdd mc x[F] NMOSx-X_6 +.ENDS latchPointFmcHI + +*** CELL: latchesK:raw2inLatchFmc{sch} +.SUBCKT raw2inLatchFmc hcl inA[1] mc out[F] +XlatchKee@0 out[F] net@63 latchKeep +XlatchPoi@0 hcl inA[1] out[F] net@45 latchPointF +XlatchPoi@1 mc out[F] net@45 latchPointFmcHI +Xwire90@0 net@45 net@63 wire90-145_9-layer_1-width_3 +.ENDS raw2inLatchFmc + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-283-R_34_667m a b +Ccap@0 gnd net@14 1.038f +Ccap@1 gnd net@8 1.038f +Ccap@2 gnd net@11 1.038f +Rres@0 net@14 a 1.635 +Rres@1 net@11 net@14 3.27 +Rres@2 b net@8 1.635 +Rres@3 net@8 net@11 3.27 +.ENDS wire-C_0_011f-283-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-283-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-283-R_34_667m +.ENDS wire90-283-layer_1-width_3 + +*** CELL: latchesK:latch2in10Alomc{sch} +.SUBCKT latch2in10Alomc hcl inA[1] mc out[1] +Xhi2inLat@0 hcl inA[1] mc dataBar raw2inLatchFmc +XinvLT@0 net@20 out[1] invLT-X_10 +Xwire90@0 dataBar net@20 wire90-283-layer_1-width_3 +.ENDS latch2in10Alomc + +*** CELL: scanJ:scanCellF{sch} +.SUBCKT scanCellF dout[1] mc p1p p2p rd sin sout wr +Xlatch1in@0 p2p sin net@2 latch1in10A +Xlatch2in@0 p1p rd net@10 dout[1] sout latch2in10Alo +Xlatch2in@1 wr sout mc dout[1] latch2in10Alomc +Xwire90@0 net@2 net@10 wire90-297_6-layer_1-width_3 +.ENDS scanCellF + +*** CELL: scanJ:scanFx3hor{sch} +.SUBCKT scanFx3hor dout[1] dout[2] dout[3] sic[1] sic[2] sic[3] sic[4] sic[5] ++sic[6] sic[7] sic[8] sic[9] soc[1] +XscanCell@1 dout[2] sic[9] sic[3] sic[2] sic[5] net@32 net@31 sic[4] ++scanCellF +XscanCell@2 dout[1] sic[9] sic[3] sic[2] sic[5] sic[1] net@30 sic[4] ++scanCellF +XscanCell@3 dout[3] sic[9] sic[3] sic[2] sic[5] net@33 soc[1] sic[4] ++scanCellF +Xwire90@0 net@30 net@32 wire90-297_6-layer_1-width_3 +Xwire90@1 net@31 net@33 wire90-297_6-layer_1-width_3 +.ENDS scanFx3hor + +*** CELL: orangeTSMC090nm:NMOSx{sch} +.SUBCKT NMOSx-X_5 d g s +MNMOSf@0 d g s gnd nch W='15*(1+ABN/sqrt(15*2))' L='2' ++DELVTO='AVT0N/sqrt(15*2)' +.ENDS NMOSx-X_5 + +*** CELL: redFour:inv{sch} +.SUBCKT inv-X_5 in out +XNMOS@0 out in gnd NMOSx-X_5 +XPMOS@0 out in vdd PMOSx-X_5 +.ENDS inv-X_5 + +*** CELL: orangeTSMC090nm:NMOSx{sch} +.SUBCKT NMOSx-X_16 d g s +MNMOSf@0 d g s gnd nch W='48*(1+ABN/sqrt(48*2))' L='2' ++DELVTO='AVT0N/sqrt(48*2)' +.ENDS NMOSx-X_16 + +*** CELL: redFour:nms2{sch} +.SUBCKT nms2-X_8 d g g2 +XNMOS@0 d g2 net@0 NMOSx-X_16 +XNMOS@1 net@0 g gnd NMOSx-X_16 +.ENDS nms2-X_8 + +*** CELL: redFour:nms2{sch} +.SUBCKT nms2-X_10 d g g2 +XNMOS@0 d g2 net@0 NMOSx-X_20 +XNMOS@1 net@0 g gnd NMOSx-X_20 +.ENDS nms2-X_10 + +*** CELL: redFour:nms2_sy{sch} +.SUBCKT nms2_sy-X_20 d g g2 +Xnms2@0 d g g2 nms2-X_10 +Xnms2@1 d g2 g nms2-X_10 +.ENDS nms2_sy-X_20 + +*** CELL: redFour:nand2_sy{sch} +.SUBCKT nand2_sy-X_20 ina inb out +XPMOS@0 out inb vdd PMOSx-X_20 +XPMOS@1 out ina vdd PMOSx-X_20 +Xnms2_sy@0 out ina inb nms2_sy-X_20 +.ENDS nand2_sy-X_20 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-627_9-R_34_667m a b +Ccap@0 gnd net@14 2.302f +Ccap@1 gnd net@8 2.302f +Ccap@2 gnd net@11 2.302f +Rres@0 net@14 a 3.628 +Rres@1 net@11 net@14 7.256 +Rres@2 b net@8 3.628 +Rres@3 net@8 net@11 7.256 +.ENDS wire-C_0_011f-627_9-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-627_9-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-627_9-R_34_667m +.ENDS wire90-627_9-layer_1-width_3 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-124_7-R_34_667m a b +Ccap@0 gnd net@14 0.457f +Ccap@1 gnd net@8 0.457f +Ccap@2 gnd net@11 0.457f +Rres@0 net@14 a 0.72 +Rres@1 net@11 net@14 1.441 +Rres@2 b net@8 0.72 +Rres@3 net@8 net@11 1.441 +.ENDS wire-C_0_011f-124_7-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-124_7-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-124_7-R_34_667m +.ENDS wire90-124_7-layer_1-width_3 + +*** CELL: driversJ:sucANDdri60{sch} +.SUBCKT sucANDdri60 inA inB succ +XPMOSx@0 succ net@51 vdd PMOSx-X_60 +Xinv@0 succ net@71 inv-X_5 +Xnms2@0 succ net@51 net@72 nms2-X_8 +Xnor2_sy@0 inA inB net@67 nand2_sy-X_20 +Xwire90@0 net@67 net@51 wire90-627_9-layer_1-width_3 +Xwire90@1 net@72 net@71 wire90-124_7-layer_1-width_3 +.ENDS sucANDdri60 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-541-R_34_667m a b +Ccap@0 gnd net@14 1.984f +Ccap@1 gnd net@8 1.984f +Ccap@2 gnd net@11 1.984f +Rres@0 net@14 a 3.126 +Rres@1 net@11 net@14 6.252 +Rres@2 b net@8 3.126 +Rres@3 net@8 net@11 6.252 +.ENDS wire-C_0_011f-541-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-541-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-541-R_34_667m +.ENDS wire90-541-layer_1-width_3 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-509_3-R_34_667m a b +Ccap@0 gnd net@14 1.867f +Ccap@1 gnd net@8 1.867f +Ccap@2 gnd net@11 1.867f +Rres@0 net@14 a 2.943 +Rres@1 net@11 net@14 5.885 +Rres@2 b net@8 2.943 +Rres@3 net@8 net@11 5.885 +.ENDS wire-C_0_011f-509_3-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-509_3-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-509_3-R_34_667m +.ENDS wire90-509_3-layer_1-width_3 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-602_3-R_34_667m a b +Ccap@0 gnd net@14 2.208f +Ccap@1 gnd net@8 2.208f +Ccap@2 gnd net@11 2.208f +Rres@0 net@14 a 3.48 +Rres@1 net@11 net@14 6.96 +Rres@2 b net@8 3.48 +Rres@3 net@8 net@11 6.96 +.ENDS wire-C_0_011f-602_3-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-602_3-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-602_3-R_34_667m +.ENDS wire90-602_3-layer_1-width_3 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-440_5-R_34_667m a b +Ccap@0 gnd net@14 1.615f +Ccap@1 gnd net@8 1.615f +Ccap@2 gnd net@11 1.615f +Rres@0 net@14 a 2.545 +Rres@1 net@11 net@14 5.09 +Rres@2 b net@8 2.545 +Rres@3 net@8 net@11 5.09 +.ENDS wire-C_0_011f-440_5-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-440_5-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-440_5-R_34_667m +.ENDS wire90-440_5-layer_1-width_3 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-397_6-R_34_667m a b +Ccap@0 gnd net@14 1.458f +Ccap@1 gnd net@8 1.458f +Ccap@2 gnd net@11 1.458f +Rres@0 net@14 a 2.297 +Rres@1 net@11 net@14 4.594 +Rres@2 b net@8 2.297 +Rres@3 net@8 net@11 4.594 +.ENDS wire-C_0_011f-397_6-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-397_6-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-397_6-R_34_667m +.ENDS wire90-397_6-layer_1-width_3 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-343_6-R_34_667m a b +Ccap@0 gnd net@14 1.26f +Ccap@1 gnd net@8 1.26f +Ccap@2 gnd net@11 1.26f +Rres@0 net@14 a 1.985 +Rres@1 net@11 net@14 3.97 +Rres@2 b net@8 1.985 +Rres@3 net@8 net@11 3.97 +.ENDS wire-C_0_011f-343_6-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-343_6-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-343_6-R_34_667m +.ENDS wire90-343_6-layer_1-width_3 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-831_5-R_34_667m a b +Ccap@0 gnd net@14 3.049f +Ccap@1 gnd net@8 3.049f +Ccap@2 gnd net@11 3.049f +Rres@0 net@14 a 4.804 +Rres@1 net@11 net@14 9.608 +Rres@2 b net@8 4.804 +Rres@3 net@8 net@11 9.608 +.ENDS wire-C_0_011f-831_5-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-831_5-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-831_5-R_34_667m +.ENDS wire90-831_5-layer_1-width_3 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-646_3-R_34_667m a b +Ccap@0 gnd net@14 2.37f +Ccap@1 gnd net@8 2.37f +Ccap@2 gnd net@11 2.37f +Rres@0 net@14 a 3.734 +Rres@1 net@11 net@14 7.468 +Rres@2 b net@8 3.734 +Rres@3 net@8 net@11 7.468 +.ENDS wire-C_0_011f-646_3-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-646_3-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-646_3-R_34_667m +.ENDS wire90-646_3-layer_1-width_3 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-1092_8-R_34_667m a b +Ccap@0 gnd net@14 4.007f +Ccap@1 gnd net@8 4.007f +Ccap@2 gnd net@11 4.007f +Rres@0 net@14 a 6.314 +Rres@1 net@11 net@14 12.628 +Rres@2 b net@8 6.314 +Rres@3 net@8 net@11 12.628 +.ENDS wire-C_0_011f-1092_8-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-1092_8-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-1092_8-R_34_667m +.ENDS wire90-1092_8-layer_1-width_3 + +*** CELL: gaspJ:gaspDrain{sch} +.SUBCKT gaspDrain fire[A] pred sic[1] sic[2] sic[3] sic[4] sic[5] sic[6] ++sic[7] sic[8] sic[9] sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] sir[8] ++sir[9] soc[1] sor[1] succ +XarbiterH@3 net@374 net@353 pred net@375 arbiterH +Xcenter3i@0 net@241 succ fire[A] ctrAND2in100 +Xinv@0 net@357 net@409 inv-X_10 +Xinv@1 go net@360 inv-X_10 +Xinv@3 silent net@333 inv-X_20 +XpredDri6@0 fire[A] net@364 pred predDri60wMC +XscanEx2v@1 pred stopped sir[9] sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] ++sir[7] sir[8] sor[1] scanEx2vert +XscanFx3h@0 net@467 net@447 net@466 sic[1] sic[2] sic[3] sic[4] sic[5] sic[6] ++sic[7] sic[8] sic[9] soc[1] scanFx3hor +XsucANDdr@0 net@338 fire[A] succ sucANDdri60 +Xwire90@1 net@374 net@241 wire90-541-layer_1-width_3 +Xwire90@7 net@375 net@360 wire90-509_3-layer_1-width_3 +Xwire90@8 net@364 clear wire90-602_3-layer_1-width_3 +Xwire90@9 net@333 net@338 wire90-440_5-layer_1-width_3 +Xwire90@10 net@357 net@353 wire90-397_6-layer_1-width_3 +Xwire90@11 stopped net@409 wire90-343_6-layer_1-width_3 +Xwire90@12 net@466 clear wire90-831_5-layer_1-width_3 +Xwire90@13 net@447 silent wire90-646_3-layer_1-width_3 +Xwire90@14 net@467 go wire90-1092_8-layer_1-width_3 +.ENDS gaspDrain + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-1673-R_34_667m a b +Ccap@0 gnd net@14 6.134f +Ccap@1 gnd net@8 6.134f +Ccap@2 gnd net@11 6.134f +Rres@0 net@14 a 9.666 +Rres@1 net@11 net@14 19.332 +Rres@2 b net@8 9.666 +Rres@3 net@8 net@11 19.332 +.ENDS wire-C_0_011f-1673-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-1673-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-1673-R_34_667m +.ENDS wire90-1673-layer_1-width_3 + +*** CELL: stagesJ:drainStage{sch} +.SUBCKT drainStage ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] ++ain[3] ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] aout[10] aout[11] ++aout[12] aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] ++aout[7] aout[8] aout[9] aout[T] in[10] in[11] in[12] in[13] in[14] in[15] ++in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] ++in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] ++in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] ++out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] ++out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] ++out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] ++out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] pred sic[1] sic[2] ++sic[3] sic[4] sic[5] sic[6] sic[7] sic[8] sic[9] sir[1] sir[2] sir[3] sir[4] ++sir[5] sir[6] sir[7] sir[8] sir[9] soc[1] sor[1] succ +Xall1in52@0 ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] ain[3] ++ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] aout[10] aout[11] aout[12] ++aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] aout[7] ++aout[8] aout[9] aout[T] net@2 in[10] in[11] in[12] in[13] in[14] in[15] ++in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] ++in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] ++in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] ++out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] ++out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] ++out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] ++out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] all1in52 +XgaspPlai@0 net@0 pred sic[1] sic[2] sic[3] sic[4] sic[5] sic[6] sic[7] ++sic[8] sic[9] sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] sir[8] sir[9] ++soc[1] sor[1] succ gaspDrain +Xwire90@0 net@0 net@2 wire90-1673-layer_1-width_3 +.ENDS drainStage + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-295_8-R_34_667m a b +Ccap@0 gnd net@14 1.085f +Ccap@1 gnd net@8 1.085f +Ccap@2 gnd net@11 1.085f +Rres@0 net@14 a 1.709 +Rres@1 net@11 net@14 3.418 +Rres@2 b net@8 1.709 +Rres@3 net@8 net@11 3.418 +.ENDS wire-C_0_011f-295_8-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-295_8-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-295_8-R_34_667m +.ENDS wire90-295_8-layer_1-width_3 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-555_8-R_34_667m a b +Ccap@0 gnd net@14 2.038f +Ccap@1 gnd net@8 2.038f +Ccap@2 gnd net@11 2.038f +Rres@0 net@14 a 3.211 +Rres@1 net@11 net@14 6.423 +Rres@2 b net@8 3.211 +Rres@3 net@8 net@11 6.423 +.ENDS wire-C_0_011f-555_8-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-555_8-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-555_8-R_34_667m +.ENDS wire90-555_8-layer_1-width_3 + +*** CELL: latchesK:latch2in60C{sch} +.SUBCKT latch2in60C hcl[A] hcl[B] inA[1] inB[1] outS[1] +Xhi2inLat@0 hcl[A] hcl[B] inA[1] inB[1] dataBar raw2inLatchF +XinvLT@0 net@15 net@18 invLT-X_5 +XinvLT@1 net@16 net@19 inv-X_20 +XinvLT@2 net@17 outS[1] inv-X_60 +Xwire90@0 dataBar net@15 wire90-295_8-layer_1-width_3 +Xwire90@1 net@18 net@16 wire90-242_1-layer_1-width_3 +Xwire90@2 net@19 net@17 wire90-555_8-layer_1-width_3 +.ENDS latch2in60C + +*** CELL: latchGroupsK:latchWscan{sch} +.SUBCKT latchWscan hcl in[1] out[1] p1p p2p rd sin sout wr +Xhi2inLat@1 hcl wr in[1] sout out[1] latch2in60C +XscanCell@2 out[1] p1p p2p rd sin sout scanCellE +.ENDS latchWscan + +*** CELL: registersJ:addr1in14scan{sch} +.SUBCKT addr1in14scan ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] ++ain[3] ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] aout[10] aout[11] aout[12] ++aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] aout[7] ++aout[8] aout[9] fire p1p p2p rd sin sout wrA +Xls[1] fire ain[1] aout[1] p1p p2p rd sin xin[2] wrA latchWscan +Xls[2] fire ain[2] aout[2] p1p p2p rd xin[2] xin[3] wrA latchWscan +Xls[3] fire ain[3] aout[3] p1p p2p rd xin[3] xin[4] wrA latchWscan +Xls[4] fire ain[4] aout[4] p1p p2p rd xin[4] xin[5] wrA latchWscan +Xls[5] fire ain[5] aout[5] p1p p2p rd xin[5] xin[6] wrA latchWscan +Xls[6] fire ain[6] aout[6] p1p p2p rd xin[6] xin[7] wrA latchWscan +Xls[7] fire ain[7] aout[7] p1p p2p rd xin[7] xin[8] wrA latchWscan +Xls[8] fire ain[8] aout[8] p1p p2p rd xin[8] xin[9] wrA latchWscan +Xls[9] fire ain[9] aout[9] p1p p2p rd xin[9] xin[10] wrA latchWscan +Xls[10] fire ain[10] aout[10] p1p p2p rd xin[10] xin[11] wrA latchWscan +Xls[11] fire ain[11] aout[11] p1p p2p rd xin[11] xin[12] wrA latchWscan +Xls[12] fire ain[12] aout[12] p1p p2p rd xin[12] xin[13] wrA latchWscan +Xls[13] fire ain[13] aout[13] p1p p2p rd xin[13] xin[14] wrA latchWscan +Xls[14] fire ain[14] aout[14] p1p p2p rd xin[14] sout wrA latchWscan +.ENDS addr1in14scan + +*** CELL: redFour:inv{sch} +.SUBCKT inv-X_40 in out +XNMOS@0 out in gnd NMOSx-X_40 +XPMOS@0 out in vdd PMOSx-X_40 +.ENDS inv-X_40 + +*** CELL: scanJ:scanTwinAmp{sch} +.SUBCKT scanTwinAmp in[1] outA[1] outB[1] +Xinv@0 net@2 outA[1] inv-X_20 +Xinv@1 in[1] net@1 inv-X_10 +Xinv@2 net@2 outB[1] inv-X_40 +Xwire90@0 net@1 net@2 wire90-947_7-layer_1-width_3 +.ENDS scanTwinAmp + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-2534-R_34_667m a b +Ccap@0 gnd net@14 9.291f +Ccap@1 gnd net@8 9.291f +Ccap@2 gnd net@11 9.291f +Rres@0 net@14 a 14.641 +Rres@1 net@11 net@14 29.282 +Rres@2 b net@8 14.641 +Rres@3 net@8 net@11 29.282 +.ENDS wire-C_0_011f-2534-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-2534-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-2534-R_34_667m +.ENDS wire90-2534-layer_1-width_3 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-918_6-R_34_667m a b +Ccap@0 gnd net@14 3.368f +Ccap@1 gnd net@8 3.368f +Ccap@2 gnd net@11 3.368f +Rres@0 net@14 a 5.307 +Rres@1 net@11 net@14 10.615 +Rres@2 b net@8 5.307 +Rres@3 net@8 net@11 10.615 +.ENDS wire-C_0_011f-918_6-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-918_6-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-918_6-R_34_667m +.ENDS wire90-918_6-layer_1-width_3 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-1177-R_34_667m a b +Ccap@0 gnd net@14 4.316f +Ccap@1 gnd net@8 4.316f +Ccap@2 gnd net@11 4.316f +Rres@0 net@14 a 6.8 +Rres@1 net@11 net@14 13.601 +Rres@2 b net@8 6.8 +Rres@3 net@8 net@11 13.601 +.ENDS wire-C_0_011f-1177-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-1177-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-1177-R_34_667m +.ENDS wire90-1177-layer_1-width_3 + +*** CELL: registersJ:data1in38scan{sch} +.SUBCKT data1in38scan ain[T] aout[T] fire in[10] in[11] in[12] in[13] in[14] ++in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] ++in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] ++in[35] in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] ++out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] ++out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] ++out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] ++out[36] out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] p1p p2p rd ++scanFromAddress scanToAddr sid[1] sid[2] sid[3] sid[4] sid[5] sid[6] sid[7] ++sid[8] sid[9] sod[2] sod[3] sod[4] sod[5] wrA +XdataDriv@0 ain[T] fire net@120 dataDriver70 +XdataDriv@1 net@115 net@137 wrD dataDriver70 +XdataDriv@2 xin[1] wrr wrA dataDriver70 +XlatchWsc@1 fire ain[T] aout[T] p1p p2p rd xin[38] scanToAddr wrA latchWscan +Xls[1] net@124 in[1] out[1] p1p p2p rd xin[1] xin[2] wrD latchWscan +Xls[2] net@124 in[2] out[2] p1p p2p rd xin[2] xin[3] wrD latchWscan +Xls[3] net@124 in[3] out[3] p1p p2p rd xin[3] xin[4] wrD latchWscan +Xls[4] net@124 in[4] out[4] p1p p2p rd xin[4] xin[5] wrD latchWscan +Xls[5] net@124 in[5] out[5] p1p p2p rd xin[5] xin[6] wrD latchWscan +Xls[6] net@124 in[6] out[6] p1p p2p rd xin[6] xin[7] wrD latchWscan +Xls[7] net@124 in[7] out[7] p1p p2p rd xin[7] xin[8] wrD latchWscan +Xls[8] net@124 in[8] out[8] p1p p2p rd xin[8] xin[9] wrD latchWscan +Xls[9] net@124 in[9] out[9] p1p p2p rd xin[9] xin[10] wrD latchWscan +Xls[10] net@124 in[10] out[10] p1p p2p rd xin[10] xin[11] wrD latchWscan +Xls[11] net@124 in[11] out[11] p1p p2p rd xin[11] xin[12] wrD latchWscan +Xls[12] net@124 in[12] out[12] p1p p2p rd xin[12] xin[13] wrD latchWscan +Xls[13] net@124 in[13] out[13] p1p p2p rd xin[13] xin[14] wrD latchWscan +Xls[14] net@124 in[14] out[14] p1p p2p rd xin[14] xin[15] wrD latchWscan +Xls[15] net@124 in[15] out[15] p1p p2p rd xin[15] xin[16] wrD latchWscan +Xls[16] net@124 in[16] out[16] p1p p2p rd xin[16] xin[17] wrD latchWscan +Xls[17] net@124 in[17] out[17] p1p p2p rd xin[17] xin[18] wrD latchWscan +Xls[18] net@124 in[18] out[18] p1p p2p rd xin[18] xin[19] wrD latchWscan +Xls[19] net@124 in[19] out[19] p1p p2p rd xin[19] xin[20] wrD latchWscan +Xls[20] net@124 in[20] out[20] p1p p2p rd xin[20] xin[21] wrD latchWscan +Xls[21] net@124 in[21] out[21] p1p p2p rd xin[21] xin[22] wrD latchWscan +Xls[22] net@124 in[22] out[22] p1p p2p rd xin[22] xin[23] wrD latchWscan +Xls[23] net@124 in[23] out[23] p1p p2p rd xin[23] xin[24] wrD latchWscan +Xls[24] net@124 in[24] out[24] p1p p2p rd xin[24] xin[25] wrD latchWscan +Xls[25] net@124 in[25] out[25] p1p p2p rd xin[25] xin[26] wrD latchWscan +Xls[26] net@124 in[26] out[26] p1p p2p rd xin[26] xin[27] wrD latchWscan +Xls[27] net@124 in[27] out[27] p1p p2p rd xin[27] xin[28] wrD latchWscan +Xls[28] net@124 in[28] out[28] p1p p2p rd xin[28] xin[29] wrD latchWscan +Xls[29] net@124 in[29] out[29] p1p p2p rd xin[29] xin[30] wrD latchWscan +Xls[30] net@124 in[30] out[30] p1p p2p rd xin[30] xin[31] wrD latchWscan +Xls[31] net@124 in[31] out[31] p1p p2p rd xin[31] xin[32] wrD latchWscan +Xls[32] net@124 in[32] out[32] p1p p2p rd xin[32] xin[33] wrD latchWscan +Xls[33] net@124 in[33] out[33] p1p p2p rd xin[33] xin[34] wrD latchWscan +Xls[34] net@124 in[34] out[34] p1p p2p rd xin[34] xin[35] wrD latchWscan +Xls[35] net@124 in[35] out[35] p1p p2p rd xin[35] xin[36] wrD latchWscan +Xls[36] net@124 in[36] out[36] p1p p2p rd xin[36] xin[37] wrD latchWscan +Xls[37] net@124 in[37] out[37] p1p p2p rd xin[37] xin[38] wrD latchWscan +Xsa[1] sid[2] sod[2] p2p scanTwinAmp +Xsa[2] sid[3] sod[3] p1p scanTwinAmp +Xsa[3] sid[4] sod[4] wrr scanTwinAmp +Xsa[4] sid[5] sod[5] rd scanTwinAmp +XscanCell@0 scanCell@0_dIn[1] p1p p2p rd sid[1] net@130 scanCellE +XscanCell@1 scanCell@1_dIn[1] p1p p2p rd net@115 xin[1] scanCellE +Xwire90@0 net@124 net@120 wire90-2534-layer_1-width_3 +Xwire90@2 net@124 net@120 wire90-2534-layer_1-width_3 +Xwire90@3 net@130 net@115 wire90-918_6-layer_1-width_3 +Xwire90@5 net@137 wrr wire90-1177-layer_1-width_3 +.ENDS data1in38scan + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-2975_6-R_34_667m a b +Ccap@0 gnd net@14 10.911f +Ccap@1 gnd net@8 10.911f +Ccap@2 gnd net@11 10.911f +Rres@0 net@14 a 17.192 +Rres@1 net@11 net@14 34.385 +Rres@2 b net@8 17.192 +Rres@3 net@8 net@11 34.385 +.ENDS wire-C_0_011f-2975_6-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-2975_6-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-2975_6-R_34_667m +.ENDS wire90-2975_6-layer_1-width_3 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-2989_9-R_34_667m a b +Ccap@0 gnd net@14 10.963f +Ccap@1 gnd net@8 10.963f +Ccap@2 gnd net@11 10.963f +Rres@0 net@14 a 17.275 +Rres@1 net@11 net@14 34.55 +Rres@2 b net@8 17.275 +Rres@3 net@8 net@11 34.55 +.ENDS wire-C_0_011f-2989_9-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-2989_9-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-2989_9-R_34_667m +.ENDS wire90-2989_9-layer_1-width_3 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-12168-R_34_667m a b +Ccap@0 gnd net@14 44.616f +Ccap@1 gnd net@8 44.616f +Ccap@2 gnd net@11 44.616f +Rres@0 net@14 a 70.304 +Rres@1 net@11 net@14 140.608 +Rres@2 b net@8 70.304 +Rres@3 net@8 net@11 140.608 +.ENDS wire-C_0_011f-12168-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-12168-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-12168-R_34_667m +.ENDS wire90-12168-layer_1-width_3 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-12492-R_34_667m a b +Ccap@0 gnd net@14 45.804f +Ccap@1 gnd net@8 45.804f +Ccap@2 gnd net@11 45.804f +Rres@0 net@14 a 72.176 +Rres@1 net@11 net@14 144.352 +Rres@2 b net@8 72.176 +Rres@3 net@8 net@11 144.352 +.ENDS wire-C_0_011f-12492-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-12492-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-12492-R_34_667m +.ENDS wire90-12492-layer_1-width_3 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-3927_5-R_34_667m a b +Ccap@0 gnd net@14 14.401f +Ccap@1 gnd net@8 14.401f +Ccap@2 gnd net@11 14.401f +Rres@0 net@14 a 22.692 +Rres@1 net@11 net@14 45.384 +Rres@2 b net@8 22.692 +Rres@3 net@8 net@11 45.384 +.ENDS wire-C_0_011f-3927_5-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-3927_5-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-3927_5-R_34_667m +.ENDS wire90-3927_5-layer_1-width_3 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-11401_6-R_34_667m a b +Ccap@0 gnd net@14 41.806f +Ccap@1 gnd net@8 41.806f +Ccap@2 gnd net@11 41.806f +Rres@0 net@14 a 65.876 +Rres@1 net@11 net@14 131.752 +Rres@2 b net@8 65.876 +Rres@3 net@8 net@11 131.752 +.ENDS wire-C_0_011f-11401_6-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-11401_6-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-11401_6-R_34_667m +.ENDS wire90-11401_6-layer_1-width_3 + +*** CELL: registersJ:all1in52scan{sch} +.SUBCKT all1in52scan ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] ++ain[3] ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] aout[10] aout[11] ++aout[12] aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] ++aout[7] aout[8] aout[9] aout[T] fire in[10] in[11] in[12] in[13] in[14] ++in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] ++in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] ++in[35] in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] ++out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] ++out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] ++out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] ++out[36] out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] sid[1] ++sid[2] sid[3] sid[4] sid[5] sid[6] sid[7] sid[8] sid[9] sod[1] sod[2] sod[3] ++sod[4] sod[5] +Xaddr1in1@0 ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] ain[3] ++ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] aout[10] aout[11] aout[12] aout[13] ++aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] aout[7] aout[8] ++aout[9] fire p1p p2p rd net@4 net@26 wrA addr1in14scan +Xdata1in3@0 ain[T] aout[T] fire in[10] in[11] in[12] in[13] in[14] in[15] ++in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] ++in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] ++in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] ++out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] ++out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] ++out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] ++out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] p1p p2p rd sod[1] ++net@1 sid[1] sid[2] sid[3] sid[4] sid[5] sid[6] sid[7] sid[8] sid[9] sod[2] ++sod[3] sod[4] sod[5] wrA data1in38scan +Xwire90@0 net@26 sod[1] wire90-2975_6-layer_1-width_3 +Xwire90@1 net@4 net@1 wire90-2989_9-layer_1-width_3 +Xwire90@2 wire90@2_a p2p wire90-12168-layer_1-width_3 +Xwire90@3 wire90@3_a p1p wire90-12492-layer_1-width_3 +Xwire90@4 wire90@4_a wrA wire90-3927_5-layer_1-width_3 +Xwire90@5 wire90@5_a rd wire90-11401_6-layer_1-width_3 +.ENDS all1in52scan + +*** CELL: orangeTSMC090nm:NMOSx{sch} +.SUBCKT NMOSx-X_14 d g s +MNMOSf@0 d g s gnd nch W='42*(1+ABN/sqrt(42*2))' L='2' ++DELVTO='AVT0N/sqrt(42*2)' +.ENDS NMOSx-X_14 + +*** CELL: orangeTSMC090nm:PMOSx{sch} +.SUBCKT PMOSx-X_42 d g s +MPMOSf@0 d g s vdd pch W='252*(1+ABP/sqrt(252*2))' L='2' ++DELVTO='AVT0P/sqrt(252*2)' +.ENDS PMOSx-X_42 + +*** CELL: redFour:pms3{sch} +.SUBCKT pms3-X_14 d g g2 g3 +XPMOS@0 d g3 net@2 PMOSx-X_42 +XPMOS@1 net@2 g2 net@5 PMOSx-X_42 +XPMOS@2 net@5 g vdd PMOSx-X_42 +.ENDS pms3-X_14 + +*** CELL: gatesK:nor3in14{sch} +.SUBCKT nor3in14 inA inB inC out +XNMOSx@0 out inC gnd NMOSx-X_14 +XNMOSx@1 out inA gnd NMOSx-X_14 +XNMOSx@2 out inB gnd NMOSx-X_14 +Xpms3@0 out inA inB inC pms3-X_14 +.ENDS nor3in14 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-403-R_34_667m a b +Ccap@0 gnd net@14 1.478f +Ccap@1 gnd net@8 1.478f +Ccap@2 gnd net@11 1.478f +Rres@0 net@14 a 2.328 +Rres@1 net@11 net@14 4.657 +Rres@2 b net@8 2.328 +Rres@3 net@8 net@11 4.657 +.ENDS wire-C_0_011f-403-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-403-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-403-R_34_667m +.ENDS wire90-403-layer_1-width_3 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-959-R_34_667m a b +Ccap@0 gnd net@14 3.516f +Ccap@1 gnd net@8 3.516f +Ccap@2 gnd net@11 3.516f +Rres@0 net@14 a 5.541 +Rres@1 net@11 net@14 11.082 +Rres@2 b net@8 5.541 +Rres@3 net@8 net@11 11.082 +.ENDS wire-C_0_011f-959-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-959-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-959-R_34_667m +.ENDS wire90-959-layer_1-width_3 + +*** CELL: centersJ:ctrAND3in100{sch} +.SUBCKT ctrAND3in100 inA inB inC out +Xinv@3 net@104 out inv-X_100 +Xnand2@0 net@114 net@103 inv-X_40 +Xnor3in14@0 inA inB inC net@124 nor3in14 +Xwire90@0 net@124 net@114 wire90-403-layer_1-width_3 +Xwire90@4 net@103 net@104 wire90-959-layer_1-width_3 +.ENDS ctrAND3in100 + +*** CELL: scanJ:scanFx2vert{sch} +.SUBCKT scanFx2vert dout[1] dout[2] sic[1] sic[2] sic[3] sic[4] sic[5] sic[6] ++sic[7] sic[8] sic[9] soc[1] +XscanCell@1 dout[2] sic[9] sic[3] sic[2] sic[5] net@32 soc[1] sic[4] ++scanCellF +XscanCell@2 dout[1] sic[9] sic[3] sic[2] sic[5] sic[1] net@30 sic[4] ++scanCellF +Xwire90@0 net@30 net@32 wire90-297_6-layer_1-width_3 +.ENDS scanFx2vert + +*** CELL: redFour:pms2{sch} +.SUBCKT pms2-X_10 d g g2 +XPMOS@0 net@2 g vdd PMOSx-X_20 +XPMOS@1 d g2 net@2 PMOSx-X_20 +.ENDS pms2-X_10 + +*** CELL: redFour:pms2_sy{sch} +.SUBCKT pms2_sy-X_20 d g g2 +Xpms2@0 d g g2 pms2-X_10 +Xpms2@1 d g2 g pms2-X_10 +.ENDS pms2_sy-X_20 + +*** CELL: redFour:nor2_sy{sch} +.SUBCKT nor2_sy-X_20 ina inb out +XNMOS@0 out inb gnd NMOSx-X_20 +XNMOS@1 out ina gnd NMOSx-X_20 +Xpms2_sy@0 out ina inb pms2_sy-X_20 +.ENDS nor2_sy-X_20 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-1001_8-R_34_667m a b +Ccap@0 gnd net@14 3.673f +Ccap@1 gnd net@8 3.673f +Ccap@2 gnd net@11 3.673f +Rres@0 net@14 a 5.788 +Rres@1 net@11 net@14 11.576 +Rres@2 b net@8 5.788 +Rres@3 net@8 net@11 11.576 +.ENDS wire-C_0_011f-1001_8-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-1001_8-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-1001_8-R_34_667m +.ENDS wire90-1001_8-layer_1-width_3 + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-209-R_34_667m a b +Ccap@0 gnd net@14 0.766f +Ccap@1 gnd net@8 0.766f +Ccap@2 gnd net@11 0.766f +Rres@0 net@14 a 1.208 +Rres@1 net@11 net@14 2.415 +Rres@2 b net@8 1.208 +Rres@3 net@8 net@11 2.415 +.ENDS wire-C_0_011f-209-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-209-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-209-R_34_667m +.ENDS wire90-209-layer_1-width_3 + +*** CELL: driversJ:sucORdri60{sch} +.SUBCKT sucORdri60 inA inB succ +XPMOSx@0 succ net@51 vdd PMOSx-X_60 +Xinv@0 succ net@71 inv-X_5 +Xnms2@0 succ net@51 net@72 nms2-X_8 +Xnor2_sy@0 inA inB net@67 nor2_sy-X_20 +Xwire90@0 net@67 net@51 wire90-1001_8-layer_1-width_3 +Xwire90@1 net@72 net@71 wire90-209-layer_1-width_3 +.ENDS sucORdri60 + +*** CELL: gaspJ:gaspFill{sch} +.SUBCKT gaspFill fire pred sic[1] sic[2] sic[3] sic[4] sic[5] sic[6] sic[7] ++sic[8] sic[9] sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] sir[8] sir[9] ++soc[1] sor[1] succ +Xcenter3i@1 fire succ net@241 fire[B] ctrAND3in100 +Xcenter3i@2 net@507 succ net@428 fire ctrAND3in100 +Xinv@0 pred net@533 inv-X_10 +Xinv@1 net@465 net@537 inv-X_10 +XpredDri6@0 fire sir[9] pred predDri60wMC +XscanEx2v@2 pred net@465 sir[9] sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] ++sir[7] sir[8] sor[1] scanEx2vert +XscanFx2v@0 block fill sic[1] sic[2] sic[3] sic[4] sic[5] sic[6] sic[7] ++sic[8] sic[9] soc[1] scanFx2vert +XsucORdri@1 fire net@320 succ sucORdri60 +Xwire90@1 net@537 net@241 wire90-602_3-layer_1-width_3 +Xwire90@10 net@465 fill wire90-602_3-layer_1-width_3 +Xwire90@12 net@533 net@428 wire90-602_3-layer_1-width_3 +Xwire90@14 net@507 block wire90-602_3-layer_1-width_3 +Xwire90@15 fire[B] net@320 wire90-602_3-layer_1-width_3 +.ENDS gaspFill + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-6034_2-R_34_667m a b +Ccap@0 gnd net@14 22.125f +Ccap@1 gnd net@8 22.125f +Ccap@2 gnd net@11 22.125f +Rres@0 net@14 a 34.864 +Rres@1 net@11 net@14 69.729 +Rres@2 b net@8 34.864 +Rres@3 net@8 net@11 69.729 +.ENDS wire-C_0_011f-6034_2-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-6034_2-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-6034_2-R_34_667m +.ENDS wire90-6034_2-layer_1-width_3 + +*** CELL: stagesJ:fillStage{sch} +.SUBCKT fillStage ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] ++ain[3] ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] aout[10] aout[11] ++aout[12] aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] ++aout[7] aout[8] aout[9] aout[T] in[10] in[11] in[12] in[13] in[14] in[15] ++in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] ++in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] ++in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] ++out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] ++out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] ++out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] ++out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] pred sic[1] sic[2] ++sic[3] sic[4] sic[5] sic[6] sic[7] sic[8] sic[9] sid[1] sid[2] sid[3] sid[4] ++sid[5] sid[6] sid[7] sid[8] sid[9] sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] ++sir[7] sir[8] sir[9] soc[1] sod[1] sod[2] sod[3] sod[4] sod[5] sor[1] succ +Xall1in52@1 ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] ain[3] ++ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] aout[10] aout[11] aout[12] ++aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] aout[7] ++aout[8] aout[9] aout[T] net@2 in[10] in[11] in[12] in[13] in[14] in[15] ++in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] ++in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] ++in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] ++out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] ++out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] ++out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] ++out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] sid[1] sid[2] sid[3] ++sid[4] sid[5] sid[6] sid[7] sid[8] sid[9] sod[1] sod[2] sod[3] sod[4] sod[5] ++all1in52scan +XgaspPlai@0 net@0 pred sic[1] sic[2] sic[3] sic[4] sic[5] sic[6] sic[7] ++sic[8] sic[9] sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] sir[8] sir[9] ++soc[1] sor[1] succ gaspFill +Xwire90@0 net@0 net@2 wire90-6034_2-layer_1-width_3 +.ENDS fillStage + +*** CELL: stageGroupsJ:properStopper{sch} +.SUBCKT properStopper ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] ++ain[3] ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] aout[10] aout[11] ++aout[12] aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] ++aout[7] aout[8] aout[9] aout[T] in[10] in[11] in[12] in[13] in[14] in[15] ++in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] ++in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] ++in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] ++out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] ++out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] ++out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] ++out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] pred sic[1] sic[2] ++sic[3] sic[4] sic[5] sic[6] sic[7] sic[8] sic[9] sid[1] sid[2] sid[3] sid[4] ++sid[5] sid[6] sid[7] sid[8] sid[9] sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] ++sir[7] sir[8] sir[9] soc[1] sod[1] sod[2] sod[3] sod[4] sod[5] sor[1] succ +XaDrainSt@0 net@1[4] net@1[3] net@1[2] net@1[1] net@1[0] net@1[13] net@1[12] ++net@1[11] net@1[10] net@1[9] net@1[8] net@1[7] net@1[6] net@1[5] net@1[14] ++aout[10] aout[11] aout[12] aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] ++aout[5] aout[6] aout[7] aout[8] aout[9] aout[T] net@1[42] net@1[41] net@1[40] ++net@1[39] net@1[38] net@1[37] net@1[36] net@1[35] net@1[34] net@1[33] ++net@1[51] net@1[32] net@1[31] net@1[30] net@1[29] net@1[28] net@1[27] ++net@1[26] net@1[25] net@1[24] net@1[23] net@1[50] net@1[22] net@1[21] ++net@1[20] net@1[19] net@1[18] net@1[17] net@1[16] net@1[15] net@1[49] ++net@1[48] net@1[47] net@1[46] net@1[45] net@1[44] net@1[43] out[10] out[11] ++out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] ++out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] ++out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] ++out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] net@13 net@3[8] ++sic[2] sic[3] sic[4] sic[5] sic[6] sic[7] sic[8] sic[9] net@2[8] sir[2] ++sir[3] sir[4] sir[5] sir[6] sir[7] sir[8] sir[9] soc[1] sor[1] succ ++drainStage +XaFillSta@0 ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] ain[3] ++ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] net@1[4] net@1[3] net@1[2] ++net@1[1] net@1[0] net@1[13] net@1[12] net@1[11] net@1[10] net@1[9] net@1[8] ++net@1[7] net@1[6] net@1[5] net@1[14] in[10] in[11] in[12] in[13] in[14] ++in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] ++in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] ++in[35] in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] net@1[42] ++net@1[41] net@1[40] net@1[39] net@1[38] net@1[37] net@1[36] net@1[35] ++net@1[34] net@1[33] net@1[51] net@1[32] net@1[31] net@1[30] net@1[29] ++net@1[28] net@1[27] net@1[26] net@1[25] net@1[24] net@1[23] net@1[50] ++net@1[22] net@1[21] net@1[20] net@1[19] net@1[18] net@1[17] net@1[16] ++net@1[15] net@1[49] net@1[48] net@1[47] net@1[46] net@1[45] net@1[44] ++net@1[43] pred sic[1] sic[2] sic[3] sic[4] sic[5] sic[6] sic[7] sic[8] sic[9] ++sid[1] sid[2] sid[3] sid[4] sid[5] sid[6] sid[7] sid[8] sid[9] sir[1] sir[2] ++sir[3] sir[4] sir[5] sir[6] sir[7] sir[8] sir[9] net@3[8] sod[1] sod[2] ++sod[3] sod[4] sod[5] net@2[8] net@13 fillStage +.ENDS properStopper + +*** CELL: scanJ:scanEx1vertA{sch} +.SUBCKT scanEx1vertA dIn[1] mc sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] ++sir[7] sir[8] sor[1] +XscanCell@1 dIn[1] sir[3] sir[2] sir[5] sir[1] sor[1] scanCellE +.ENDS scanEx1vertA + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-503_4-R_34_667m a b +Ccap@0 gnd net@14 1.846f +Ccap@1 gnd net@8 1.846f +Ccap@2 gnd net@11 1.846f +Rres@0 net@14 a 2.909 +Rres@1 net@11 net@14 5.817 +Rres@2 b net@8 2.909 +Rres@3 net@8 net@11 5.817 +.ENDS wire-C_0_011f-503_4-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-503_4-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-503_4-R_34_667m +.ENDS wire90-503_4-layer_1-width_3 + +*** CELL: driversJ:sucDri60{sch} +.SUBCKT sucDri60 in succ +XPMOSx@0 succ net@46 vdd PMOSx-X_60 +Xinv@1 succ net@94 inv-X_5 +Xinv@2 in net@110 inv-X_20 +Xnms2@0 succ net@46 net@104 nms2-X_8 +Xwire90@0 net@104 net@94 wire90-124_7-layer_1-width_3 +Xwire90@1 net@110 net@46 wire90-503_4-layer_1-width_3 +.ENDS sucDri60 + +*** CELL: gaspJ:gaspPlain{sch} +.SUBCKT gaspPlain fire pred sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] ++sir[8] sir[9] sor[1] succ +Xcenter2i@0 net@16 succ fire ctrAND2in100 +Xinv@1 pred net@9 inv-X_10 +XpredDri6@0 fire net@25 pred predDri60wMC +XscanEx1v@0 pred sir[9] sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] ++sir[8] sor[1] scanEx1vertA +XsucDri60@0 fire succ sucDri60 +Xwire90@1 net@9 net@16 wire90-602_3-layer_1-width_3 +Xwire90@2 net@25 sir[9] wire90-602_3-layer_1-width_3 +.ENDS gaspPlain + +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-1574-R_26m a b +Ccap@0 gnd net@14 5.771f +Ccap@1 gnd net@8 5.771f +Ccap@2 gnd net@11 5.771f +Rres@0 net@14 a 6.821 +Rres@1 net@11 net@14 13.641 +Rres@2 b net@8 6.821 +Rres@3 net@8 net@11 13.641 +.ENDS wire-C_0_011f-1574-R_26m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-1574-layer_1-width_4 a b +Xwire@0 a b wire-C_0_011f-1574-R_26m +.ENDS wire90-1574-layer_1-width_4 + +*** CELL: stagesJ:plainStage{sch} +.SUBCKT plainStage ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] ++ain[3] ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] aout[10] aout[11] ++aout[12] aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] ++aout[7] aout[8] aout[9] aout[T] in[10] in[11] in[12] in[13] in[14] in[15] ++in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] ++in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] ++in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] ++out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] ++out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] ++out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] ++out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] pred sir[1] sir[2] ++sir[3] sir[4] sir[5] sir[6] sir[7] sir[8] sir[9] sor[1] succ +Xall1in52@0 ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] ain[3] ++ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] aout[10] aout[11] aout[12] ++aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] aout[7] ++aout[8] aout[9] aout[T] net@20 in[10] in[11] in[12] in[13] in[14] in[15] ++in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] ++in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] ++in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] ++out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] ++out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] ++out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] ++out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] all1in52 +XgaspPlai@0 net@18 pred sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] ++sir[8] sir[9] sor[1] succ gaspPlain +Xwire90@1 net@18 net@20 wire90-1574-layer_1-width_4 +.ENDS plainStage + +*** CELL: stageGroupsJ:plainStageFour{sch} +.SUBCKT plainStageFour ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] ++ain[3] ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] aout[10] aout[11] ++aout[12] aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] ++aout[7] aout[8] aout[9] aout[T] in[10] in[11] in[12] in[13] in[14] in[15] ++in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] ++in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] ++in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] ++out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] ++out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] ++out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] ++out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] pred rscanIn[1] ++rscanIn[2] rscanIn[3] rscanIn[4] rscanIn[5] rscanIn[6] rscanIn[7] rscanIn[8] ++rscanIn[9] rscanOut[1] succ +Xstg[1] ain[11] ain[12] ain[13] ain[14] ain[T] ain[2] ain[3] ain[4] ain[5] ++ain[6] ain[7] ain[8] ain[9] ain[10] ain[1] net@46[4] net@46[3] net@46[2] ++net@46[1] net@46[0] net@46[13] net@46[12] net@46[11] net@46[10] net@46[9] ++net@46[8] net@46[7] net@46[6] net@46[5] net@46[14] in[10] in[11] in[12] ++in[13] in[14] in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] ++in[23] in[24] in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] ++in[33] in[34] in[35] in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] ++net@46[42] net@46[41] net@46[40] net@46[39] net@46[38] net@46[37] net@46[36] ++net@46[35] net@46[34] net@46[33] net@46[51] net@46[32] net@46[31] net@46[30] ++net@46[29] net@46[28] net@46[27] net@46[26] net@46[25] net@46[24] net@46[23] ++net@46[50] net@46[22] net@46[21] net@46[20] net@46[19] net@46[18] net@46[17] ++net@46[16] net@46[15] net@46[49] net@46[48] net@46[47] net@46[46] net@46[45] ++net@46[44] net@46[43] pred rscanIn[1] rscanIn[2] rscanIn[3] rscanIn[4] ++rscanIn[5] rscanIn[6] rscanIn[7] rscanIn[8] rscanIn[9] net@52[8] net@55 ++plainStage +Xstg[2] net@46[4] net@46[3] net@46[2] net@46[1] net@46[0] net@46[13] ++net@46[12] net@46[11] net@46[10] net@46[9] net@46[8] net@46[7] net@46[6] ++net@46[5] net@46[14] net@47[4] net@47[3] net@47[2] net@47[1] net@47[0] ++net@47[13] net@47[12] net@47[11] net@47[10] net@47[9] net@47[8] net@47[7] ++net@47[6] net@47[5] net@47[14] net@46[42] net@46[41] net@46[40] net@46[39] ++net@46[38] net@46[37] net@46[36] net@46[35] net@46[34] net@46[33] net@46[51] ++net@46[32] net@46[31] net@46[30] net@46[29] net@46[28] net@46[27] net@46[26] ++net@46[25] net@46[24] net@46[23] net@46[50] net@46[22] net@46[21] net@46[20] ++net@46[19] net@46[18] net@46[17] net@46[16] net@46[15] net@46[49] net@46[48] ++net@46[47] net@46[46] net@46[45] net@46[44] net@46[43] net@47[42] net@47[41] ++net@47[40] net@47[39] net@47[38] net@47[37] net@47[36] net@47[35] net@47[34] ++net@47[33] net@47[51] net@47[32] net@47[31] net@47[30] net@47[29] net@47[28] ++net@47[27] net@47[26] net@47[25] net@47[24] net@47[23] net@47[50] net@47[22] ++net@47[21] net@47[20] net@47[19] net@47[18] net@47[17] net@47[16] net@47[15] ++net@47[49] net@47[48] net@47[47] net@47[46] net@47[45] net@47[44] net@47[43] ++net@55 net@52[8] rscanIn[2] rscanIn[3] rscanIn[4] rscanIn[5] rscanIn[6] ++rscanIn[7] rscanIn[8] rscanIn[9] net@53[8] net@56 plainStage +Xstg[3] net@47[4] net@47[3] net@47[2] net@47[1] net@47[0] net@47[13] ++net@47[12] net@47[11] net@47[10] net@47[9] net@47[8] net@47[7] net@47[6] ++net@47[5] net@47[14] net@48[4] net@48[3] net@48[2] net@48[1] net@48[0] ++net@48[13] net@48[12] net@48[11] net@48[10] net@48[9] net@48[8] net@48[7] ++net@48[6] net@48[5] net@48[14] net@47[42] net@47[41] net@47[40] net@47[39] ++net@47[38] net@47[37] net@47[36] net@47[35] net@47[34] net@47[33] net@47[51] ++net@47[32] net@47[31] net@47[30] net@47[29] net@47[28] net@47[27] net@47[26] ++net@47[25] net@47[24] net@47[23] net@47[50] net@47[22] net@47[21] net@47[20] ++net@47[19] net@47[18] net@47[17] net@47[16] net@47[15] net@47[49] net@47[48] ++net@47[47] net@47[46] net@47[45] net@47[44] net@47[43] net@48[42] net@48[41] ++net@48[40] net@48[39] net@48[38] net@48[37] net@48[36] net@48[35] net@48[34] ++net@48[33] net@48[51] net@48[32] net@48[31] net@48[30] net@48[29] net@48[28] ++net@48[27] net@48[26] net@48[25] net@48[24] net@48[23] net@48[50] net@48[22] ++net@48[21] net@48[20] net@48[19] net@48[18] net@48[17] net@48[16] net@48[15] ++net@48[49] net@48[48] net@48[47] net@48[46] net@48[45] net@48[44] net@48[43] ++net@56 net@53[8] rscanIn[2] rscanIn[3] rscanIn[4] rscanIn[5] rscanIn[6] ++rscanIn[7] rscanIn[8] rscanIn[9] net@54[8] net@57 plainStage +Xstg[4] net@48[4] net@48[3] net@48[2] net@48[1] net@48[0] net@48[13] ++net@48[12] net@48[11] net@48[10] net@48[9] net@48[8] net@48[7] net@48[6] ++net@48[5] net@48[14] aout[11] aout[12] aout[13] aout[14] aout[T] aout[2] ++aout[3] aout[4] aout[5] aout[6] aout[7] aout[8] aout[9] aout[10] aout[1] ++net@48[42] net@48[41] net@48[40] net@48[39] net@48[38] net@48[37] net@48[36] ++net@48[35] net@48[34] net@48[33] net@48[51] net@48[32] net@48[31] net@48[30] ++net@48[29] net@48[28] net@48[27] net@48[26] net@48[25] net@48[24] net@48[23] ++net@48[50] net@48[22] net@48[21] net@48[20] net@48[19] net@48[18] net@48[17] ++net@48[16] net@48[15] net@48[49] net@48[48] net@48[47] net@48[46] net@48[45] ++net@48[44] net@48[43] out[10] out[11] out[12] out[13] out[14] out[15] out[16] ++out[17] out[18] out[19] out[1] out[20] out[21] out[22] out[23] out[24] ++out[25] out[26] out[27] out[28] out[29] out[2] out[30] out[31] out[32] ++out[33] out[34] out[35] out[36] out[37] out[3] out[4] out[5] out[6] out[7] ++out[8] out[9] net@57 net@54[8] rscanIn[2] rscanIn[3] rscanIn[4] rscanIn[5] ++rscanIn[6] rscanIn[7] rscanIn[8] rscanIn[9] rscanOut[1] succ plainStage +.ENDS plainStageFour + +*** CELL: inputDock{sch} +.SUBCKT inputDock gnd in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] ++in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] ++in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] in[37] ++in[38] in[39] in[3] in[40] in[41] in[42] in[43] in[44] in[45] in[46] in[47] ++in[48] in[49] in[4] in[50] in[51] in[5] in[6] in[7] in[8] in[9] in[S] in[T] ++ins[10] ins[11] ins[12] ins[13] ins[14] ins[15] ins[16] ins[17] ins[18] ++ins[19] ins[1] ins[20] ins[21] ins[22] ins[23] ins[24] ins[25] ins[26] ++ins[27] ins[28] ins[29] ins[2] ins[30] ins[31] ins[32] ins[33] ins[34] ++ins[35] ins[36] ins[37] ins[38] ins[39] ins[3] ins[40] ins[41] ins[42] ++ins[43] ins[44] ins[45] ins[46] ins[47] ins[48] ins[49] ins[4] ins[50] ++ins[51] ins[5] ins[6] ins[7] ins[8] ins[9] ins[T] ship[10] ship[11] ship[12] ++ship[13] ship[14] ship[15] ship[16] ship[17] ship[18] ship[19] ship[1] ++ship[20] ship[21] ship[22] ship[23] ship[24] ship[25] ship[26] ship[27] ++ship[28] ship[29] ship[2] ship[30] ship[31] ship[32] ship[33] ship[34] ++ship[35] ship[36] ship[37] ship[38] ship[3] ship[4] ship[5] ship[6] ship[7] ++ship[8] ship[9] ship[S] sin sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] sir[8] ++sir[9] sout tokOut[10] tokOut[11] tokOut[12] tokOut[13] tokOut[14] tokOut[15] ++tokOut[16] tokOut[17] tokOut[18] tokOut[19] tokOut[1] tokOut[20] tokOut[21] ++tokOut[22] tokOut[23] tokOut[24] tokOut[25] tokOut[26] tokOut[27] tokOut[28] ++tokOut[29] tokOut[2] tokOut[30] tokOut[31] tokOut[32] tokOut[33] tokOut[34] ++tokOut[35] tokOut[36] tokOut[37] tokOut[38] tokOut[39] tokOut[3] tokOut[40] ++tokOut[41] tokOut[42] tokOut[43] tokOut[44] tokOut[45] tokOut[46] tokOut[47] ++tokOut[48] tokOut[49] tokOut[4] tokOut[50] tokOut[51] tokOut[5] tokOut[6] ++tokOut[7] tokOut[8] tokOut[9] tokOut[S] tokOut[T] +XplainSta@0 in[46] in[47] in[48] in[49] in[50] in[T] in[38] in[39] in[40] ++in[41] in[42] in[43] in[44] in[45] in[51] tokOut[46] tokOut[47] tokOut[48] ++tokOut[49] tokOut[50] tokOut[T] tokOut[38] tokOut[39] tokOut[40] tokOut[41] ++tokOut[42] tokOut[43] tokOut[44] tokOut[45] tokOut[51] in[10] in[11] in[12] ++in[13] in[14] in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] ++in[23] in[24] in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] ++in[33] in[34] in[35] in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] ++tokOut[10] tokOut[11] tokOut[12] tokOut[13] tokOut[14] tokOut[15] tokOut[16] ++tokOut[17] tokOut[18] tokOut[19] tokOut[1] tokOut[20] tokOut[21] tokOut[22] ++tokOut[23] tokOut[24] tokOut[25] tokOut[26] tokOut[27] tokOut[28] tokOut[29] ++tokOut[2] tokOut[30] tokOut[31] tokOut[32] tokOut[33] tokOut[34] tokOut[35] ++tokOut[36] tokOut[37] tokOut[3] tokOut[4] tokOut[5] tokOut[6] tokOut[7] ++tokOut[8] tokOut[9] in[S] sin sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] ++sir[8] sir[9] sout tokOut[S] plainStageFour +.ENDS inputDock + +*** CELL: scanJ:scanCap{sch} +.SUBCKT scanCap si[1] si[2] si[3] si[4] si[5] si[9] +.ENDS scanCap + +.global gnd vdd + +*** TOP LEVEL CELL: isolatedInDock{sch} +XdatIn net@6[4] net@6[3] net@6[2] net@6[1] net@6[0] net@6[13] net@6[12] ++net@6[11] net@6[10] net@6[9] net@6[8] net@6[7] net@6[6] net@6[5] net@6[14] ++in[47] in[48] in[49] in[50] in[51] in[38] in[39] in[40] in[41] in[42] in[43] ++in[44] in[45] in[46] in[T] net@6[42] net@6[41] net@6[40] net@6[39] net@6[38] ++net@6[37] net@6[36] net@6[35] net@6[34] net@6[33] net@6[51] net@6[32] ++net@6[31] net@6[30] net@6[29] net@6[28] net@6[27] net@6[26] net@6[25] ++net@6[24] net@6[23] net@6[50] net@6[22] net@6[21] net@6[20] net@6[19] ++net@6[18] net@6[17] net@6[16] net@6[15] net@6[49] net@6[48] net@6[47] ++net@6[46] net@6[45] net@6[44] net@6[43] in[10] in[11] in[12] in[13] in[14] ++in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] ++in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] ++in[35] in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] net@24 ++scanInC[1] scanInC[2] scanInC[3] scanInC[4] scanInC[5] scanInC[3] scanInC[2] ++scanInC[8] scanInC[9] scanInD[1] scanInD[2] scanInD[3] scanInD[4] scanInD[5] ++scanInD[6] scanInD[7] scanInD[8] scanInD[9] scanInR[1] scanInR[2] scanInR[3] ++scanInR[4] scanInR[5] scanInR[3] scanInR[2] scanInR[8] scanInR[9] net@11[8] ++net@10[8] net@10[7] net@10[6] net@10[5] net@10[4] dockScanR[I] in[S] ++properStopper +XinDock gnd in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] in[18] ++in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] in[28] ++in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] in[37] in[38] ++in[39] in[3] in[40] in[41] in[42] in[43] in[44] in[45] in[46] in[47] in[48] ++in[49] in[4] in[50] in[51] in[5] in[6] in[7] in[8] in[9] in[S] in[T] ins[10] ++ins[11] ins[12] ins[13] ins[14] ins[15] ins[16] ins[17] ins[18] ins[19] ++ins[1] ins[20] ins[21] ins[22] ins[23] ins[24] ins[25] ins[26] ins[27] ++ins[28] ins[29] ins[2] ins[30] ins[31] ins[32] ins[33] ins[34] ins[35] ++ins[36] ins[37] ins[38] ins[39] ins[3] ins[40] ins[41] ins[42] ins[43] ++ins[44] ins[45] ins[46] ins[47] ins[48] ins[49] ins[4] ins[50] ins[51] ins[5] ++ins[6] ins[7] ins[8] ins[9] ins[T] ship[10] ship[11] ship[12] ship[13] ++ship[14] ship[15] ship[16] ship[17] ship[18] ship[19] ship[1] ship[20] ++ship[21] ship[22] ship[23] ship[24] ship[25] ship[26] ship[27] ship[28] ++ship[29] ship[2] ship[30] ship[31] ship[32] ship[33] ship[34] ship[35] ++ship[36] ship[37] ship[38] ship[3] ship[4] ship[5] ship[6] ship[7] ship[8] ++ship[9] ship[S] dockScanR[I] scanInR[2] scanInR[3] scanInR[4] scanInR[5] ++scanInR[3] scanInR[2] scanInR[8] scanInR[9] dockScanR[O] tokOut[10] ++tokOut[11] tokOut[12] tokOut[13] tokOut[14] tokOut[15] tokOut[16] tokOut[17] ++tokOut[18] tokOut[19] tokOut[1] tokOut[20] tokOut[21] tokOut[22] tokOut[23] ++tokOut[24] tokOut[25] tokOut[26] tokOut[27] tokOut[28] tokOut[29] tokOut[2] ++tokOut[30] tokOut[31] tokOut[32] tokOut[33] tokOut[34] tokOut[35] tokOut[36] ++tokOut[37] tokOut[38] tokOut[39] tokOut[3] tokOut[40] tokOut[41] tokOut[42] ++tokOut[43] tokOut[44] tokOut[45] tokOut[46] tokOut[47] tokOut[48] tokOut[49] ++tokOut[4] tokOut[50] tokOut[51] tokOut[5] tokOut[6] tokOut[7] tokOut[8] ++tokOut[9] tokOut[S] tokOut[T] inputDock +XinsIn net@54[4] net@54[3] net@54[2] net@54[1] net@54[0] net@54[13] ++net@54[12] net@54[11] net@54[10] net@54[9] net@54[8] net@54[7] net@54[6] ++net@54[5] net@54[14] ins[47] ins[48] ins[49] ins[50] ins[51] ins[38] ins[39] ++ins[40] ins[41] ins[42] ins[43] ins[44] ins[45] ins[46] ins[T] net@54[42] ++net@54[41] net@54[40] net@54[39] net@54[38] net@54[37] net@54[36] net@54[35] ++net@54[34] net@54[33] net@54[51] net@54[32] net@54[31] net@54[30] net@54[29] ++net@54[28] net@54[27] net@54[26] net@54[25] net@54[24] net@54[23] net@54[50] ++net@54[22] net@54[21] net@54[20] net@54[19] net@54[18] net@54[17] net@54[16] ++net@54[15] net@54[49] net@54[48] net@54[47] net@54[46] net@54[45] net@54[44] ++net@54[43] ins[10] ins[11] ins[12] ins[13] ins[14] ins[15] ins[16] ins[17] ++ins[18] ins[19] ins[1] ins[20] ins[21] ins[22] ins[23] ins[24] ins[25] ++ins[26] ins[27] ins[28] ins[29] ins[2] ins[30] ins[31] ins[32] ins[33] ++ins[34] ins[35] ins[36] ins[37] ins[3] ins[4] ins[5] ins[6] ins[7] ins[8] ++ins[9] net@55 net@50[8] scanInC[2] scanInC[3] scanInC[4] scanInC[5] ++scanInC[3] scanInC[2] scanInC[8] scanInC[9] net@47[8] net@47[7] net@47[6] ++net@47[5] net@47[4] scanInD[6] scanInD[7] scanInD[8] scanInD[9] net@53[8] ++scanInR[2] scanInR[3] scanInR[4] scanInR[5] scanInR[3] scanInR[2] scanInR[8] ++scanInR[9] scanInC[8] scanInD[8] scanInD[7] scanInD[6] net@57[5] net@57[4] ++scanInR[8] gnd properStopper +XscanCap@0 scanInD[8] scanInD[7] scanInD[6] net@57[5] net@57[4] scanInD[9] ++scanCap +XscanCap@1 scanInC[8] scanInC[2] scanInC[3] scanInC[4] scanInC[5] scanInC[9] ++scanCap +XscanCap@2 scanInR[8] scanInR[2] scanInR[3] scanInR[4] scanInR[5] scanInR[9] ++scanCap +XshipOut junk[47] junk[48] junk[49] junk[50] junk[51] ship[38] junk[39] ++junk[40] junk[41] junk[42] junk[43] junk[44] junk[45] junk[46] ship[T] ++net@9[4] net@9[3] net@9[2] net@9[1] net@9[0] net@9[13] net@9[12] net@9[11] ++net@9[10] net@9[9] net@9[8] net@9[7] net@9[6] net@9[5] net@9[14] ship[10] ++ship[11] ship[12] ship[13] ship[14] ship[15] ship[16] ship[17] ship[18] ++ship[19] ship[1] ship[20] ship[21] ship[22] ship[23] ship[24] ship[25] ++ship[26] ship[27] ship[28] ship[29] ship[2] ship[30] ship[31] ship[32] ++ship[33] ship[34] ship[35] ship[36] ship[37] ship[3] ship[4] ship[5] ship[6] ++ship[7] ship[8] ship[9] net@9[42] net@9[41] net@9[40] net@9[39] net@9[38] ++net@9[37] net@9[36] net@9[35] net@9[34] net@9[33] net@9[51] net@9[32] ++net@9[31] net@9[30] net@9[29] net@9[28] net@9[27] net@9[26] net@9[25] ++net@9[24] net@9[23] net@9[50] net@9[22] net@9[21] net@9[20] net@9[19] ++net@9[18] net@9[17] net@9[16] net@9[15] net@9[49] net@9[48] net@9[47] ++net@9[46] net@9[45] net@9[44] net@9[43] ship[S] net@11[8] scanInC[2] ++scanInC[3] scanInC[4] scanInC[5] scanInC[3] scanInC[2] scanInC[8] scanInC[9] ++net@10[8] net@10[7] net@10[6] net@10[5] net@10[4] scanInD[6] scanInD[7] ++scanInD[8] scanInD[9] dockScanR[O] scanInR[2] scanInR[3] scanInR[4] ++scanInR[5] scanInR[3] scanInR[2] scanInR[8] scanInR[9] net@18[8] net@21[8] ++net@21[7] net@21[6] net@21[5] net@21[4] net@15[8] net@27 properStopper +XtokOut tokOut[47] tokOut[48] tokOut[49] tokOut[50] tokOut[51] tokOut[38] ++tokOut[39] tokOut[40] tokOut[41] tokOut[42] tokOut[43] tokOut[44] tokOut[45] ++tokOut[46] tokOut[T] net@7[4] net@7[3] net@7[2] net@7[1] net@7[0] net@7[13] ++net@7[12] net@7[11] net@7[10] net@7[9] net@7[8] net@7[7] net@7[6] net@7[5] ++net@7[14] tokOut[10] tokOut[11] tokOut[12] tokOut[13] tokOut[14] tokOut[15] ++tokOut[16] tokOut[17] tokOut[18] tokOut[19] tokOut[1] tokOut[20] tokOut[21] ++tokOut[22] tokOut[23] tokOut[24] tokOut[25] tokOut[26] tokOut[27] tokOut[28] ++tokOut[29] tokOut[2] tokOut[30] tokOut[31] tokOut[32] tokOut[33] tokOut[34] ++tokOut[35] tokOut[36] tokOut[37] tokOut[3] tokOut[4] tokOut[5] tokOut[6] ++tokOut[7] tokOut[8] tokOut[9] net@7[42] net@7[41] net@7[40] net@7[39] ++net@7[38] net@7[37] net@7[36] net@7[35] net@7[34] net@7[33] net@7[51] ++net@7[32] net@7[31] net@7[30] net@7[29] net@7[28] net@7[27] net@7[26] ++net@7[25] net@7[24] net@7[23] net@7[50] net@7[22] net@7[21] net@7[20] ++net@7[19] net@7[18] net@7[17] net@7[16] net@7[15] net@7[49] net@7[48] ++net@7[47] net@7[46] net@7[45] net@7[44] net@7[43] tokOut[S] net@18[8] ++scanInC[2] scanInC[3] scanInC[4] scanInC[5] scanInC[3] scanInC[2] scanInC[8] ++scanInC[9] net@21[8] net@21[7] net@21[6] net@21[5] net@21[4] scanInD[6] ++scanInD[7] scanInD[8] scanInD[9] net@15[8] scanInR[2] scanInR[3] scanInR[4] ++scanInR[5] scanInR[3] scanInR[2] scanInR[8] scanInR[9] net@50[8] net@47[8] ++net@47[7] net@47[6] net@47[5] net@47[4] net@53[8] net@25 properStopper +.END diff --git a/testCode/isolatedInDock.xml b/testCode/isolatedInDock.xml new file mode 100644 index 0000000..d824f6d --- /dev/null +++ b/testCode/isolatedInDock.xml @@ -0,0 +1,438 @@ + + + + + + + + + + + + + + + + + + + + + + + + + +'> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +'> + + + + + + + + + + + + + + + + + + + + +'> + &scanJ_scanFx3hor_sic_1_; +'> + &scanJ_scanEx2vert_sir_1_; +'> + &scanJ_scanFx2vert_sic_1_; +'> + &scanJ_scanEx2vert_sir_1_; +'> + &scanJ_scanEx1vertA_sir_1_; +'> + +'> + &stageGroupsJ_plainStageFour_rscanIn_1_; +'> + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; +'> + ®istersJ_data1in38scan_sid_1_; + ®istersJ_addr1in14scan_sin; +'> + + + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; + &latchGroupsK_latchWscan_sin; +'> + +'> + + +'> + + +'> + + + +'> + &stagesJ_plainStage_sir_1_; + &stagesJ_plainStage_sir_1_; + &stagesJ_plainStage_sir_1_; + &stagesJ_plainStage_sir_1_; +'> + &stagesJ_fillStage_sic_1_; + &stagesJ_drainStage_sic_1_; +'> + &stagesJ_fillStage_sid_1_; +'> + &stagesJ_fillStage_sir_1_; + &stagesJ_drainStage_sir_1_; +'> + &gaspJ_gaspDrain_sic_1_; +'> + &gaspJ_gaspDrain_sir_1_; +'> + &gaspJ_gaspFill_sic_1_; +'> + ®istersJ_all1in52scan_sid_1_; +'> + &gaspJ_gaspFill_sir_1_; +'> + &gaspJ_gaspPlain_sir_1_; +'> +]> + + + + + + &stageGroupsJ_properStopper_sic_1_; + &stageGroupsJ_properStopper_sic_1_; + &stageGroupsJ_properStopper_sic_1_; + &stageGroupsJ_properStopper_sic_1_; + + + &stageGroupsJ_properStopper_sid_1_; + &stageGroupsJ_properStopper_sid_1_; + &stageGroupsJ_properStopper_sid_1_; + &stageGroupsJ_properStopper_sid_1_; + + + &stageGroupsJ_properStopper_sir_1_; + &marina_inputDock_sin; + &stageGroupsJ_properStopper_sir_1_; + &stageGroupsJ_properStopper_sir_1_; + &stageGroupsJ_properStopper_sir_1_; + + + + &marina_isolatedInDock_control_dataNets; + &marina_isolatedInDock_data_dataNets; + &marina_isolatedInDock_report_dataNets; + + + diff --git a/testCode/marina.bsh b/testCode/marina.bsh index 3d51c7a..a067659 100644 --- a/testCode/marina.bsh +++ b/testCode/marina.bsh @@ -13,9 +13,10 @@ import com.sun.electric.plugins.menus.ScanChainXML; // (optional:) data out port name (may be "" or null), // data out bar port name (may be "" or null). // Both data out and data out bar must be specified or left out. - gen.addScanChainElement("scanJ", "scanCellE", "R", "-", "sin", "sout", "dIn[1](R)", ""); - gen.addScanChainElement("scanJ", "scanCellF", "RW", "L", "sin", "sout", "out[1](R)", "pLO(WI)"); - gen.addScanChainElement("latchGroupsK", "latchWscan", "RW", "-", "sin", "sout", "pLO(WI)", "out[1](R)"); + gen.addScanChainElement("scanJ", "scanCellE", "RW", "-", "sin", "sout", "dIn[1](R)", "latch2in@0.dataBar(WI)"); + gen.addScanChainElement("scanJ", "scanCellF", "RW", "L", "sin", "sout", "dout[1](R)", "latch2in@1.dataBar(WI)"); + //gen.addScanChainElement("latchGroupsK", "latchWscan", "RW", "-", "sin", "sout", "scanCell@2.latch2in@0.dataBar(WI)", "out[1](R)"); + //gen.addScanChainElement("latchGroupsK", "latchWscan", "RW", "-", "sin", "sout", "hi2inLat@1.dataBar(WI)", "out[1](R)"); //gen.addScanChainElement("scanF", "iScanShift", "R", "-", "sdin", "sdout", "rddata(RI)", ""); @@ -34,13 +35,10 @@ import com.sun.electric.plugins.menus.ScanChainXML; // gen.addJtagPort(1, "leaf1[1]", "leaf1[8]", "jtag_noise"); // gen.addJtagPort(2, "leaf2[1]", "leaf2[8]", "jtag_exp"); - // Generate the XML file - // gen.setOutput("/import/async/cad/2007/stu/infinity/fleetF-05jul07s/crosser.xml"); - // gen.startFromExport("sin","samplers_5{sch}"); - // gen.start("sampler_float","samplers_5{sch}"); - - gen.setOutput("marina.xml"); - gen.startFromExport("scanInR[1]", "jtag_dockTest_report"); - gen.startFromExport("scanInC[1]", "jtag_dockTest_control"); - gen.startFromExport("scanInD[1]", "jtag_dockTest_data"); - gen.start("marina","dockTest{sch}"); + // Generate xml for isolatedInDock only. This is for simulations that include only + // one input dock. + gen.setOutput("isolatedInDock.xml"); + gen.startFromExport("scanInR[1]", "isolatedInDock_report"); + gen.startFromExport("scanInC[1]", "isolatedInDock_control"); + gen.startFromExport("scanInD[1]", "isolatedInDock_data"); + gen.start("marina","isolatedInDock{sch}"); diff --git a/testCode/marina.xml b/testCode/marina.xml index a5ad6f6..3661097 100644 --- a/testCode/marina.xml +++ b/testCode/marina.xml @@ -9,140 +9,140 @@ - - - - - - - - - + + + + + + + + + + '> - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + '> - - - - - - - - - - - + + + + + + + + + + + + '> &scanJ_scanFx3hor_sic_1_; @@ -167,17 +167,17 @@ ®istersJ_addr1in14scan_sin; '> - + + '> + '> - + + '>