From 1a4cc1fa657b01f5cba8673fb346c23d06d61983 Mon Sep 17 00:00:00 2001
From: rkao <rkao>
Date: Thu, 30 Oct 2008 22:06:17 +0000
Subject: [PATCH] Connect partially complete dock to instruction port

---
 testCode/isolatedInDock.spi | 8683 ++++++++++++++++++++++++++++++++++++++++++-
 testCode/isolatedInDock.xml |  546 +--
 testCode/marina.bsh         |    1 +
 3 files changed, 8992 insertions(+), 238 deletions(-)

diff --git a/testCode/isolatedInDock.spi b/testCode/isolatedInDock.spi
index 80a5c1f..bfc5557 100644
--- a/testCode/isolatedInDock.spi
+++ b/testCode/isolatedInDock.spi
@@ -1,7 +1,7 @@
 *** SPICE deck for cell isolatedInDock{sch} from library marina
 *** Created on Fri Sep 05, 2008 15:05:59
 *** Last revised on Thu Sep 11, 2008 14:57:39
-*** Written on Thu Oct 30, 2008 09:16:52 by Electric VLSI Design System, 
+*** Written on Thu Oct 30, 2008 14:07:55 by Electric VLSI Design System, 
 *version 8.08k
 *** Layout tech: cmos90, foundry TSMC
 *** UC SPICE *** , MIN_RESIST 50.0, MIN_CAPAC 0.04FF
@@ -1846,8 +1846,8622 @@ Xstg[4] net@48[4] net@48[3] net@48[2] net@48[1] net@48[0] net@48[13]
 +rscanIn[6] rscanIn[7] rscanIn[8] rscanIn[9] rscanOut[1] succ plainStage
 .ENDS plainStageFour
 
+*** CELL: wiresL:bitAssignments{sch}
+.SUBCKT bitAssignments
+.ENDS bitAssignments
+
+*** CELL: orangeTSMC090nm:PMOSx{sch}
+.SUBCKT PMOSx-X_15 d g s
+MPMOSf@0 d g s vdd pch W='90*(1+ABP/sqrt(90*2))' L='2'  
++DELVTO='AVT0P/sqrt(90*2)'
+.ENDS PMOSx-X_15
+
+*** CELL: redFour:nand2LT_sy{sch}
+.SUBCKT nand2LT_sy-X_30 ina inb out
+XPMOS@0 out ina vdd PMOSx-X_15
+XPMOS@1 out inb vdd PMOSx-X_15
+Xnms2_sy@0 out ina inb nms2_sy-X_30
+.ENDS nand2LT_sy-X_30
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-399_2-R_34_667m a b
+Ccap@0 gnd net@14 1.464f
+Ccap@1 gnd net@8 1.464f
+Ccap@2 gnd net@11 1.464f
+Rres@0 net@14 a 2.306
+Rres@1 net@11 net@14 4.613
+Rres@2 b net@8 2.306
+Rres@3 net@8 net@11 4.613
+.ENDS wire-C_0_011f-399_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-399_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-399_2-R_34_667m
+.ENDS wire90-399_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1013_8-R_34_667m a b
+Ccap@0 gnd net@14 3.717f
+Ccap@1 gnd net@8 3.717f
+Ccap@2 gnd net@11 3.717f
+Rres@0 net@14 a 5.858
+Rres@1 net@11 net@14 11.715
+Rres@2 b net@8 5.858
+Rres@3 net@8 net@11 11.715
+.ENDS wire-C_0_011f-1013_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1013_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1013_8-R_34_667m
+.ENDS wire90-1013_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-468_3-R_34_667m a b
+Ccap@0 gnd net@14 1.717f
+Ccap@1 gnd net@8 1.717f
+Ccap@2 gnd net@11 1.717f
+Rres@0 net@14 a 2.706
+Rres@1 net@11 net@14 5.411
+Rres@2 b net@8 2.706
+Rres@3 net@8 net@11 5.411
+.ENDS wire-C_0_011f-468_3-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-468_3-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-468_3-R_34_667m
+.ENDS wire90-468_3-layer_1-width_3
+
+*** CELL: centersJ:ctrAND2in100LT{sch}
+.SUBCKT ctrAND2in100LT inA inB out
+Xinv@8 inB net@135 inv-X_10
+Xinv@9 inA net@139 inv-X_10
+Xinv@10 net@146 out inv-X_100
+Xnand2LT_@0 net@140 net@136 net@144 nand2LT_sy-X_30
+Xwire90@4 net@135 net@136 wire90-399_2-layer_1-width_3
+Xwire90@5 net@144 net@146 wire90-1013_8-layer_1-width_3
+Xwire90@6 net@139 net@140 wire90-468_3-layer_1-width_3
+.ENDS ctrAND2in100LT
+
+*** CELL: orangeTSMC090nm:NMOSx{sch}
+.SUBCKT NMOSx-X_4 d g s
+MNMOSf@0 d g s gnd nch W='12*(1+ABN/sqrt(12*2))' L='2' 
++DELVTO='AVT0N/sqrt(12*2)'
+.ENDS NMOSx-X_4
+
+*** CELL: redFour:inv{sch}
+.SUBCKT inv-X_4 in out
+XNMOS@0 out in gnd NMOSx-X_4
+XPMOS@0 out in vdd PMOSx-X_4
+.ENDS inv-X_4
+
+*** CELL: orangeTSMC090nm:PMOSx{sch}
+.SUBCKT PMOSx-X_3_999 d g s
+MPMOSf@0 d g s vdd pch W='23.994*(1+ABP/sqrt(23.994*2))' L='2'  
++DELVTO='AVT0P/sqrt(23.994*2)'
+.ENDS PMOSx-X_3_999
+
+*** CELL: redFour:pms3{sch}
+.SUBCKT pms3-X_1_333 d g g2 g3
+XPMOS@0 d g3 net@2 PMOSx-X_3_999
+XPMOS@1 net@2 g2 net@5 PMOSx-X_3_999
+XPMOS@2 net@5 g vdd PMOSx-X_3_999
+.ENDS pms3-X_1_333
+
+*** CELL: driversL:predDri20wMC{sch}
+.SUBCKT predDri20wMC in mc pred
+XNMOSx@0 pred in gnd NMOSx-X_20
+XNMOSx@1 pred mc gnd NMOSx-X_4
+Xinv@0 pred net@145 inv-X_4
+Xpms3@0 pred net@177 in mc pms3-X_1_333
+Xwire90@0 net@177 net@145 wire90-243_6-layer_1-width_3
+.ENDS predDri20wMC
+
+*** CELL: orangeTSMC090nm:PMOSx{sch}
+.SUBCKT PMOSx-X_6 d g s
+MPMOSf@0 d g s vdd pch W='36*(1+ABP/sqrt(36*2))' L='2'  
++DELVTO='AVT0P/sqrt(36*2)'
+.ENDS PMOSx-X_6
+
+*** CELL: redFour:inv{sch}
+.SUBCKT inv-X_6 in out
+XNMOS@0 out in gnd NMOSx-X_6
+XPMOS@0 out in vdd PMOSx-X_6
+.ENDS inv-X_6
+
+*** CELL: redFour:nms2{sch}
+.SUBCKT nms2-X_2 d g g2
+XNMOS@0 d g2 net@0 NMOSx-X_4
+XNMOS@1 net@0 g gnd NMOSx-X_4
+.ENDS nms2-X_2
+
+*** CELL: driversL:sucDri20{sch}
+.SUBCKT sucDri20 in succ
+XPMOSx@0 succ net@46 vdd PMOSx-X_20
+Xinv@1 succ net@94 inv-X_4
+Xinv@2 in net@110 inv-X_6
+Xnms2@0 succ net@117 net@46 nms2-X_2
+Xwire90@0 net@117 net@94 wire90-124_7-layer_1-width_3
+Xwire90@1 net@110 net@46 wire90-503_4-layer_1-width_3
+.ENDS sucDri20
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-247_2-R_34_667m a b
+Ccap@0 gnd net@14 0.906f
+Ccap@1 gnd net@8 0.906f
+Ccap@2 gnd net@11 0.906f
+Rres@0 net@14 a 1.428
+Rres@1 net@11 net@14 2.857
+Rres@2 b net@8 1.428
+Rres@3 net@8 net@11 2.857
+.ENDS wire-C_0_011f-247_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-247_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-247_2-R_34_667m
+.ENDS wire90-247_2-layer_1-width_3
+
+*** CELL: gaspL:aStageB{sch}
+.SUBCKT aStageB fire mc pred s[1] succ
+XctrAND2i@7 succ net@986 fire ctrAND2in100LT
+Xinv@4 net@987 s[1] inv-X_10
+Xinv@5 pred net@987 inv-X_5
+XpredDri2@1 fire mc pred predDri20wMC
+XsucDri20@1 fire succ sucDri20
+Xwire90@0 net@987 net@986 wire90-247_2-layer_1-width_3
+.ENDS aStageB
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-123_7-R_34_667m a b
+Ccap@0 gnd net@14 0.454f
+Ccap@1 gnd net@8 0.454f
+Ccap@2 gnd net@11 0.454f
+Rres@0 net@14 a 0.715
+Rres@1 net@11 net@14 1.429
+Rres@2 b net@8 0.715
+Rres@3 net@8 net@11 1.429
+.ENDS wire-C_0_011f-123_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-123_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-123_7-R_34_667m
+.ENDS wire90-123_7-layer_1-width_3
+
+*** CELL: latchPartsK:latchPointT{sch}
+.SUBCKT latchPointT hcl in[1] x[F] x[T]
+XPMOSx@0 in[1] hcl x[T] NMOSx-X_6
+XPMOSx@1 net@8 hcl x[F] NMOSx-X_3
+Xinv@0 in[1] net@105 invLT-X_5
+Xwire90@0 net@105 net@8 wire90-123_7-layer_1-width_3
+.ENDS latchPointT
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-180_9-R_34_667m a b
+Ccap@0 gnd net@14 0.663f
+Ccap@1 gnd net@8 0.663f
+Ccap@2 gnd net@11 0.663f
+Rres@0 net@14 a 1.045
+Rres@1 net@11 net@14 2.09
+Rres@2 b net@8 1.045
+Rres@3 net@8 net@11 2.09
+.ENDS wire-C_0_011f-180_9-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-180_9-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-180_9-R_34_667m
+.ENDS wire90-180_9-layer_1-width_3
+
+*** CELL: latchesK:raw1inLatchT{sch}
+.SUBCKT raw1inLatchT hcl[A] inA[1] out[T]
+XlatchFlo@0 out[T] net@29 latchKeep
+XlatchPoi@0 hcl[A] inA[1] net@7 out[T] latchPointT
+Xwire90@0 net@7 net@29 wire90-180_9-layer_1-width_3
+.ENDS raw1inLatchT
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-250_9-R_34_667m a b
+Ccap@0 gnd net@14 0.92f
+Ccap@1 gnd net@8 0.92f
+Ccap@2 gnd net@11 0.92f
+Rres@0 net@14 a 1.45
+Rres@1 net@11 net@14 2.899
+Rres@2 b net@8 1.45
+Rres@3 net@8 net@11 2.899
+.ENDS wire-C_0_011f-250_9-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-250_9-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-250_9-R_34_667m
+.ENDS wire90-250_9-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-214_6-R_34_667m a b
+Ccap@0 gnd net@14 0.787f
+Ccap@1 gnd net@8 0.787f
+Ccap@2 gnd net@11 0.787f
+Rres@0 net@14 a 1.24
+Rres@1 net@11 net@14 2.48
+Rres@2 b net@8 1.24
+Rres@3 net@8 net@11 2.48
+.ENDS wire-C_0_011f-214_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-214_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-214_6-R_34_667m
+.ENDS wire90-214_6-layer_1-width_3
+
+*** CELL: latchesK:latch1in20B{sch}
+.SUBCKT latch1in20B hcl in[1] out[1]
+Xhi2inLat@0 hcl in[1] net@19 raw1inLatchT
+Xinv@0 net@23 out[1] inv-X_20
+XinvLT@0 net@18 net@25 inv-X_5
+Xwire90@0 net@19 net@18 wire90-250_9-layer_1-width_3
+Xwire90@1 net@25 net@23 wire90-214_6-layer_1-width_3
+.ENDS latch1in20B
+
+*** CELL: registersL:ins20Bx18{sch}
+.SUBCKT ins20Bx18 hcl[1] in[10] in[11] in[12] in[13] in[14] in[15] in[16] 
++in[17] in[18] in[1] in[2] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] 
++out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[1] out[2] 
++out[3] out[4] out[5] out[6] out[7] out[8] out[9]
+Xlx[1] hcl[1] in[1] out[1] latch1in20B
+Xlx[2] hcl[1] in[2] out[2] latch1in20B
+Xlx[3] hcl[1] in[3] out[3] latch1in20B
+Xlx[4] hcl[1] in[4] out[4] latch1in20B
+Xlx[5] hcl[1] in[5] out[5] latch1in20B
+Xlx[6] hcl[1] in[6] out[6] latch1in20B
+Xlx[7] hcl[1] in[7] out[7] latch1in20B
+Xlx[8] hcl[1] in[8] out[8] latch1in20B
+Xlx[9] hcl[1] in[9] out[9] latch1in20B
+Xlx[10] hcl[1] in[10] out[10] latch1in20B
+Xlx[11] hcl[1] in[11] out[11] latch1in20B
+Xlx[12] hcl[1] in[12] out[12] latch1in20B
+Xlx[13] hcl[1] in[13] out[13] latch1in20B
+Xlx[14] hcl[1] in[14] out[14] latch1in20B
+Xlx[15] hcl[1] in[15] out[15] latch1in20B
+Xlx[16] hcl[1] in[16] out[16] latch1in20B
+Xlx[17] hcl[1] in[17] out[17] latch1in20B
+Xlx[18] hcl[1] in[18] out[18] latch1in20B
+.ENDS ins20Bx18
+
+*** CELL: registersL:ins20Bx36{sch}
+.SUBCKT ins20Bx36 hcl[1] in[10] in[11] in[12] in[13] in[14] in[15] in[16] 
++in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] 
++in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] 
++in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] out[12] out[13] 
++out[14] out[15] out[16] out[17] out[18] out[19] out[1] out[20] out[21] 
++out[22] out[23] out[24] out[25] out[26] out[27] out[28] out[29] out[2] 
++out[30] out[31] out[32] out[33] out[34] out[35] out[36] out[3] out[4] out[5] 
++out[6] out[7] out[8] out[9]
+Xins20Bx1@0 hcl[1] in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] 
++in[18] in[1] in[2] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] 
++out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[1] out[2] out[3] 
++out[4] out[5] out[6] out[7] out[8] out[9] ins20Bx18
+Xins20Bx1@1 hcl[1] in[28] in[29] in[30] in[31] in[32] in[33] in[34] in[35] 
++in[36] in[19] in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] out[28] 
++out[29] out[30] out[31] out[32] out[33] out[34] out[35] out[36] out[19] 
++out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] ins20Bx18
+.ENDS ins20Bx36
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-544_2-R_34_667m a b
+Ccap@0 gnd net@14 1.995f
+Ccap@1 gnd net@8 1.995f
+Ccap@2 gnd net@11 1.995f
+Rres@0 net@14 a 3.144
+Rres@1 net@11 net@14 6.289
+Rres@2 b net@8 3.144
+Rres@3 net@8 net@11 6.289
+.ENDS wire-C_0_011f-544_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-544_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-544_2-R_34_667m
+.ENDS wire90-544_2-layer_1-width_3
+
+*** CELL: driversJ:latchDriver60{sch}
+.SUBCKT latchDriver60 in out
+Xinv@0 net@8 out inv-X_60
+Xinv@1 in net@16 inv-X_20
+Xwire90@0 net@16 net@8 wire90-544_2-layer_1-width_3
+.ENDS latchDriver60
+
+*** CELL: orangeTSMC090nm:PMOSx{sch}
+.SUBCKT PMOSx-X_2 d g s
+MPMOSf@0 d g s vdd pch W='12*(1+ABP/sqrt(12*2))' L='2'  
++DELVTO='AVT0P/sqrt(12*2)'
+.ENDS PMOSx-X_2
+
+*** CELL: redFour:pms2{sch}
+.SUBCKT pms2-X_1 d g g2
+XPMOS@0 net@2 g vdd PMOSx-X_2
+XPMOS@1 d g2 net@2 PMOSx-X_2
+.ENDS pms2-X_1
+
+*** CELL: redFour:pms2{sch}
+.SUBCKT pms2-X_2 d g g2
+XPMOS@0 net@2 g vdd PMOSx-X_4
+XPMOS@1 d g2 net@2 PMOSx-X_4
+.ENDS pms2-X_2
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-185-R_34_667m a b
+Ccap@0 gnd net@14 0.678f
+Ccap@1 gnd net@8 0.678f
+Ccap@2 gnd net@11 0.678f
+Rres@0 net@14 a 1.069
+Rres@1 net@11 net@14 2.138
+Rres@2 b net@8 1.069
+Rres@3 net@8 net@11 2.138
+.ENDS wire-C_0_011f-185-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-185-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-185-R_34_667m
+.ENDS wire90-185-layer_1-width_3
+
+*** CELL: latchesK:mlat1in10{sch}
+.SUBCKT mlat1in10 cl[F] cl[T] in[1] out[1]
+Xinv@0 net@26 out[1] inv-X_10
+Xnms2@0 net@4 out[1] cl[F] nms2-X_2
+Xnms2@1 net@4 in[1] cl[T] nms2-X_2
+Xpms2@0 net@4 out[1] cl[T] pms2-X_1
+Xpms2@1 net@4 in[1] cl[F] pms2-X_2
+Xwire90@0 net@4 net@26 wire90-185-layer_1-width_3
+.ENDS mlat1in10
+
+*** CELL: redFour:nms2{sch}
+.SUBCKT nms2-X_3 d g g2
+XNMOS@0 d g2 net@0 NMOSx-X_6
+XNMOS@1 net@0 g gnd NMOSx-X_6
+.ENDS nms2-X_3
+
+*** CELL: redFour:nms3{sch}
+.SUBCKT nms3-X_2 d g g2 g3
+XNMOS@0 d g3 net@6 NMOSx-X_6
+XNMOS@1 net@7 g gnd NMOSx-X_6
+XNMOS@2 net@6 g2 net@7 NMOSx-X_6
+.ENDS nms3-X_2
+
+*** CELL: redFour:pms2{sch}
+.SUBCKT pms2-X_2_5 d g g2
+XPMOS@0 net@2 g vdd PMOSx-X_5
+XPMOS@1 d g2 net@2 PMOSx-X_5
+.ENDS pms2-X_2_5
+
+*** CELL: orangeTSMC090nm:PMOSx{sch}
+.SUBCKT PMOSx-X_3 d g s
+MPMOSf@0 d g s vdd pch W='18*(1+ABP/sqrt(18*2))' L='2'  
++DELVTO='AVT0P/sqrt(18*2)'
+.ENDS PMOSx-X_3
+
+*** CELL: redFour:pms3{sch}
+.SUBCKT pms3-X_1 d g g2 g3
+XPMOS@0 d g3 net@2 PMOSx-X_3
+XPMOS@1 net@2 g2 net@5 PMOSx-X_3
+XPMOS@2 net@5 g vdd PMOSx-X_3
+.ENDS pms3-X_1
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-339_3-R_34_667m a b
+Ccap@0 gnd net@14 1.244f
+Ccap@1 gnd net@8 1.244f
+Ccap@2 gnd net@11 1.244f
+Rres@0 net@14 a 1.96
+Rres@1 net@11 net@14 3.921
+Rres@2 b net@8 1.96
+Rres@3 net@8 net@11 3.921
+.ENDS wire-C_0_011f-339_3-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-339_3-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-339_3-R_34_667m
+.ENDS wire90-339_3-layer_1-width_3
+
+*** CELL: latchesK:mlat2in10{sch}
+.SUBCKT mlat2in10 clA[F] clA[T] clB[F] clB[T] inA inB out[1]
+Xinv@0 net@26 out[1] inv-X_10
+Xnms2@0 net@4 inB clB[T] nms2-X_3
+Xnms2@1 net@4 inA clA[T] nms2-X_3
+Xnms3@0 net@4 clA[F] out[1] clB[F] nms3-X_2
+Xpms2@0 net@4 inB clB[F] pms2-X_2_5
+Xpms2@1 net@4 inA clA[F] pms2-X_2_5
+Xpms3@0 net@4 clA[T] out[1] clB[T] pms3-X_1
+Xwire90@0 net@4 net@26 wire90-339_3-layer_1-width_3
+.ENDS mlat2in10
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-271_1-R_34_667m a b
+Ccap@0 gnd net@14 0.994f
+Ccap@1 gnd net@8 0.994f
+Ccap@2 gnd net@11 0.994f
+Rres@0 net@14 a 1.566
+Rres@1 net@11 net@14 3.133
+Rres@2 b net@8 1.566
+Rres@3 net@8 net@11 3.133
+.ENDS wire-C_0_011f-271_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-271_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-271_1-R_34_667m
+.ENDS wire90-271_1-layer_1-width_3
+
+*** CELL: scanK:scanCellKh{sch}
+.SUBCKT scanCellKh clS[F] clS[T] cl[F] cl[T] din[1] rd[F] rd[T] sin sout
+Xmlat1in1@1 cl[F] cl[T] sin net@58 mlat1in10
+Xmlat2in1@2 clS[F] clS[T] rd[F] rd[T] net@69 din[1] sout mlat2in10
+Xwire90@0 net@58 net@69 wire90-271_1-layer_1-width_3
+.ENDS scanCellKh
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-302_4-R_34_667m a b
+Ccap@0 gnd net@14 1.109f
+Ccap@1 gnd net@8 1.109f
+Ccap@2 gnd net@11 1.109f
+Rres@0 net@14 a 1.747
+Rres@1 net@11 net@14 3.494
+Rres@2 b net@8 1.747
+Rres@3 net@8 net@11 3.494
+.ENDS wire-C_0_011f-302_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-302_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-302_4-R_34_667m
+.ENDS wire90-302_4-layer_1-width_3
+
+*** CELL: scanK:scanKhx2{sch}
+.SUBCKT scanKhx2 clS[F] clS[T] cl[F] cl[T] din[1] din[2] mc rd[F] rd[T] sin 
++sout
+XscanCell@1 clS[F] clS[T] cl[F] cl[T] din[1] rd[F] rd[T] sin net@20 
++scanCellKh
+XscanCell@2 clS[F] clS[T] cl[F] cl[T] din[2] rd[F] rd[T] net@19 sout 
++scanCellKh
+Xwire90@0 net@20 net@19 wire90-302_4-layer_1-width_3
+.ENDS scanKhx2
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3715_9-R_34_667m a b
+Ccap@0 gnd net@14 13.625f
+Ccap@1 gnd net@8 13.625f
+Ccap@2 gnd net@11 13.625f
+Rres@0 net@14 a 21.47
+Rres@1 net@11 net@14 42.939
+Rres@2 b net@8 21.47
+Rres@3 net@8 net@11 42.939
+.ENDS wire-C_0_011f-3715_9-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3715_9-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-3715_9-R_34_667m
+.ENDS wire90-3715_9-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-447_1-R_34_667m a b
+Ccap@0 gnd net@14 1.639f
+Ccap@1 gnd net@8 1.639f
+Ccap@2 gnd net@11 1.639f
+Rres@0 net@14 a 2.583
+Rres@1 net@11 net@14 5.166
+Rres@2 b net@8 2.583
+Rres@3 net@8 net@11 5.166
+.ENDS wire-C_0_011f-447_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-447_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-447_1-R_34_667m
+.ENDS wire90-447_1-layer_1-width_3
+
+*** CELL: fifoL:m1stageD{sch}
+.SUBCKT m1stageD clS[F] clS[T] cl[F] cl[T] fire[1] in[10] in[11] in[12] 
++in[13] in[14] in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] 
++in[23] in[24] in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] 
++in[33] in[34] in[35] in[36] in[3] in[4] in[5] in[6] in[7] in[8] in[9] mc 
++out[10] out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] 
++out[19] out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] 
++out[27] out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] 
++out[35] out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9] pred rd[F] 
++rd[T] s[m2] sin sout succ
+XaStageB@0 fire[1] mc pred net@39 succ aStageB
+Xins20Bx3@0 net@6 in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] 
++in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] 
++in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] in[3] 
++in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] out[12] out[13] out[14] 
++out[15] out[16] out[17] out[18] out[19] out[1] out[20] out[21] out[22] 
++out[23] out[24] out[25] out[26] out[27] out[28] out[29] out[2] out[30] 
++out[31] out[32] out[33] out[34] out[35] out[36] out[3] out[4] out[5] out[6] 
++out[7] out[8] out[9] ins20Bx36
+XlatchDri@0 fire[1] take[1] latchDriver60
+XscanKhx2@0 clS[F] clS[T] cl[F] cl[T] s[m2] s[m1] mc rd[F] rd[T] sin sout 
++scanKhx2
+Xwire90@1 net@6 take[1] wire90-3715_9-layer_1-width_3
+Xwire90@2 net@39 s[m1] wire90-447_1-layer_1-width_3
+.ENDS m1stageD
+
+*** CELL: fifoL:m2stageD{sch}
+.SUBCKT m2stageD fire[1] in[10] in[11] in[12] in[13] in[14] in[15] in[16] 
++in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] 
++in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] 
++in[3] in[4] in[5] in[6] in[7] in[8] in[9] mc out[10] out[11] out[12] out[13] 
++out[14] out[15] out[16] out[17] out[18] out[19] out[1] out[20] out[21] 
++out[22] out[23] out[24] out[25] out[26] out[27] out[28] out[29] out[2] 
++out[30] out[31] out[32] out[33] out[34] out[35] out[36] out[3] out[4] out[5] 
++out[6] out[7] out[8] out[9] pred s[m2] succ
+XaStageB@0 fire[1] mc pred s[m2] succ aStageB
+Xins20Bx3@0 net@6 in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] 
++in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] 
++in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] in[3] 
++in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] out[12] out[13] out[14] 
++out[15] out[16] out[17] out[18] out[19] out[1] out[20] out[21] out[22] 
++out[23] out[24] out[25] out[26] out[27] out[28] out[29] out[2] out[30] 
++out[31] out[32] out[33] out[34] out[35] out[36] out[3] out[4] out[5] out[6] 
++out[7] out[8] out[9] ins20Bx36
+XlatchDri@0 fire[1] take[1] latchDriver60
+Xwire90@1 net@6 take[1] wire90-3715_9-layer_1-width_3
+.ENDS m2stageD
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1239_6-R_26m a b
+Ccap@0 gnd net@14 4.545f
+Ccap@1 gnd net@8 4.545f
+Ccap@2 gnd net@11 4.545f
+Rres@0 net@14 a 5.372
+Rres@1 net@11 net@14 10.743
+Rres@2 b net@8 5.372
+Rres@3 net@8 net@11 10.743
+.ENDS wire-C_0_011f-1239_6-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1239_6-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-1239_6-R_26m
+.ENDS wire90-1239_6-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-631_3-R_26m a b
+Ccap@0 gnd net@14 2.315f
+Ccap@1 gnd net@8 2.315f
+Ccap@2 gnd net@11 2.315f
+Rres@0 net@14 a 2.736
+Rres@1 net@11 net@14 5.471
+Rres@2 b net@8 2.736
+Rres@3 net@8 net@11 5.471
+.ENDS wire-C_0_011f-631_3-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-631_3-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-631_3-R_26m
+.ENDS wire90-631_3-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-605_4-R_26m a b
+Ccap@0 gnd net@14 2.22f
+Ccap@1 gnd net@8 2.22f
+Ccap@2 gnd net@11 2.22f
+Rres@0 net@14 a 2.623
+Rres@1 net@11 net@14 5.247
+Rres@2 b net@8 2.623
+Rres@3 net@8 net@11 5.247
+.ENDS wire-C_0_011f-605_4-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-605_4-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-605_4-R_26m
+.ENDS wire90-605_4-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-613_4-R_26m a b
+Ccap@0 gnd net@14 2.249f
+Ccap@1 gnd net@8 2.249f
+Ccap@2 gnd net@11 2.249f
+Rres@0 net@14 a 2.658
+Rres@1 net@11 net@14 5.316
+Rres@2 b net@8 2.658
+Rres@3 net@8 net@11 5.316
+.ENDS wire-C_0_011f-613_4-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-613_4-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-613_4-R_26m
+.ENDS wire90-613_4-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-623_9-R_26m a b
+Ccap@0 gnd net@14 2.288f
+Ccap@1 gnd net@8 2.288f
+Ccap@2 gnd net@11 2.288f
+Rres@0 net@14 a 2.704
+Rres@1 net@11 net@14 5.407
+Rres@2 b net@8 2.704
+Rres@3 net@8 net@11 5.407
+.ENDS wire-C_0_011f-623_9-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-623_9-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-623_9-R_26m
+.ENDS wire90-623_9-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-625_9-R_26m a b
+Ccap@0 gnd net@14 2.295f
+Ccap@1 gnd net@8 2.295f
+Ccap@2 gnd net@11 2.295f
+Rres@0 net@14 a 2.712
+Rres@1 net@11 net@14 5.424
+Rres@2 b net@8 2.712
+Rres@3 net@8 net@11 5.424
+.ENDS wire-C_0_011f-625_9-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-625_9-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-625_9-R_26m
+.ENDS wire90-625_9-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-607_8-R_26m a b
+Ccap@0 gnd net@14 2.229f
+Ccap@1 gnd net@8 2.229f
+Ccap@2 gnd net@11 2.229f
+Rres@0 net@14 a 2.634
+Rres@1 net@11 net@14 5.268
+Rres@2 b net@8 2.634
+Rres@3 net@8 net@11 5.268
+.ENDS wire-C_0_011f-607_8-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-607_8-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-607_8-R_26m
+.ENDS wire90-607_8-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-620_9-R_26m a b
+Ccap@0 gnd net@14 2.277f
+Ccap@1 gnd net@8 2.277f
+Ccap@2 gnd net@11 2.277f
+Rres@0 net@14 a 2.691
+Rres@1 net@11 net@14 5.381
+Rres@2 b net@8 2.691
+Rres@3 net@8 net@11 5.381
+.ENDS wire-C_0_011f-620_9-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-620_9-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-620_9-R_26m
+.ENDS wire90-620_9-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-612_5-R_26m a b
+Ccap@0 gnd net@14 2.246f
+Ccap@1 gnd net@8 2.246f
+Ccap@2 gnd net@11 2.246f
+Rres@0 net@14 a 2.654
+Rres@1 net@11 net@14 5.308
+Rres@2 b net@8 2.654
+Rres@3 net@8 net@11 5.308
+.ENDS wire-C_0_011f-612_5-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-612_5-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-612_5-R_26m
+.ENDS wire90-612_5-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-602_4-R_26m a b
+Ccap@0 gnd net@14 2.209f
+Ccap@1 gnd net@8 2.209f
+Ccap@2 gnd net@11 2.209f
+Rres@0 net@14 a 2.61
+Rres@1 net@11 net@14 5.221
+Rres@2 b net@8 2.61
+Rres@3 net@8 net@11 5.221
+.ENDS wire-C_0_011f-602_4-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-602_4-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-602_4-R_26m
+.ENDS wire90-602_4-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-607-R_26m a b
+Ccap@0 gnd net@14 2.226f
+Ccap@1 gnd net@8 2.226f
+Ccap@2 gnd net@11 2.226f
+Rres@0 net@14 a 2.63
+Rres@1 net@11 net@14 5.261
+Rres@2 b net@8 2.63
+Rres@3 net@8 net@11 5.261
+.ENDS wire-C_0_011f-607-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-607-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-607-R_26m
+.ENDS wire90-607-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-620_5-R_26m a b
+Ccap@0 gnd net@14 2.275f
+Ccap@1 gnd net@8 2.275f
+Ccap@2 gnd net@11 2.275f
+Rres@0 net@14 a 2.689
+Rres@1 net@11 net@14 5.378
+Rres@2 b net@8 2.689
+Rres@3 net@8 net@11 5.378
+.ENDS wire-C_0_011f-620_5-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-620_5-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-620_5-R_26m
+.ENDS wire90-620_5-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-624_5-R_26m a b
+Ccap@0 gnd net@14 2.29f
+Ccap@1 gnd net@8 2.29f
+Ccap@2 gnd net@11 2.29f
+Rres@0 net@14 a 2.706
+Rres@1 net@11 net@14 5.412
+Rres@2 b net@8 2.706
+Rres@3 net@8 net@11 5.412
+.ENDS wire-C_0_011f-624_5-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-624_5-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-624_5-R_26m
+.ENDS wire90-624_5-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-618-R_26m a b
+Ccap@0 gnd net@14 2.266f
+Ccap@1 gnd net@8 2.266f
+Ccap@2 gnd net@11 2.266f
+Rres@0 net@14 a 2.678
+Rres@1 net@11 net@14 5.356
+Rres@2 b net@8 2.678
+Rres@3 net@8 net@11 5.356
+.ENDS wire-C_0_011f-618-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-618-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-618-R_26m
+.ENDS wire90-618-layer_1-width_4
+
+*** CELL: fifoL:m12stageD{sch}
+.SUBCKT m12stageD clS[F] clS[T] cl[F] cl[T] fire[m1] fire[m2] in[10] in[11] 
++in[12] in[13] in[14] in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] 
++in[22] in[23] in[24] in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] 
++in[32] in[33] in[34] in[35] in[36] in[3] in[4] in[5] in[6] in[7] in[8] in[9] 
++mc out[10] out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] 
++out[19] out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] 
++out[27] out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] 
++out[35] out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9] pout[13] 
++pout[14] pout[15] pout[16] pout[17] pout[18] pred rd[F] rd[T] sin sout succ
+Xinv[1] in[31] pout[13] inv-X_10
+Xinv[2] in[32] pout[14] inv-X_10
+Xinv[3] in[33] pout[15] inv-X_10
+Xinv[4] in[34] pout[16] inv-X_10
+Xinv[5] in[35] pout[17] inv-X_10
+Xinv[6] in[36] pout[18] inv-X_10
+Xm1stageD@1 clS[F] clS[T] cl[F] cl[T] fire[m1] m2[10] m2[11] m2[12] m2[13] 
++m2[14] m2[15] m2[16] m2[17] m2[18] m2[19] m2[1] m2[20] m2[21] m2[22] m2[23] 
++m2[24] m2[25] m2[26] m2[27] m2[28] m2[29] m2[2] m2[30] m2[31] m2[32] m2[33] 
++m2[34] m2[35] m2[36] m2[3] m2[4] m2[5] m2[6] m2[7] m2[8] m2[9] mc out[10] 
++out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] 
++out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] 
++out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] 
++out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9] net@53 rd[F] rd[T] 
++net@36 sin sout succ m1stageD
+Xm2stageD@2 fire[m2] in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] 
++in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] 
++in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] in[3] 
++in[4] in[5] in[6] in[7] in[8] in[9] mc m2[10] m2[11] m2[12] m2[13] m2[14] 
++m2[15] m2[16] m2[17] m2[18] m2[19] m2[1] m2[20] m2[21] m2[22] m2[23] m2[24] 
++m2[25] m2[26] m2[27] m2[28] m2[29] m2[2] m2[30] m2[31] m2[32] m2[33] m2[34] 
++m2[35] m2[36] m2[3] m2[4] m2[5] m2[6] m2[7] m2[8] m2[9] pred s[m2] net@52 
++m2stageD
+Xwire90@0 net@52 net@53 wire90-1239_6-layer_1-width_4
+Xwire90@1 s[m2] net@36 wire90-631_3-layer_1-width_4
+Xwire90@2 m2[1] wire90@2_b wire90-605_4-layer_1-width_4
+Xwire90@3 m2[2] wire90@3_b wire90-613_4-layer_1-width_4
+Xwire90@4 m2[3] wire90@4_b wire90-605_4-layer_1-width_4
+Xwire90@5 m2[4] wire90@5_b wire90-623_9-layer_1-width_4
+Xwire90@6 m2[5] wire90@6_b wire90-605_4-layer_1-width_4
+Xwire90@7 m2[6] wire90@7_b wire90-625_9-layer_1-width_4
+Xwire90@8 m2[7] wire90@8_b wire90-607_8-layer_1-width_4
+Xwire90@9 m2[8] wire90@9_b wire90-620_9-layer_1-width_4
+Xwire90@10 m2[9] wire90@10_b wire90-605_4-layer_1-width_4
+Xwire90@11 m2[10] wire90@11_b wire90-612_5-layer_1-width_4
+Xwire90@12 m2[11] wire90@12_b wire90-602_4-layer_1-width_4
+Xwire90@13 m2[12] wire90@13_b wire90-607-layer_1-width_4
+Xwire90@14 m2[13] wire90@14_b wire90-602_4-layer_1-width_4
+Xwire90@15 m2[14] wire90@15_b wire90-620_5-layer_1-width_4
+Xwire90@16 m2[15] wire90@16_b wire90-602_4-layer_1-width_4
+Xwire90@17 m2[16] wire90@17_b wire90-624_5-layer_1-width_4
+Xwire90@18 m2[17] wire90@18_b wire90-602_4-layer_1-width_4
+Xwire90@19 m2[18] wire90@19_b wire90-618-layer_1-width_4
+Xwire90@20 m2[19] wire90@20_b wire90-605_4-layer_1-width_4
+Xwire90@21 m2[20] wire90@21_b wire90-613_4-layer_1-width_4
+Xwire90@22 m2[21] wire90@22_b wire90-605_4-layer_1-width_4
+Xwire90@23 m2[22] wire90@23_b wire90-623_9-layer_1-width_4
+Xwire90@24 m2[23] wire90@24_b wire90-605_4-layer_1-width_4
+Xwire90@25 m2[24] wire90@25_b wire90-625_9-layer_1-width_4
+Xwire90@26 m2[25] wire90@26_b wire90-607_8-layer_1-width_4
+Xwire90@27 m2[26] wire90@27_b wire90-620_9-layer_1-width_4
+Xwire90@28 m2[27] wire90@28_b wire90-605_4-layer_1-width_4
+Xwire90@29 m2[28] wire90@29_b wire90-612_5-layer_1-width_4
+Xwire90@30 m2[29] wire90@30_b wire90-602_4-layer_1-width_4
+Xwire90@31 m2[30] wire90@31_b wire90-607-layer_1-width_4
+Xwire90@32 m2[31] wire90@32_b wire90-602_4-layer_1-width_4
+Xwire90@33 m2[32] wire90@33_b wire90-620_5-layer_1-width_4
+Xwire90@34 m2[33] wire90@34_b wire90-602_4-layer_1-width_4
+Xwire90@35 m2[34] wire90@35_b wire90-624_5-layer_1-width_4
+Xwire90@36 m2[35] wire90@36_b wire90-602_4-layer_1-width_4
+Xwire90@37 m2[36] wire90@37_b wire90-618-layer_1-width_4
+.ENDS m12stageD
+
+*** CELL: redFour:nand2_sy{sch}
+.SUBCKT nand2_sy-X_40 ina inb out
+XPMOS@0 out inb vdd PMOSx-X_40
+XPMOS@1 out ina vdd PMOSx-X_40
+Xnms2_sy@0 out ina inb nms2_sy-X_40
+.ENDS nand2_sy-X_40
+
+*** CELL: redFour:pms2{sch}
+.SUBCKT pms2-X_5 d g g2
+XPMOS@0 net@2 g vdd PMOSx-X_10
+XPMOS@1 d g2 net@2 PMOSx-X_10
+.ENDS pms2-X_5
+
+*** CELL: redFour:pms2_sy{sch}
+.SUBCKT pms2_sy-X_10 d g g2
+Xpms2@0 d g g2 pms2-X_5
+Xpms2@1 d g2 g pms2-X_5
+.ENDS pms2_sy-X_10
+
+*** CELL: redFour:nor2HT_sy{sch}
+.SUBCKT nor2HT_sy-X_10 ina inb out
+XNMOS@0 out inb gnd NMOSx-X_5
+XNMOS@1 out ina gnd NMOSx-X_5
+Xpms2_sy@0 out ina inb pms2_sy-X_10
+.ENDS nor2HT_sy-X_10
+
+*** CELL: redFour:nor2_sy{sch}
+.SUBCKT nor2_sy-X_10 ina inb out
+XNMOS@0 out inb gnd NMOSx-X_10
+XNMOS@1 out ina gnd NMOSx-X_10
+Xpms2_sy@0 out ina inb pms2_sy-X_10
+.ENDS nor2_sy-X_10
+
+*** CELL: redFour:nor2n_sy{sch}
+.SUBCKT nor2n_sy-X_10 ina inb out
+Xnor2@0 ina inb out nor2_sy-X_10
+.ENDS nor2n_sy-X_10
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-521_7-R_34_667m a b
+Ccap@0 gnd net@14 1.913f
+Ccap@1 gnd net@8 1.913f
+Ccap@2 gnd net@11 1.913f
+Rres@0 net@14 a 3.014
+Rres@1 net@11 net@14 6.029
+Rres@2 b net@8 3.014
+Rres@3 net@8 net@11 6.029
+.ENDS wire-C_0_011f-521_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-521_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-521_7-R_34_667m
+.ENDS wire90-521_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-509_8-R_34_667m a b
+Ccap@0 gnd net@14 1.869f
+Ccap@1 gnd net@8 1.869f
+Ccap@2 gnd net@11 1.869f
+Rres@0 net@14 a 2.946
+Rres@1 net@11 net@14 5.891
+Rres@2 b net@8 2.946
+Rres@3 net@8 net@11 5.891
+.ENDS wire-C_0_011f-509_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-509_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-509_8-R_34_667m
+.ENDS wire90-509_8-layer_1-width_3
+
+*** CELL: centersJ:ctrAND4in40{sch}
+.SUBCKT ctrAND4in40 inA inB inC inD out
+Xnand2_sy@0 net@58 net@43 out nand2_sy-X_40
+Xnor2HT_s@1 inA inB net@61 nor2HT_sy-X_10
+Xnor2n_sy@0 inD inC net@64 nor2n_sy-X_10
+Xwire90@0 net@64 net@43 wire90-521_7-layer_1-width_3
+Xwire90@2 net@61 net@58 wire90-509_8-layer_1-width_3
+.ENDS ctrAND4in40
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-413_4-R_34_667m a b
+Ccap@0 gnd net@14 1.516f
+Ccap@1 gnd net@8 1.516f
+Ccap@2 gnd net@11 1.516f
+Rres@0 net@14 a 2.389
+Rres@1 net@11 net@14 4.777
+Rres@2 b net@8 2.389
+Rres@3 net@8 net@11 4.777
+.ENDS wire-C_0_011f-413_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-413_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-413_4-R_34_667m
+.ENDS wire90-413_4-layer_1-width_3
+
+*** CELL: gaspL:odStage{sch}
+.SUBCKT odStage do[L] do[M] do[RQ] fire[ODE] fire[OD] mc pred s[1]
+XctrAND4i@0 net@863 do[RQ] do[L] do[M] fire[ODE] ctrAND4in40
+Xinv@0 net@863 s[1] inv-X_10
+Xinv@5 pred net@664 inv-X_5
+Xinv@16 fire[ODE] fire[OD] inv-X_60
+XpredDri2@0 fire[OD] mc pred predDri20wMC
+XsucDri20@3 fire[OD] do[RQ] sucDri20
+Xwire90@15 net@664 net@863 wire90-413_4-layer_1-width_3
+.ENDS odStage
+
+*** CELL: fifoL:odStageD{sch}
+.SUBCKT odStageD do[L] do[M] do[RQ] fire[ODE] in[10] in[11] in[12] in[13] 
++in[14] in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] 
++in[24] in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] 
++in[34] in[35] in[36] in[3] in[4] in[5] in[6] in[7] in[8] in[9] mc out[10] 
++out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] 
++out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] 
++out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] 
++out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9] pred s[1]
+Xins20Bx3@0 net@6 in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] 
++in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] 
++in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] in[3] 
++in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] out[12] out[13] out[14] 
++out[15] out[16] out[17] out[18] out[19] out[1] out[20] out[21] out[22] 
++out[23] out[24] out[25] out[26] out[27] out[28] out[29] out[2] out[30] 
++out[31] out[32] out[33] out[34] out[35] out[36] out[3] out[4] out[5] out[6] 
++out[7] out[8] out[9] ins20Bx36
+XlatchDri@0 net@3 take[1] latchDriver60
+XodStage@0 do[L] do[M] do[RQ] fire[ODE] net@3 mc pred s[1] odStage
+Xwire90@1 net@6 take[1] wire90-3715_9-layer_1-width_3
+.ENDS odStageD
+
+*** CELL: latchesK:latch2in20A{sch}
+.SUBCKT latch2in20A hcl[A] hcl[B] inA[1] inB[1] out[1]
+Xhi2inLat@0 hcl[A] hcl[B] inA[1] inB[1] net@36 raw2inLatchF
+XinvLT@1 net@16 out[1] inv-X_20
+Xwire90@1 net@36 net@16 wire90-242_1-layer_1-width_3
+.ENDS latch2in20A
+
+*** CELL: registersL:ins2in20Ax36{sch}
+.SUBCKT ins2in20Ax36 hcl[A][1] hcl[B][1] inA[10] inA[11] inA[12] inA[13] 
++inA[14] inA[15] inA[16] inA[17] inA[18] inA[19] inA[1] inA[20] inA[21] 
++inA[22] inA[23] inA[24] inA[25] inA[26] inA[27] inA[28] inA[29] inA[2] 
++inA[30] inA[31] inA[32] inA[33] inA[34] inA[35] inA[36] inA[3] inA[4] inA[5] 
++inA[6] inA[7] inA[8] inA[9] inB[10] inB[11] inB[12] inB[13] inB[14] inB[15] 
++inB[16] inB[17] inB[18] inB[19] inB[1] inB[20] inB[21] inB[22] inB[23] 
++inB[24] inB[25] inB[26] inB[27] inB[28] inB[29] inB[2] inB[30] inB[31] 
++inB[32] inB[33] inB[34] inB[35] inB[36] inB[3] inB[4] inB[5] inB[6] inB[7] 
++inB[8] inB[9] out[10] out[11] out[12] out[13] out[14] out[15] out[16] out[17] 
++out[18] out[19] out[1] out[20] out[21] out[22] out[23] out[24] out[25] 
++out[26] out[27] out[28] out[29] out[2] out[30] out[31] out[32] out[33] 
++out[34] out[35] out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9]
+Xlx[1] hcl[A][1] hcl[B][1] inA[1] inB[1] out[1] latch2in20A
+Xlx[2] hcl[A][1] hcl[B][1] inA[2] inB[2] out[2] latch2in20A
+Xlx[3] hcl[A][1] hcl[B][1] inA[3] inB[3] out[3] latch2in20A
+Xlx[4] hcl[A][1] hcl[B][1] inA[4] inB[4] out[4] latch2in20A
+Xlx[5] hcl[A][1] hcl[B][1] inA[5] inB[5] out[5] latch2in20A
+Xlx[6] hcl[A][1] hcl[B][1] inA[6] inB[6] out[6] latch2in20A
+Xlx[7] hcl[A][1] hcl[B][1] inA[7] inB[7] out[7] latch2in20A
+Xlx[8] hcl[A][1] hcl[B][1] inA[8] inB[8] out[8] latch2in20A
+Xlx[9] hcl[A][1] hcl[B][1] inA[9] inB[9] out[9] latch2in20A
+Xlx[10] hcl[A][1] hcl[B][1] inA[10] inB[10] out[10] latch2in20A
+Xlx[11] hcl[A][1] hcl[B][1] inA[11] inB[11] out[11] latch2in20A
+Xlx[12] hcl[A][1] hcl[B][1] inA[12] inB[12] out[12] latch2in20A
+Xlx[13] hcl[A][1] hcl[B][1] inA[13] inB[13] out[13] latch2in20A
+Xlx[14] hcl[A][1] hcl[B][1] inA[14] inB[14] out[14] latch2in20A
+Xlx[15] hcl[A][1] hcl[B][1] inA[15] inB[15] out[15] latch2in20A
+Xlx[16] hcl[A][1] hcl[B][1] inA[16] inB[16] out[16] latch2in20A
+Xlx[17] hcl[A][1] hcl[B][1] inA[17] inB[17] out[17] latch2in20A
+Xlx[18] hcl[A][1] hcl[B][1] inA[18] inB[18] out[18] latch2in20A
+Xlx[19] hcl[A][1] hcl[B][1] inA[19] inB[19] out[19] latch2in20A
+Xlx[20] hcl[A][1] hcl[B][1] inA[20] inB[20] out[20] latch2in20A
+Xlx[21] hcl[A][1] hcl[B][1] inA[21] inB[21] out[21] latch2in20A
+Xlx[22] hcl[A][1] hcl[B][1] inA[22] inB[22] out[22] latch2in20A
+Xlx[23] hcl[A][1] hcl[B][1] inA[23] inB[23] out[23] latch2in20A
+Xlx[24] hcl[A][1] hcl[B][1] inA[24] inB[24] out[24] latch2in20A
+Xlx[25] hcl[A][1] hcl[B][1] inA[25] inB[25] out[25] latch2in20A
+Xlx[26] hcl[A][1] hcl[B][1] inA[26] inB[26] out[26] latch2in20A
+Xlx[27] hcl[A][1] hcl[B][1] inA[27] inB[27] out[27] latch2in20A
+Xlx[28] hcl[A][1] hcl[B][1] inA[28] inB[28] out[28] latch2in20A
+Xlx[29] hcl[A][1] hcl[B][1] inA[29] inB[29] out[29] latch2in20A
+Xlx[30] hcl[A][1] hcl[B][1] inA[30] inB[30] out[30] latch2in20A
+Xlx[31] hcl[A][1] hcl[B][1] inA[31] inB[31] out[31] latch2in20A
+Xlx[32] hcl[A][1] hcl[B][1] inA[32] inB[32] out[32] latch2in20A
+Xlx[33] hcl[A][1] hcl[B][1] inA[33] inB[33] out[33] latch2in20A
+Xlx[34] hcl[A][1] hcl[B][1] inA[34] inB[34] out[34] latch2in20A
+Xlx[35] hcl[A][1] hcl[B][1] inA[35] inB[35] out[35] latch2in20A
+Xlx[36] hcl[A][1] hcl[B][1] inA[36] inB[36] out[36] latch2in20A
+.ENDS ins2in20Ax36
+
+*** CELL: redFour:nms2{sch}
+.SUBCKT nms2-X_5 d g g2
+XNMOS@0 d g2 net@0 NMOSx-X_10
+XNMOS@1 net@0 g gnd NMOSx-X_10
+.ENDS nms2-X_5
+
+*** CELL: gatesK:andOrInv5{sch}
+.SUBCKT andOrInv5 inA inB inC inD out
+XPMOSx@0 out inA net@42 PMOSx-X_5
+XPMOSx@1 out inB net@42 PMOSx-X_5
+XPMOSx@2 out inC net@39 PMOSx-X_5
+XPMOSx@3 out inD net@39 PMOSx-X_5
+XPMOSx@4 net@39 inA vdd PMOSx-X_5
+XPMOSx@5 net@39 inB vdd PMOSx-X_5
+XPMOSx@6 net@42 inC vdd PMOSx-X_5
+XPMOSx@7 net@42 inD vdd PMOSx-X_5
+Xnms2@0 out inA inB nms2-X_5
+Xnms2@2 out inD inC nms2-X_5
+.ENDS andOrInv5
+
+*** CELL: redFour:inv{sch}
+.SUBCKT inv-X_30 in out
+XNMOS@0 out in gnd NMOSx-X_30
+XPMOS@0 out in vdd PMOSx-X_30
+.ENDS inv-X_30
+
+*** CELL: orangeTSMC090nm:NMOSx{sch}
+.SUBCKT NMOSx-X_2 d g s
+MNMOSf@0 d g s gnd nch W='6*(1+ABN/sqrt(6*2))' L='2' DELVTO='AVT0N/sqrt(6*2)'
+.ENDS NMOSx-X_2
+
+*** CELL: redFour:pms2_sy{sch}
+.SUBCKT pms2_sy-X_4 d g g2
+Xpms2@0 d g g2 pms2-X_2
+Xpms2@1 d g2 g pms2-X_2
+.ENDS pms2_sy-X_4
+
+*** CELL: redFour:nor2HT_sy{sch}
+.SUBCKT nor2HT_sy-X_4 ina inb out
+XNMOS@0 out inb gnd NMOSx-X_2
+XNMOS@1 out ina gnd NMOSx-X_2
+Xpms2_sy@0 out ina inb pms2_sy-X_4
+.ENDS nor2HT_sy-X_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-249_5-R_34_667m a b
+Ccap@0 gnd net@14 0.915f
+Ccap@1 gnd net@8 0.915f
+Ccap@2 gnd net@11 0.915f
+Rres@0 net@14 a 1.442
+Rres@1 net@11 net@14 2.883
+Rres@2 b net@8 1.442
+Rres@3 net@8 net@11 2.883
+.ENDS wire-C_0_011f-249_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-249_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-249_5-R_34_667m
+.ENDS wire90-249_5-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-355_8-R_34_667m a b
+Ccap@0 gnd net@14 1.305f
+Ccap@1 gnd net@8 1.305f
+Ccap@2 gnd net@11 1.305f
+Rres@0 net@14 a 2.056
+Rres@1 net@11 net@14 4.111
+Rres@2 b net@8 2.056
+Rres@3 net@8 net@11 4.111
+.ENDS wire-C_0_011f-355_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-355_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-355_8-R_34_667m
+.ENDS wire90-355_8-layer_1-width_3
+
+*** CELL: centersJ:ctrAND2in30{sch}
+.SUBCKT ctrAND2in30 inA inB out
+Xinv@0 net@7 net@8 inv-X_10
+Xinv@1 net@9 out inv-X_30
+Xnor2HT_s@1 inA inB net@6 nor2HT_sy-X_4
+Xwire90@0 net@6 net@7 wire90-249_5-layer_1-width_3
+Xwire90@1 net@8 net@9 wire90-355_8-layer_1-width_3
+.ENDS ctrAND2in30
+
+*** CELL: redFour:nand2{sch}
+.SUBCKT nand2-X_10 ina inb out
+XPMOS@0 out ina vdd PMOSx-X_10
+XPMOS@1 out inb vdd PMOSx-X_10
+Xnms2@0 out ina inb nms2-X_10
+.ENDS nand2-X_10
+
+*** CELL: orangeTSMC090nm:NMOSx{sch}
+.SUBCKT NMOSx-X_2_5 d g s
+MNMOSf@0 d g s gnd nch W='7.5*(1+ABN/sqrt(7.5*2))' L='2' 
++DELVTO='AVT0N/sqrt(7.5*2)'
+.ENDS NMOSx-X_2_5
+
+*** CELL: redFour:pms2_sy{sch}
+.SUBCKT pms2_sy-X_5 d g g2
+Xpms2@0 d g g2 pms2-X_2_5
+Xpms2@1 d g2 g pms2-X_2_5
+.ENDS pms2_sy-X_5
+
+*** CELL: redFour:nor2HT_sy{sch}
+.SUBCKT nor2HT_sy-X_5 ina inb out
+XNMOS@0 out inb gnd NMOSx-X_2_5
+XNMOS@1 out ina gnd NMOSx-X_2_5
+Xpms2_sy@0 out ina inb pms2_sy-X_5
+.ENDS nor2HT_sy-X_5
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-252_6-R_34_667m a b
+Ccap@0 gnd net@14 0.926f
+Ccap@1 gnd net@8 0.926f
+Ccap@2 gnd net@11 0.926f
+Rres@0 net@14 a 1.459
+Rres@1 net@11 net@14 2.919
+Rres@2 b net@8 1.459
+Rres@3 net@8 net@11 2.919
+.ENDS wire-C_0_011f-252_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-252_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-252_6-R_34_667m
+.ENDS wire90-252_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-366_8-R_34_667m a b
+Ccap@0 gnd net@14 1.345f
+Ccap@1 gnd net@8 1.345f
+Ccap@2 gnd net@11 1.345f
+Rres@0 net@14 a 2.119
+Rres@1 net@11 net@14 4.239
+Rres@2 b net@8 2.119
+Rres@3 net@8 net@11 4.239
+.ENDS wire-C_0_011f-366_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-366_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-366_8-R_34_667m
+.ENDS wire90-366_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-176_4-R_34_667m a b
+Ccap@0 gnd net@14 0.647f
+Ccap@1 gnd net@8 0.647f
+Ccap@2 gnd net@11 0.647f
+Rres@0 net@14 a 1.019
+Rres@1 net@11 net@14 2.038
+Rres@2 b net@8 1.019
+Rres@3 net@8 net@11 2.038
+.ENDS wire-C_0_011f-176_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-176_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-176_4-R_34_667m
+.ENDS wire90-176_4-layer_1-width_3
+
+*** CELL: centersJ:ctrAND3in30{sch}
+.SUBCKT ctrAND3in30 inA inB inC out
+Xinv@4 inC net@30 inv-X_4
+Xinv@5 net@9 out inv-X_30
+Xnand2@0 net@19 net@15 net@27 nand2-X_10
+Xnor2HT_s@0 inA inB net@6 nor2HT_sy-X_5
+Xwire90@0 net@6 net@15 wire90-252_6-layer_1-width_3
+Xwire90@1 net@27 net@9 wire90-366_8-layer_1-width_3
+Xwire90@2 net@30 net@19 wire90-176_4-layer_1-width_3
+.ENDS ctrAND3in30
+
+*** CELL: redFour:nor2{sch}
+.SUBCKT nor2-X_5 ina inb out
+XNMOS@0 out ina gnd NMOSx-X_5
+XNMOS@1 out inb gnd NMOSx-X_5
+Xpms2@0 out ina inb pms2-X_5
+.ENDS nor2-X_5
+
+*** CELL: redFour:nor2n{sch}
+.SUBCKT nor2n-X_5 ina inb out
+Xnor2@0 ina inb out nor2-X_5
+.ENDS nor2n-X_5
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-238_2-R_34_667m a b
+Ccap@0 gnd net@14 0.873f
+Ccap@1 gnd net@8 0.873f
+Ccap@2 gnd net@11 0.873f
+Rres@0 net@14 a 1.376
+Rres@1 net@11 net@14 2.753
+Rres@2 b net@8 1.376
+Rres@3 net@8 net@11 2.753
+.ENDS wire-C_0_011f-238_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-238_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-238_2-R_34_667m
+.ENDS wire90-238_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-520-R_34_667m a b
+Ccap@0 gnd net@14 1.907f
+Ccap@1 gnd net@8 1.907f
+Ccap@2 gnd net@11 1.907f
+Rres@0 net@14 a 3.004
+Rres@1 net@11 net@14 6.009
+Rres@2 b net@8 3.004
+Rres@3 net@8 net@11 6.009
+.ENDS wire-C_0_011f-520-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-520-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-520-R_34_667m
+.ENDS wire90-520-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-222_3-R_34_667m a b
+Ccap@0 gnd net@14 0.815f
+Ccap@1 gnd net@8 0.815f
+Ccap@2 gnd net@11 0.815f
+Rres@0 net@14 a 1.284
+Rres@1 net@11 net@14 2.569
+Rres@2 b net@8 1.284
+Rres@3 net@8 net@11 2.569
+.ENDS wire-C_0_011f-222_3-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-222_3-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-222_3-R_34_667m
+.ENDS wire90-222_3-layer_1-width_3
+
+*** CELL: centersJ:ctrAND4in30{sch}
+.SUBCKT ctrAND4in30 inA inB inC inD out
+Xinv@1 net@3 out inv-X_30
+Xnand2@1 net@43 net@58 net@67 nand2-X_10
+Xnor2HT_s@1 inA inB net@61 nor2HT_sy-X_4
+Xnor2n@0 inD inC net@64 nor2n-X_5
+Xwire90@0 net@64 net@43 wire90-238_2-layer_1-width_3
+Xwire90@1 net@67 net@3 wire90-520-layer_1-width_3
+Xwire90@2 net@61 net@58 wire90-222_3-layer_1-width_3
+.ENDS ctrAND4in30
+
+*** CELL: driversL:predORdri20wMC{sch}
+.SUBCKT predORdri20wMC inA inB mc pred
+XNMOSx@0 pred inA gnd NMOSx-X_20
+XNMOSx@1 pred mc gnd NMOSx-X_4
+XNMOSx@2 pred inB gnd NMOSx-X_20
+XPMOSx@1 pred net@217 net@203 PMOSx-X_4
+XPMOSx@2 net@203 inB net@204 PMOSx-X_4
+XPMOSx@3 net@204 inA net@205 PMOSx-X_4
+XPMOSx@4 net@205 mc vdd PMOSx-X_4
+Xinv@0 pred net@145 inv-X_4
+Xwire90@0 net@217 net@145 wire90-243_6-layer_1-width_3
+.ENDS predORdri20wMC
+
+*** CELL: redFour:nms2_sy{sch}
+.SUBCKT nms2_sy-X_4 d g g2
+Xnms2@0 d g g2 nms2-X_2
+Xnms2@1 d g2 g nms2-X_2
+.ENDS nms2_sy-X_4
+
+*** CELL: redFour:nand2_sy{sch}
+.SUBCKT nand2_sy-X_4 ina inb out
+XPMOS@0 out inb vdd PMOSx-X_4
+XPMOS@1 out ina vdd PMOSx-X_4
+Xnms2_sy@0 out ina inb nms2_sy-X_4
+.ENDS nand2_sy-X_4
+
+*** CELL: redFour:nms2_sy{sch}
+.SUBCKT nms2_sy-X_10 d g g2
+Xnms2@0 d g g2 nms2-X_5
+Xnms2@1 d g2 g nms2-X_5
+.ENDS nms2_sy-X_10
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-210_3-R_34_667m a b
+Ccap@0 gnd net@14 0.771f
+Ccap@1 gnd net@8 0.771f
+Ccap@2 gnd net@11 0.771f
+Rres@0 net@14 a 1.215
+Rres@1 net@11 net@14 2.43
+Rres@2 b net@8 1.215
+Rres@3 net@8 net@11 2.43
+.ENDS wire-C_0_011f-210_3-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-210_3-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-210_3-R_34_667m
+.ENDS wire90-210_3-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-353_2-R_34_667m a b
+Ccap@0 gnd net@14 1.295f
+Ccap@1 gnd net@8 1.295f
+Ccap@2 gnd net@11 1.295f
+Rres@0 net@14 a 2.041
+Rres@1 net@11 net@14 4.081
+Rres@2 b net@8 2.041
+Rres@3 net@8 net@11 4.081
+.ENDS wire-C_0_011f-353_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-353_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-353_2-R_34_667m
+.ENDS wire90-353_2-layer_1-width_3
+
+*** CELL: latchesK:rsLatchC{sch}
+.SUBCKT rsLatchC mc out outBar resetA resetB setA setB
+XNMOSx@1 net@188 mc gnd NMOSx-X_4
+XPMOSx@3 net@188 net@177 vdd PMOSx-X_10
+XPMOSx@4 net@274 resetA vdd PMOSx-X_5
+XPMOSx@5 net@274 resetB vdd PMOSx-X_5
+XPMOSx@6 net@226 outBar net@273 PMOSx-X_5
+XPMOSx@7 net@273 mc net@274 PMOSx-X_5
+Xinv@0 net@226 outBar inv-X_20
+Xinv@2 outBar out inv-X_20
+Xnand2_sy@0 setA setB net@267 nand2_sy-X_4
+Xnms2@1 net@188 outBar net@177 nms2-X_2
+Xnms2_sy@0 net@226 resetB resetA nms2_sy-X_10
+Xwire90@0 net@267 net@177 wire90-210_3-layer_1-width_3
+Xwire90@1 net@188 net@226 wire90-353_2-layer_1-width_3
+.ENDS rsLatchC
+
+*** CELL: driversL:sucDri20plain{sch}
+.SUBCKT sucDri20plain in succ
+XPMOSx@0 succ in vdd PMOSx-X_20
+Xinv@1 succ net@94 inv-X_4
+Xnms2@0 succ net@127 in nms2-X_2
+Xwire90@0 net@127 net@94 wire90-124_7-layer_1-width_3
+.ENDS sucDri20plain
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-314_7-R_34_667m a b
+Ccap@0 gnd net@14 1.154f
+Ccap@1 gnd net@8 1.154f
+Ccap@2 gnd net@11 1.154f
+Rres@0 net@14 a 1.818
+Rres@1 net@11 net@14 3.637
+Rres@2 b net@8 1.818
+Rres@3 net@8 net@11 3.637
+.ENDS wire-C_0_011f-314_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-314_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-314_7-R_34_667m
+.ENDS wire90-314_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1526_5-R_34_667m a b
+Ccap@0 gnd net@14 5.597f
+Ccap@1 gnd net@8 5.597f
+Ccap@2 gnd net@11 5.597f
+Rres@0 net@14 a 8.82
+Rres@1 net@11 net@14 17.64
+Rres@2 b net@8 8.82
+Rres@3 net@8 net@11 17.64
+.ENDS wire-C_0_011f-1526_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1526_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1526_5-R_34_667m
+.ENDS wire90-1526_5-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1328_7-R_34_667m a b
+Ccap@0 gnd net@14 4.872f
+Ccap@1 gnd net@8 4.872f
+Ccap@2 gnd net@11 4.872f
+Rres@0 net@14 a 7.677
+Rres@1 net@11 net@14 15.354
+Rres@2 b net@8 7.677
+Rres@3 net@8 net@11 15.354
+.ENDS wire-C_0_011f-1328_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1328_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1328_7-R_34_667m
+.ENDS wire90-1328_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-234_9-R_34_667m a b
+Ccap@0 gnd net@14 0.861f
+Ccap@1 gnd net@8 0.861f
+Ccap@2 gnd net@11 0.861f
+Rres@0 net@14 a 1.357
+Rres@1 net@11 net@14 2.714
+Rres@2 b net@8 1.357
+Rres@3 net@8 net@11 2.714
+.ENDS wire-C_0_011f-234_9-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-234_9-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-234_9-R_34_667m
+.ENDS wire90-234_9-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1122_1-R_34_667m a b
+Ccap@0 gnd net@14 4.114f
+Ccap@1 gnd net@8 4.114f
+Ccap@2 gnd net@11 4.114f
+Rres@0 net@14 a 6.483
+Rres@1 net@11 net@14 12.966
+Rres@2 b net@8 6.483
+Rres@3 net@8 net@11 12.966
+.ENDS wire-C_0_011f-1122_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1122_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1122_1-R_34_667m
+.ENDS wire90-1122_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-820_7-R_34_667m a b
+Ccap@0 gnd net@14 3.009f
+Ccap@1 gnd net@8 3.009f
+Ccap@2 gnd net@11 3.009f
+Rres@0 net@14 a 4.742
+Rres@1 net@11 net@14 9.484
+Rres@2 b net@8 4.742
+Rres@3 net@8 net@11 9.484
+.ENDS wire-C_0_011f-820_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-820_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-820_7-R_34_667m
+.ENDS wire90-820_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-228_4-R_34_667m a b
+Ccap@0 gnd net@14 0.837f
+Ccap@1 gnd net@8 0.837f
+Ccap@2 gnd net@11 0.837f
+Rres@0 net@14 a 1.32
+Rres@1 net@11 net@14 2.639
+Rres@2 b net@8 1.32
+Rres@3 net@8 net@11 2.639
+.ENDS wire-C_0_011f-228_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-228_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-228_4-R_34_667m
+.ENDS wire90-228_4-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-707_6-R_34_667m a b
+Ccap@0 gnd net@14 2.595f
+Ccap@1 gnd net@8 2.595f
+Ccap@2 gnd net@11 2.595f
+Rres@0 net@14 a 4.088
+Rres@1 net@11 net@14 8.177
+Rres@2 b net@8 4.088
+Rres@3 net@8 net@11 8.177
+.ENDS wire-C_0_011f-707_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-707_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-707_6-R_34_667m
+.ENDS wire90-707_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-812_8-R_34_667m a b
+Ccap@0 gnd net@14 2.98f
+Ccap@1 gnd net@8 2.98f
+Ccap@2 gnd net@11 2.98f
+Rres@0 net@14 a 4.696
+Rres@1 net@11 net@14 9.392
+Rres@2 b net@8 4.696
+Rres@3 net@8 net@11 9.392
+.ENDS wire-C_0_011f-812_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-812_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-812_8-R_34_667m
+.ENDS wire90-812_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-428_6-R_34_667m a b
+Ccap@0 gnd net@14 1.572f
+Ccap@1 gnd net@8 1.572f
+Ccap@2 gnd net@11 1.572f
+Rres@0 net@14 a 2.476
+Rres@1 net@11 net@14 4.953
+Rres@2 b net@8 2.476
+Rres@3 net@8 net@11 4.953
+.ENDS wire-C_0_011f-428_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-428_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-428_6-R_34_667m
+.ENDS wire90-428_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-672_2-R_34_667m a b
+Ccap@0 gnd net@14 2.465f
+Ccap@1 gnd net@8 2.465f
+Ccap@2 gnd net@11 2.465f
+Rres@0 net@14 a 3.884
+Rres@1 net@11 net@14 7.768
+Rres@2 b net@8 3.884
+Rres@3 net@8 net@11 7.768
+.ENDS wire-C_0_011f-672_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-672_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-672_2-R_34_667m
+.ENDS wire90-672_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-495_5-R_34_667m a b
+Ccap@0 gnd net@14 1.817f
+Ccap@1 gnd net@8 1.817f
+Ccap@2 gnd net@11 1.817f
+Rres@0 net@14 a 2.863
+Rres@1 net@11 net@14 5.726
+Rres@2 b net@8 2.863
+Rres@3 net@8 net@11 5.726
+.ENDS wire-C_0_011f-495_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-495_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-495_5-R_34_667m
+.ENDS wire90-495_5-layer_1-width_3
+
+*** CELL: gaspL:rqStage{sch}
+.SUBCKT rqStage do[RQ] do[epi] do[ring] in[RQ] in[Z] mc s[1] s[2] s[3] s[4] 
++tail take[E] take[R]
+XandOrInv@0 nzrq fire[R] fire[E] tailBAR net@239 andOrInv5
+XctrAND2i@0 net@324 net@129 fireB ctrAND2in30
+XctrAND3i@0 net@8 do[ring] net@124 fire[E] ctrAND3in30
+XctrAND4i@1 do[ring] net@205 net@193 net@197 fire[R] ctrAND4in30
+Xinv@12 do[epi] net@7 inv-X_5
+Xinv@13 net@8 s[1] inv-X_5
+Xinv@14 net@197 s[2] inv-X_5
+Xinv@15 net@193 s[4] inv-X_5
+Xinv@16 net@205 s[3] inv-X_5
+Xinv@17 do[RQ] net@324 inv-X_10
+Xinv@18 tail net@305 inv-X_10
+XlatchDri@0 fire[R] take[R] latchDriver60
+XlatchDri@1 fire[E] take[E] latchDriver60
+Xnor2n_sy@2 in[Z] in[RQ] net@287 nor2n_sy-X_10
+XpredDri2@0 net@121 mc do[epi] predDri20wMC
+XpredORdr@0 net@142 net@139 mc do[RQ] predORdri20wMC
+XrsLatchC@0 mc net@105 filling fire[R] in[Z] fire[E] tail rsLatchC
+XrsLatchC@1 mc net@40 draining fire[R] in[Z] fireB nzrq rsLatchC
+XsucDri20@1 net@240 do[ring] sucDri20plain
+Xwire90@0 net@7 net@8 wire90-314_7-layer_1-width_3
+Xwire90@2 net@142 fire[R] wire90-1526_5-layer_1-width_3
+Xwire90@3 net@121 fire[E] wire90-1328_7-layer_1-width_3
+Xwire90@4 net@124 net@105 wire90-234_9-layer_1-width_3
+Xwire90@5 filling net@197 wire90-1122_1-layer_1-width_3
+Xwire90@6 draining net@193 wire90-820_7-layer_1-width_3
+Xwire90@7 net@129 net@40 wire90-228_4-layer_1-width_3
+Xwire90@8 net@324 net@205 wire90-707_6-layer_1-width_3
+Xwire90@9 net@139 fireB wire90-812_8-layer_1-width_3
+Xwire90@14 net@239 net@240 wire90-428_6-layer_1-width_3
+Xwire90@17 nzrq net@287 wire90-672_2-layer_1-width_3
+Xwire90@18 net@305 tailBAR wire90-495_5-layer_1-width_3
+.ENDS rqStage
+
+*** CELL: fifoL:rqStageD{sch}
+.SUBCKT rqStageD do[RQ] do[epi] do[ring] inE[10] inE[11] inE[12] inE[13] 
++inE[14] inE[15] inE[16] inE[17] inE[18] inE[19] inE[1] inE[20] inE[21] 
++inE[22] inE[23] inE[24] inE[25] inE[26] inE[27] inE[28] inE[29] inE[2] 
++inE[30] inE[31] inE[32] inE[33] inE[34] inE[35] inE[36] inE[3] inE[4] inE[5] 
++inE[6] inE[7] inE[8] inE[9] inR[10] inR[11] inR[12] inR[13] inR[14] inR[15] 
++inR[16] inR[17] inR[18] inR[19] inR[1] inR[20] inR[21] inR[22] inR[23] 
++inR[24] inR[25] inR[26] inR[27] inR[28] inR[29] inR[2] inR[30] inR[31] 
++inR[32] inR[33] inR[34] inR[35] inR[36] inR[3] inR[4] inR[5] inR[6] inR[7] 
++inR[8] inR[9] mc out[10] out[11] out[12] out[13] out[14] out[15] out[16] 
++out[17] out[18] out[19] out[1] out[20] out[21] out[22] out[23] out[24] 
++out[25] out[26] out[27] out[28] out[29] out[2] out[30] out[31] out[32] 
++out[33] out[34] out[35] out[36] out[3] out[4] out[5] out[6] out[7] out[8] 
++out[9] s[1] s[2] s[3] s[4]
+XbitAssig@0 bitAssignments
+Xins2in20@1 net@49 net@47 inR[10] inR[11] inR[12] inR[13] inR[14] inR[15] 
++inR[16] inR[17] inR[18] inR[19] inR[1] inR[20] inR[21] inR[22] inR[23] 
++inR[24] inR[25] inR[26] inR[27] inR[28] inR[29] inR[2] inR[30] inR[31] 
++inR[32] inR[33] inR[34] inR[35] inR[36] inR[3] inR[4] inR[5] inR[6] inR[7] 
++inR[8] inR[9] inE[10] inE[11] inE[12] inE[13] inE[14] inE[15] inE[16] inE[17] 
++inE[18] inE[19] inE[1] inE[20] inE[21] inE[22] inE[23] inE[24] inE[25] 
++inE[26] inE[27] inE[28] inE[29] inE[2] inE[30] inE[31] inE[32] inE[33] 
++inE[34] inE[35] inE[36] inE[3] inE[4] inE[5] inE[6] inE[7] inE[8] inE[9] 
++out[10] out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] 
++out[19] out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] 
++out[27] out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] 
++out[35] out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9] ins2in20Ax36
+XrqStage@0 do[RQ] do[epi] do[ring] inR[30] inR[21] mc s[1] s[2] s[3] s[4] 
++inE[21] take[E] take[R] rqStage
+Xwire90@2 take[R] net@49 wire90-242_1-layer_1-width_3
+Xwire90@3 take[E] net@47 wire90-242_1-layer_1-width_3
+.ENDS rqStageD
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-297_9-R_34_667m a b
+Ccap@0 gnd net@14 1.092f
+Ccap@1 gnd net@8 1.092f
+Ccap@2 gnd net@11 1.092f
+Rres@0 net@14 a 1.721
+Rres@1 net@11 net@14 3.442
+Rres@2 b net@8 1.721
+Rres@3 net@8 net@11 3.442
+.ENDS wire-C_0_011f-297_9-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-297_9-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-297_9-R_34_667m
+.ENDS wire90-297_9-layer_1-width_3
+
+*** CELL: scanK:scanKhx5{sch}
+.SUBCKT scanKhx5 clS[F] clS[T] cl[F] cl[T] din[1] din[2] din[3] din[4] din[5] 
++mc rd[F] rd[T] sin sout
+XscanCell@4 clS[F] clS[T] cl[F] cl[T] din[1] rd[F] rd[T] sin net@18 
++scanCellKh
+XscanCell@5 clS[F] clS[T] cl[F] cl[T] din[2] rd[F] rd[T] net@31 net@20 
++scanCellKh
+XscanCell@6 clS[F] clS[T] cl[F] cl[T] din[3] rd[F] rd[T] net@32 net@24 
++scanCellKh
+XscanCell@7 clS[F] clS[T] cl[F] cl[T] din[4] rd[F] rd[T] net@33 net@51 
++scanCellKh
+XscanCell@8 clS[F] clS[T] cl[F] cl[T] din[5] rd[F] rd[T] net@50 sout 
++scanCellKh
+Xwire90@0 net@18 net@31 wire90-297_9-layer_1-width_3
+Xwire90@1 net@20 net@32 wire90-297_9-layer_1-width_3
+Xwire90@2 net@24 net@33 wire90-297_9-layer_1-width_3
+Xwire90@3 net@51 net@50 wire90-297_9-layer_1-width_3
+.ENDS scanKhx5
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1358_4-R_26m a b
+Ccap@0 gnd net@14 4.981f
+Ccap@1 gnd net@8 4.981f
+Ccap@2 gnd net@11 4.981f
+Rres@0 net@14 a 5.886
+Rres@1 net@11 net@14 11.773
+Rres@2 b net@8 5.886
+Rres@3 net@8 net@11 11.773
+.ENDS wire-C_0_011f-1358_4-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1358_4-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-1358_4-R_26m
+.ENDS wire90-1358_4-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-641-R_26m a b
+Ccap@0 gnd net@14 2.35f
+Ccap@1 gnd net@8 2.35f
+Ccap@2 gnd net@11 2.35f
+Rres@0 net@14 a 2.778
+Rres@1 net@11 net@14 5.555
+Rres@2 b net@8 2.778
+Rres@3 net@8 net@11 5.555
+.ENDS wire-C_0_011f-641-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-641-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-641-R_26m
+.ENDS wire90-641-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-644-R_26m a b
+Ccap@0 gnd net@14 2.361f
+Ccap@1 gnd net@8 2.361f
+Ccap@2 gnd net@11 2.361f
+Rres@0 net@14 a 2.791
+Rres@1 net@11 net@14 5.581
+Rres@2 b net@8 2.791
+Rres@3 net@8 net@11 5.581
+.ENDS wire-C_0_011f-644-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-644-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-644-R_26m
+.ENDS wire90-644-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-647-R_26m a b
+Ccap@0 gnd net@14 2.372f
+Ccap@1 gnd net@8 2.372f
+Ccap@2 gnd net@11 2.372f
+Rres@0 net@14 a 2.804
+Rres@1 net@11 net@14 5.607
+Rres@2 b net@8 2.804
+Rres@3 net@8 net@11 5.607
+.ENDS wire-C_0_011f-647-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-647-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-647-R_26m
+.ENDS wire90-647-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-638-R_26m a b
+Ccap@0 gnd net@14 2.339f
+Ccap@1 gnd net@8 2.339f
+Ccap@2 gnd net@11 2.339f
+Rres@0 net@14 a 2.765
+Rres@1 net@11 net@14 5.529
+Rres@2 b net@8 2.765
+Rres@3 net@8 net@11 5.529
+.ENDS wire-C_0_011f-638-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-638-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-638-R_26m
+.ENDS wire90-638-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-654-R_26m a b
+Ccap@0 gnd net@14 2.398f
+Ccap@1 gnd net@8 2.398f
+Ccap@2 gnd net@11 2.398f
+Rres@0 net@14 a 2.834
+Rres@1 net@11 net@14 5.668
+Rres@2 b net@8 2.834
+Rres@3 net@8 net@11 5.668
+.ENDS wire-C_0_011f-654-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-654-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-654-R_26m
+.ENDS wire90-654-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-636_5-R_26m a b
+Ccap@0 gnd net@14 2.334f
+Ccap@1 gnd net@8 2.334f
+Ccap@2 gnd net@11 2.334f
+Rres@0 net@14 a 2.758
+Rres@1 net@11 net@14 5.516
+Rres@2 b net@8 2.758
+Rres@3 net@8 net@11 5.516
+.ENDS wire-C_0_011f-636_5-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-636_5-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-636_5-R_26m
+.ENDS wire90-636_5-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-645_5-R_26m a b
+Ccap@0 gnd net@14 2.367f
+Ccap@1 gnd net@8 2.367f
+Ccap@2 gnd net@11 2.367f
+Rres@0 net@14 a 2.797
+Rres@1 net@11 net@14 5.594
+Rres@2 b net@8 2.797
+Rres@3 net@8 net@11 5.594
+.ENDS wire-C_0_011f-645_5-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-645_5-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-645_5-R_26m
+.ENDS wire90-645_5-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-639_5-R_26m a b
+Ccap@0 gnd net@14 2.345f
+Ccap@1 gnd net@8 2.345f
+Ccap@2 gnd net@11 2.345f
+Rres@0 net@14 a 2.771
+Rres@1 net@11 net@14 5.542
+Rres@2 b net@8 2.771
+Rres@3 net@8 net@11 5.542
+.ENDS wire-C_0_011f-639_5-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-639_5-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-639_5-R_26m
+.ENDS wire90-639_5-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-604_5-R_26m a b
+Ccap@0 gnd net@14 2.216f
+Ccap@1 gnd net@8 2.216f
+Ccap@2 gnd net@11 2.216f
+Rres@0 net@14 a 2.619
+Rres@1 net@11 net@14 5.239
+Rres@2 b net@8 2.619
+Rres@3 net@8 net@11 5.239
+.ENDS wire-C_0_011f-604_5-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-604_5-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-604_5-R_26m
+.ENDS wire90-604_5-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-625-R_26m a b
+Ccap@0 gnd net@14 2.292f
+Ccap@1 gnd net@8 2.292f
+Ccap@2 gnd net@11 2.292f
+Rres@0 net@14 a 2.708
+Rres@1 net@11 net@14 5.417
+Rres@2 b net@8 2.708
+Rres@3 net@8 net@11 5.417
+.ENDS wire-C_0_011f-625-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-625-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-625-R_26m
+.ENDS wire90-625-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-604_6-R_26m a b
+Ccap@0 gnd net@14 2.217f
+Ccap@1 gnd net@8 2.217f
+Ccap@2 gnd net@11 2.217f
+Rres@0 net@14 a 2.62
+Rres@1 net@11 net@14 5.24
+Rres@2 b net@8 2.62
+Rres@3 net@8 net@11 5.24
+.ENDS wire-C_0_011f-604_6-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-604_6-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-604_6-R_26m
+.ENDS wire90-604_6-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-623-R_26m a b
+Ccap@0 gnd net@14 2.284f
+Ccap@1 gnd net@8 2.284f
+Ccap@2 gnd net@11 2.284f
+Rres@0 net@14 a 2.7
+Rres@1 net@11 net@14 5.399
+Rres@2 b net@8 2.7
+Rres@3 net@8 net@11 5.399
+.ENDS wire-C_0_011f-623-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-623-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-623-R_26m
+.ENDS wire90-623-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-597_9-R_26m a b
+Ccap@0 gnd net@14 2.192f
+Ccap@1 gnd net@8 2.192f
+Ccap@2 gnd net@11 2.192f
+Rres@0 net@14 a 2.591
+Rres@1 net@11 net@14 5.182
+Rres@2 b net@8 2.591
+Rres@3 net@8 net@11 5.182
+.ENDS wire-C_0_011f-597_9-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-597_9-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-597_9-R_26m
+.ENDS wire90-597_9-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2012_6-R_26m a b
+Ccap@0 gnd net@14 7.38f
+Ccap@1 gnd net@8 7.38f
+Ccap@2 gnd net@11 7.38f
+Rres@0 net@14 a 8.721
+Rres@1 net@11 net@14 17.443
+Rres@2 b net@8 8.721
+Rres@3 net@8 net@11 17.443
+.ENDS wire-C_0_011f-2012_6-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2012_6-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-2012_6-R_26m
+.ENDS wire90-2012_6-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1745_9-R_26m a b
+Ccap@0 gnd net@14 6.402f
+Ccap@1 gnd net@8 6.402f
+Ccap@2 gnd net@11 6.402f
+Rres@0 net@14 a 7.566
+Rres@1 net@11 net@14 15.131
+Rres@2 b net@8 7.566
+Rres@3 net@8 net@11 15.131
+.ENDS wire-C_0_011f-1745_9-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1745_9-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-1745_9-R_26m
+.ENDS wire90-1745_9-layer_1-width_4
+
+*** CELL: fifoL:odRQstageD{sch}
+.SUBCKT odRQstageD clS[F] clS[T] cl[F] cl[T] do[L] do[M] do[epi] do[ring] 
++fire[ODE] inE[10] inE[11] inE[12] inE[13] inE[14] inE[15] inE[16] inE[17] 
++inE[18] inE[19] inE[1] inE[20] inE[21] inE[22] inE[23] inE[24] inE[25] 
++inE[26] inE[27] inE[28] inE[29] inE[2] inE[30] inE[31] inE[32] inE[33] 
++inE[34] inE[35] inE[36] inE[3] inE[4] inE[5] inE[6] inE[7] inE[8] inE[9] 
++in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] in[18] in[19] in[1] 
++in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] in[28] in[29] in[2] 
++in[30] in[31] in[32] in[33] in[34] in[35] in[36] in[3] in[4] in[5] in[6] 
++in[7] in[8] in[9] mc out[10] out[11] out[12] out[13] out[14] out[15] out[16] 
++out[17] out[18] out[19] out[1] out[20] out[21] out[22] out[23] out[24] 
++out[25] out[26] out[27] out[28] out[29] out[2] out[30] out[31] out[32] 
++out[33] out[34] out[35] out[36] out[3] out[4] out[5] out[6] out[7] out[8] 
++out[9] pred rd[F] rd[T] sin sout
+XodStageD@1 do[L] do[M] net@17 fire[ODE] in[10] in[11] in[12] in[13] in[14] 
++in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] 
++in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] 
++in[35] in[36] in[3] in[4] in[5] in[6] in[7] in[8] in[9] mc od[10] od[11] 
++od[12] od[13] od[14] od[15] od[16] od[17] od[18] od[19] od[1] od[20] od[21] 
++od[22] od[23] od[24] od[25] od[26] od[27] od[28] od[29] od[2] od[30] od[31] 
++od[32] od[33] od[34] od[35] od[36] od[3] od[4] od[5] od[6] od[7] od[8] od[9] 
++pred s[1] odStageD
+XrqStageD@0 net@63 do[epi] do[ring] inE[10] inE[11] inE[12] inE[13] inE[14] 
++inE[15] inE[16] inE[17] inE[18] inE[19] inE[1] inE[20] inE[21] inE[22] 
++inE[23] inE[24] inE[25] inE[26] inE[27] inE[28] inE[29] inE[2] inE[30] 
++inE[31] inE[32] inE[33] inE[34] inE[35] inE[36] inE[3] inE[4] inE[5] inE[6] 
++inE[7] inE[8] inE[9] od[10] od[11] od[12] od[13] od[14] od[15] od[16] od[17] 
++od[18] od[19] od[1] od[20] od[21] od[22] od[23] od[24] od[25] od[26] od[27] 
++od[28] od[29] od[2] od[30] od[31] od[32] od[33] od[34] od[35] od[36] od[3] 
++od[4] od[5] od[6] od[7] od[8] od[9] mc out[10] out[11] out[12] out[13] 
++out[14] out[15] out[16] out[17] out[18] out[19] out[1] out[20] out[21] 
++out[22] out[23] out[24] out[25] out[26] out[27] out[28] out[29] out[2] 
++out[30] out[31] out[32] out[33] out[34] out[35] out[36] out[3] out[4] out[5] 
++out[6] out[7] out[8] out[9] s[2] s[3] s[4] s[5] rqStageD
+XscanKhx5@0 clS[F] clS[T] cl[F] cl[T] s[1] s[2] s[3] s[4] s[5] mc rd[F] rd[T] 
++sin sout scanKhx5
+Xwire90@0 net@17 net@63 wire90-1358_4-layer_1-width_4
+Xwire90@1 od[1] wire90@1_b wire90-641-layer_1-width_4
+Xwire90@2 od[2] wire90@2_b wire90-641-layer_1-width_4
+Xwire90@3 od[3] wire90@3_b wire90-644-layer_1-width_4
+Xwire90@4 od[4] wire90@4_b wire90-647-layer_1-width_4
+Xwire90@5 od[5] wire90@5_b wire90-638-layer_1-width_4
+Xwire90@6 od[6] wire90@6_b wire90-654-layer_1-width_4
+Xwire90@7 od[7] wire90@7_b wire90-636_5-layer_1-width_4
+Xwire90@8 od[8] wire90@8_b wire90-645_5-layer_1-width_4
+Xwire90@9 od[9] wire90@9_b wire90-639_5-layer_1-width_4
+Xwire90@10 od[10] wire90@10_b wire90-612_5-layer_1-width_4
+Xwire90@11 od[11] wire90@11_b wire90-602_4-layer_1-width_4
+Xwire90@12 od[12] wire90@12_b wire90-604_5-layer_1-width_4
+Xwire90@13 od[13] wire90@13_b wire90-605_4-layer_1-width_4
+Xwire90@14 od[14] wire90@14_b wire90-625-layer_1-width_4
+Xwire90@15 od[15] wire90@15_b wire90-604_6-layer_1-width_4
+Xwire90@16 od[16] wire90@16_b wire90-623-layer_1-width_4
+Xwire90@17 od[17] wire90@17_b wire90-597_9-layer_1-width_4
+Xwire90@18 od[18] wire90@18_b wire90-618-layer_1-width_4
+Xwire90@19 od[19] wire90@19_b wire90-641-layer_1-width_4
+Xwire90@20 od[20] wire90@20_b wire90-641-layer_1-width_4
+Xwire90@21 od[21] wire90@21_b wire90-2012_6-layer_1-width_4
+Xwire90@22 od[22] wire90@22_b wire90-647-layer_1-width_4
+Xwire90@23 od[23] wire90@23_b wire90-638-layer_1-width_4
+Xwire90@24 od[24] wire90@24_b wire90-654-layer_1-width_4
+Xwire90@25 od[25] wire90@25_b wire90-636_5-layer_1-width_4
+Xwire90@26 od[26] wire90@26_b wire90-645_5-layer_1-width_4
+Xwire90@27 od[27] wire90@27_b wire90-639_5-layer_1-width_4
+Xwire90@28 od[28] wire90@28_b wire90-612_5-layer_1-width_4
+Xwire90@29 od[29] wire90@29_b wire90-602_4-layer_1-width_4
+Xwire90@30 od[30] wire90@30_b wire90-1745_9-layer_1-width_4
+Xwire90@31 od[31] wire90@31_b wire90-605_4-layer_1-width_4
+Xwire90@32 od[32] wire90@32_b wire90-625-layer_1-width_4
+Xwire90@33 od[33] wire90@33_b wire90-604_6-layer_1-width_4
+Xwire90@34 od[34] wire90@34_b wire90-623-layer_1-width_4
+Xwire90@35 od[35] wire90@35_b wire90-597_9-layer_1-width_4
+Xwire90@36 od[36] wire90@36_b wire90-618-layer_1-width_4
+.ENDS odRQstageD
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-162_4-R_34_667m a b
+Ccap@0 gnd net@14 0.595f
+Ccap@1 gnd net@8 0.595f
+Ccap@2 gnd net@11 0.595f
+Rres@0 net@14 a 0.938
+Rres@1 net@11 net@14 1.877
+Rres@2 b net@8 0.938
+Rres@3 net@8 net@11 1.877
+.ENDS wire-C_0_011f-162_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-162_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-162_4-R_34_667m
+.ENDS wire90-162_4-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-228_5-R_34_667m a b
+Ccap@0 gnd net@14 0.838f
+Ccap@1 gnd net@8 0.838f
+Ccap@2 gnd net@11 0.838f
+Rres@0 net@14 a 1.32
+Rres@1 net@11 net@14 2.64
+Rres@2 b net@8 1.32
+Rres@3 net@8 net@11 2.64
+.ENDS wire-C_0_011f-228_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-228_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-228_5-R_34_667m
+.ENDS wire90-228_5-layer_1-width_3
+
+*** CELL: latchesK:rsLatchA{sch}
+.SUBCKT rsLatchA mc out outBar reset set
+XNMOSx@0 net@193 reset gnd NMOSx-X_10
+XNMOSx@1 net@188 mc gnd NMOSx-X_4
+XPMOSx@3 net@188 net@177 vdd PMOSx-X_10
+Xinv@0 net@193 outBar inv-X_10
+Xinv@1 set net@213 inv-X_4
+Xinv@2 outBar out inv-X_10
+Xnms2@0 net@188 outBar net@177 nms2-X_2
+Xpms3@0 net@193 mc outBar reset pms3-X_1
+Xwire90@0 net@213 net@177 wire90-162_4-layer_1-width_3
+Xwire90@1 net@188 net@193 wire90-228_5-layer_1-width_3
+.ENDS rsLatchA
+
+*** CELL: redFour:nor2_sy{sch}
+.SUBCKT nor2_sy-X_5 ina inb out
+XNMOS@0 out inb gnd NMOSx-X_5
+XNMOS@1 out ina gnd NMOSx-X_5
+Xpms2_sy@0 out ina inb pms2_sy-X_5
+.ENDS nor2_sy-X_5
+
+*** CELL: driversL:sucORdri20{sch}
+.SUBCKT sucORdri20 inA inB succ
+XPMOSx@0 succ net@51 vdd PMOSx-X_20
+Xinv@0 succ net@71 inv-X_4
+Xnms2@0 succ net@73 net@51 nms2-X_2
+Xnor2_sy@0 inA inB net@67 nor2_sy-X_5
+Xwire90@0 net@67 net@51 wire90-1001_8-layer_1-width_3
+Xwire90@1 net@73 net@71 wire90-209-layer_1-width_3
+.ENDS sucORdri20
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-345_1-R_34_667m a b
+Ccap@0 gnd net@14 1.265f
+Ccap@1 gnd net@8 1.265f
+Ccap@2 gnd net@11 1.265f
+Rres@0 net@14 a 1.994
+Rres@1 net@11 net@14 3.988
+Rres@2 b net@8 1.994
+Rres@3 net@8 net@11 3.988
+.ENDS wire-C_0_011f-345_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-345_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-345_1-R_34_667m
+.ENDS wire90-345_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-537-R_34_667m a b
+Ccap@0 gnd net@14 1.969f
+Ccap@1 gnd net@8 1.969f
+Ccap@2 gnd net@11 1.969f
+Rres@0 net@14 a 3.103
+Rres@1 net@11 net@14 6.205
+Rres@2 b net@8 3.103
+Rres@3 net@8 net@11 6.205
+.ENDS wire-C_0_011f-537-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-537-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-537-R_34_667m
+.ENDS wire90-537-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-470_7-R_34_667m a b
+Ccap@0 gnd net@14 1.726f
+Ccap@1 gnd net@8 1.726f
+Ccap@2 gnd net@11 1.726f
+Rres@0 net@14 a 2.72
+Rres@1 net@11 net@14 5.439
+Rres@2 b net@8 2.72
+Rres@3 net@8 net@11 5.439
+.ENDS wire-C_0_011f-470_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-470_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-470_7-R_34_667m
+.ENDS wire90-470_7-layer_1-width_3
+
+*** CELL: gaspL:anAltEnd{sch}
+.SUBCKT anAltEnd fire[A] fire[B] mc predA predB s[1] s[2] s[3] succ
+XctrAND4i@2 net@1013 succ fire[B] s[2] fire[A] ctrAND4in30
+XctrAND4i@3 net@1007 succ net@1127 fire[A] fire[B] ctrAND4in30
+Xinv@3 net@822 s[1] inv-X_10
+Xinv@4 net@824 s[3] inv-X_10
+Xinv@5 predA net@822 inv-X_5
+Xinv@6 predB net@824 inv-X_5
+XpredDri2@0 fire[A] mc predA predDri20wMC
+XpredDri2@1 fire[B] mc predB predDri20wMC
+XrsLatchA@1 mc net@1040 net@1082 fire[B] fire[A] rsLatchA
+XsucORdri@0 fire[A] fire[B] succ sucORdri20
+Xwire90@34 net@824 net@1007 wire90-345_1-layer_1-width_3
+Xwire90@35 net@822 net@1013 wire90-345_1-layer_1-width_3
+Xwire90@36 net@1127 net@1082 wire90-537-layer_1-width_3
+Xwire90@37 s[2] net@1040 wire90-470_7-layer_1-width_3
+.ENDS anAltEnd
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-293_4-R_34_667m a b
+Ccap@0 gnd net@14 1.076f
+Ccap@1 gnd net@8 1.076f
+Ccap@2 gnd net@11 1.076f
+Rres@0 net@14 a 1.695
+Rres@1 net@11 net@14 3.39
+Rres@2 b net@8 1.695
+Rres@3 net@8 net@11 3.39
+.ENDS wire-C_0_011f-293_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-293_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-293_4-R_34_667m
+.ENDS wire90-293_4-layer_1-width_3
+
+*** CELL: scanK:scanKhx3{sch}
+.SUBCKT scanKhx3 clS[F] clS[T] cl[F] cl[T] din[1] din[2] din[3] mc rd[F] 
++rd[T] sin sout
+XscanCell@4 clS[F] clS[T] cl[F] cl[T] din[1] rd[F] rd[T] sin net@18 
++scanCellKh
+XscanCell@5 clS[F] clS[T] cl[F] cl[T] din[2] rd[F] rd[T] net@31 net@20 
++scanCellKh
+XscanCell@6 clS[F] clS[T] cl[F] cl[T] din[3] rd[F] rd[T] net@32 sout 
++scanCellKh
+Xwire90@0 net@18 net@31 wire90-293_4-layer_1-width_3
+Xwire90@1 net@20 net@32 wire90-293_4-layer_1-width_3
+.ENDS scanKhx3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1336_2-R_34_667m a b
+Ccap@0 gnd net@14 4.899f
+Ccap@1 gnd net@8 4.899f
+Ccap@2 gnd net@11 4.899f
+Rres@0 net@14 a 7.72
+Rres@1 net@11 net@14 15.441
+Rres@2 b net@8 7.72
+Rres@3 net@8 net@11 15.441
+.ENDS wire-C_0_011f-1336_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1336_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1336_2-R_34_667m
+.ENDS wire90-1336_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1307-R_34_667m a b
+Ccap@0 gnd net@14 4.792f
+Ccap@1 gnd net@8 4.792f
+Ccap@2 gnd net@11 4.792f
+Rres@0 net@14 a 7.552
+Rres@1 net@11 net@14 15.103
+Rres@2 b net@8 7.552
+Rres@3 net@8 net@11 15.103
+.ENDS wire-C_0_011f-1307-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1307-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1307-R_34_667m
+.ENDS wire90-1307-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-403_1-R_34_667m a b
+Ccap@0 gnd net@14 1.478f
+Ccap@1 gnd net@8 1.478f
+Ccap@2 gnd net@11 1.478f
+Rres@0 net@14 a 2.329
+Rres@1 net@11 net@14 4.658
+Rres@2 b net@8 2.329
+Rres@3 net@8 net@11 4.658
+.ENDS wire-C_0_011f-403_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-403_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-403_1-R_34_667m
+.ENDS wire90-403_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-600_8-R_34_667m a b
+Ccap@0 gnd net@14 2.203f
+Ccap@1 gnd net@8 2.203f
+Ccap@2 gnd net@11 2.203f
+Rres@0 net@14 a 3.471
+Rres@1 net@11 net@14 6.943
+Rres@2 b net@8 3.471
+Rres@3 net@8 net@11 6.943
+.ENDS wire-C_0_011f-600_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-600_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-600_8-R_34_667m
+.ENDS wire90-600_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-274_5-R_34_667m a b
+Ccap@0 gnd net@14 1.006f
+Ccap@1 gnd net@8 1.006f
+Ccap@2 gnd net@11 1.006f
+Rres@0 net@14 a 1.586
+Rres@1 net@11 net@14 3.172
+Rres@2 b net@8 1.586
+Rres@3 net@8 net@11 3.172
+.ENDS wire-C_0_011f-274_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-274_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-274_5-R_34_667m
+.ENDS wire90-274_5-layer_1-width_3
+
+*** CELL: gaspL:anAltEndS{sch}
+.SUBCKT anAltEndS clS[F] clS[T] cl[F] cl[T] mc predA predB rd[F] rd[T] sin 
++sout succ take[A] take[B]
+XanAltEnd@1 fire[A] fire[B] mc predA predB ss[1] ss[2] ss[3] succ anAltEnd
+XlatchDri@2 net@942 take[A] latchDriver60
+XlatchDri@5 net@946 take[B] latchDriver60
+XscanKhx3@0 clS[F] clS[T] cl[F] cl[T] ss[1] ss[2] ss[3] mc rd[F] rd[T] sin 
++sout scanKhx3
+Xwire90@0 net@946 fire[B] wire90-1336_2-layer_1-width_3
+Xwire90@1 net@942 fire[A] wire90-1307-layer_1-width_3
+Xwire90@2 wire90@2_a ss[1] wire90-403_1-layer_1-width_3
+Xwire90@3 wire90@3_a ss[2] wire90-600_8-layer_1-width_3
+Xwire90@4 wire90@4_a ss[3] wire90-274_5-layer_1-width_3
+.ENDS anAltEndS
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3929_3-R_34_667m a b
+Ccap@0 gnd net@14 14.407f
+Ccap@1 gnd net@8 14.407f
+Ccap@2 gnd net@11 14.407f
+Rres@0 net@14 a 22.703
+Rres@1 net@11 net@14 45.405
+Rres@2 b net@8 22.703
+Rres@3 net@8 net@11 45.405
+.ENDS wire-C_0_011f-3929_3-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3929_3-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-3929_3-R_34_667m
+.ENDS wire90-3929_3-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3970_7-R_34_667m a b
+Ccap@0 gnd net@14 14.559f
+Ccap@1 gnd net@8 14.559f
+Ccap@2 gnd net@11 14.559f
+Rres@0 net@14 a 22.942
+Rres@1 net@11 net@14 45.884
+Rres@2 b net@8 22.942
+Rres@3 net@8 net@11 45.884
+.ENDS wire-C_0_011f-3970_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3970_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-3970_7-R_34_667m
+.ENDS wire90-3970_7-layer_1-width_3
+
+*** CELL: fifoL:splitEnd{sch}
+.SUBCKT splitEnd clS[F] clS[T] cl[F] cl[T] inA[10] inA[11] inA[12] inA[13] 
++inA[14] inA[15] inA[16] inA[17] inA[18] inA[19] inA[1] inA[20] inA[21] 
++inA[22] inA[23] inA[24] inA[25] inA[26] inA[27] inA[28] inA[29] inA[2] 
++inA[30] inA[31] inA[32] inA[33] inA[34] inA[35] inA[36] inA[3] inA[4] inA[5] 
++inA[6] inA[7] inA[8] inA[9] inB[10] inB[11] inB[12] inB[13] inB[14] inB[15] 
++inB[16] inB[17] inB[18] inB[19] inB[1] inB[20] inB[21] inB[22] inB[23] 
++inB[24] inB[25] inB[26] inB[27] inB[28] inB[29] inB[2] inB[30] inB[31] 
++inB[32] inB[33] inB[34] inB[35] inB[36] inB[3] inB[4] inB[5] inB[6] inB[7] 
++inB[8] inB[9] mc out[10] out[11] out[12] out[13] out[14] out[15] out[16] 
++out[17] out[18] out[19] out[1] out[20] out[21] out[22] out[23] out[24] 
++out[25] out[26] out[27] out[28] out[29] out[2] out[30] out[31] out[32] 
++out[33] out[34] out[35] out[36] out[3] out[4] out[5] out[6] out[7] out[8] 
++out[9] predA predB rd[F] rd[T] sin sout succ
+XanAltEnd@1 clS[F] clS[T] cl[F] cl[T] mc predA predB rd[F] rd[T] sin sout 
++succ take[A] take[B] anAltEndS
+Xins2in20@0 net@38 net@34 inA[10] inA[11] inA[12] inA[13] inA[14] inA[15] 
++inA[16] inA[17] inA[18] inA[19] inA[1] inA[20] inA[21] inA[22] inA[23] 
++inA[24] inA[25] inA[26] inA[27] inA[28] inA[29] inA[2] inA[30] inA[31] 
++inA[32] inA[33] inA[34] inA[35] inA[36] inA[3] inA[4] inA[5] inA[6] inA[7] 
++inA[8] inA[9] inB[10] inB[11] inB[12] inB[13] inB[14] inB[15] inB[16] inB[17] 
++inB[18] inB[19] inB[1] inB[20] inB[21] inB[22] inB[23] inB[24] inB[25] 
++inB[26] inB[27] inB[28] inB[29] inB[2] inB[30] inB[31] inB[32] inB[33] 
++inB[34] inB[35] inB[36] inB[3] inB[4] inB[5] inB[6] inB[7] inB[8] inB[9] 
++out[10] out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] 
++out[19] out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] 
++out[27] out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] 
++out[35] out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9] ins2in20Ax36
+Xwire90@0 net@34 take[B] wire90-3929_3-layer_1-width_3
+Xwire90@1 net@38 take[A] wire90-3970_7-layer_1-width_3
+.ENDS splitEnd
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-237_2-R_34_667m a b
+Ccap@0 gnd net@14 0.87f
+Ccap@1 gnd net@8 0.87f
+Ccap@2 gnd net@11 0.87f
+Rres@0 net@14 a 1.37
+Rres@1 net@11 net@14 2.741
+Rres@2 b net@8 1.37
+Rres@3 net@8 net@11 2.741
+.ENDS wire-C_0_011f-237_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-237_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-237_2-R_34_667m
+.ENDS wire90-237_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-221_8-R_34_667m a b
+Ccap@0 gnd net@14 0.813f
+Ccap@1 gnd net@8 0.813f
+Ccap@2 gnd net@11 0.813f
+Rres@0 net@14 a 1.282
+Rres@1 net@11 net@14 2.563
+Rres@2 b net@8 1.282
+Rres@3 net@8 net@11 2.563
+.ENDS wire-C_0_011f-221_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-221_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-221_8-R_34_667m
+.ENDS wire90-221_8-layer_1-width_3
+
+*** CELL: centersJ:ctrAND4in30M{sch}
+.SUBCKT ctrAND4in30M inA inB inC inD out outM
+Xinv@1 outM out inv-X_30
+Xnand2@1 net@43 net@58 outM nand2-X_10
+Xnor2HT_s@1 inA inB net@61 nor2HT_sy-X_4
+Xnor2n@0 inD inC net@64 nor2n-X_5
+Xwire90@0 net@64 net@43 wire90-237_2-layer_1-width_3
+Xwire90@2 net@61 net@58 wire90-221_8-layer_1-width_3
+.ENDS ctrAND4in30M
+
+*** CELL: redFour:nand2_sy{sch}
+.SUBCKT nand2_sy-X_10 ina inb out
+XPMOS@0 out inb vdd PMOSx-X_10
+XPMOS@1 out ina vdd PMOSx-X_10
+Xnms2_sy@0 out ina inb nms2_sy-X_10
+.ENDS nand2_sy-X_10
+
+*** CELL: redFour:nand2n_sy{sch}
+.SUBCKT nand2n_sy-X_10 ina inb out
+Xnand2_sy@0 ina inb out nand2_sy-X_10
+.ENDS nand2n_sy-X_10
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-700-R_34_667m a b
+Ccap@0 gnd net@14 2.567f
+Ccap@1 gnd net@8 2.567f
+Ccap@2 gnd net@11 2.567f
+Rres@0 net@14 a 4.044
+Rres@1 net@11 net@14 8.089
+Rres@2 b net@8 4.044
+Rres@3 net@8 net@11 8.089
+.ENDS wire-C_0_011f-700-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-700-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-700-R_34_667m
+.ENDS wire90-700-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-839_6-R_34_667m a b
+Ccap@0 gnd net@14 3.079f
+Ccap@1 gnd net@8 3.079f
+Ccap@2 gnd net@11 3.079f
+Rres@0 net@14 a 4.851
+Rres@1 net@11 net@14 9.702
+Rres@2 b net@8 4.851
+Rres@3 net@8 net@11 9.702
+.ENDS wire-C_0_011f-839_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-839_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-839_6-R_34_667m
+.ENDS wire90-839_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-438_2-R_34_667m a b
+Ccap@0 gnd net@14 1.607f
+Ccap@1 gnd net@8 1.607f
+Ccap@2 gnd net@11 1.607f
+Rres@0 net@14 a 2.532
+Rres@1 net@11 net@14 5.064
+Rres@2 b net@8 2.532
+Rres@3 net@8 net@11 5.064
+.ENDS wire-C_0_011f-438_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-438_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-438_2-R_34_667m
+.ENDS wire90-438_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-257_4-R_34_667m a b
+Ccap@0 gnd net@14 0.944f
+Ccap@1 gnd net@8 0.944f
+Ccap@2 gnd net@11 0.944f
+Rres@0 net@14 a 1.487
+Rres@1 net@11 net@14 2.974
+Rres@2 b net@8 1.487
+Rres@3 net@8 net@11 2.974
+.ENDS wire-C_0_011f-257_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-257_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-257_4-R_34_667m
+.ENDS wire90-257_4-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-458_8-R_34_667m a b
+Ccap@0 gnd net@14 1.682f
+Ccap@1 gnd net@8 1.682f
+Ccap@2 gnd net@11 1.682f
+Rres@0 net@14 a 2.651
+Rres@1 net@11 net@14 5.302
+Rres@2 b net@8 2.651
+Rres@3 net@8 net@11 5.302
+.ENDS wire-C_0_011f-458_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-458_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-458_8-R_34_667m
+.ENDS wire90-458_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-744_5-R_34_667m a b
+Ccap@0 gnd net@14 2.73f
+Ccap@1 gnd net@8 2.73f
+Ccap@2 gnd net@11 2.73f
+Rres@0 net@14 a 4.302
+Rres@1 net@11 net@14 8.603
+Rres@2 b net@8 4.302
+Rres@3 net@8 net@11 8.603
+.ENDS wire-C_0_011f-744_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-744_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-744_5-R_34_667m
+.ENDS wire90-744_5-layer_1-width_3
+
+*** CELL: gaspL:anAltStart{sch}
+.SUBCKT anAltStart fire[A] fire[B] mc pred s[1] s[2] succA succB
+XctrAND4i@1 net@634 succA fire[B] s[2] fire[A] net@866 ctrAND4in30M
+XctrAND4i@3 net@634 succB net@909 fire[A] fire[B] net@885 ctrAND4in30M
+Xinv@3 net@634 s[1] inv-X_10
+Xinv@4 pred net@787 inv-X_10
+Xnand2n_s@0 net@143 net@410 net@422 nand2n_sy-X_10
+XpredDri2@0 net@815 mc pred predDri20wMC
+XrsLatchA@1 mc net@905 net@911 fire[B] fire[A] rsLatchA
+XsucDri20@0 fire[A] succA sucDri20
+XsucDri20@1 fire[B] succB sucDri20
+Xwire90@16 net@410 net@866 wire90-700-layer_1-width_3
+Xwire90@17 net@143 net@885 wire90-839_6-layer_1-width_3
+Xwire90@19 s[2] net@905 wire90-438_2-layer_1-width_3
+Xwire90@20 net@815 net@422 wire90-257_4-layer_1-width_3
+Xwire90@27 net@909 net@911 wire90-458_8-layer_1-width_3
+Xwire90@28 net@787 net@634 wire90-744_5-layer_1-width_3
+.ENDS anAltStart
+
+*** CELL: driversJ:latchOrDriver60{sch}
+.SUBCKT latchOrDriver60 inA inB out
+Xinv@0 net@8 out inv-X_60
+Xnor2_sy@0 inA inB net@31 nor2_sy-X_20
+Xwire90@0 net@31 net@8 wire90-544_2-layer_1-width_3
+.ENDS latchOrDriver60
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1300-R_34_667m a b
+Ccap@0 gnd net@14 4.767f
+Ccap@1 gnd net@8 4.767f
+Ccap@2 gnd net@11 4.767f
+Rres@0 net@14 a 7.511
+Rres@1 net@11 net@14 15.022
+Rres@2 b net@8 7.511
+Rres@3 net@8 net@11 15.022
+.ENDS wire-C_0_011f-1300-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1300-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1300-R_34_667m
+.ENDS wire90-1300-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1301_9-R_34_667m a b
+Ccap@0 gnd net@14 4.774f
+Ccap@1 gnd net@8 4.774f
+Ccap@2 gnd net@11 4.774f
+Rres@0 net@14 a 7.522
+Rres@1 net@11 net@14 15.044
+Rres@2 b net@8 7.522
+Rres@3 net@8 net@11 15.044
+.ENDS wire-C_0_011f-1301_9-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1301_9-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1301_9-R_34_667m
+.ENDS wire90-1301_9-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-292_5-R_34_667m a b
+Ccap@0 gnd net@14 1.072f
+Ccap@1 gnd net@8 1.072f
+Ccap@2 gnd net@11 1.072f
+Rres@0 net@14 a 1.69
+Rres@1 net@11 net@14 3.38
+Rres@2 b net@8 1.69
+Rres@3 net@8 net@11 3.38
+.ENDS wire-C_0_011f-292_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-292_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-292_5-R_34_667m
+.ENDS wire90-292_5-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-559_6-R_34_667m a b
+Ccap@0 gnd net@14 2.052f
+Ccap@1 gnd net@8 2.052f
+Ccap@2 gnd net@11 2.052f
+Rres@0 net@14 a 3.233
+Rres@1 net@11 net@14 6.466
+Rres@2 b net@8 3.233
+Rres@3 net@8 net@11 6.466
+.ENDS wire-C_0_011f-559_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-559_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-559_6-R_34_667m
+.ENDS wire90-559_6-layer_1-width_3
+
+*** CELL: gaspL:anAltStartS{sch}
+.SUBCKT anAltStartS clS[F] clS[T] cl[F] cl[T] mc pred rd[F] rd[T] sin sout 
++succA succB take
+XanAltSta@1 fire[A] fire[B] mc pred s[1] s[2] succA succB anAltStart
+XlatchOrD@0 net@789 net@792 take latchOrDriver60
+XscanKhx2@0 clS[F] clS[T] cl[F] cl[T] s[1] s[2] mc rd[F] rd[T] sin sout 
++scanKhx2
+Xwire90@0 fire[A] net@789 wire90-1300-layer_1-width_3
+Xwire90@1 fire[B] net@792 wire90-1301_9-layer_1-width_3
+Xwire90@2 wire90@2_a s[1] wire90-292_5-layer_1-width_3
+Xwire90@3 wire90@3_a s[2] wire90-559_6-layer_1-width_3
+.ENDS anAltStartS
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3692_5-R_34_667m a b
+Ccap@0 gnd net@14 13.539f
+Ccap@1 gnd net@8 13.539f
+Ccap@2 gnd net@11 13.539f
+Rres@0 net@14 a 21.334
+Rres@1 net@11 net@14 42.669
+Rres@2 b net@8 21.334
+Rres@3 net@8 net@11 42.669
+.ENDS wire-C_0_011f-3692_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3692_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-3692_5-R_34_667m
+.ENDS wire90-3692_5-layer_1-width_3
+
+*** CELL: fifoL:splitStart{sch}
+.SUBCKT splitStart clS[F] clS[T] cl[F] cl[T] in[10] in[11] in[12] in[13] 
++in[14] in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] 
++in[24] in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] 
++in[34] in[35] in[36] in[3] in[4] in[5] in[6] in[7] in[8] in[9] mc out[10] 
++out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] 
++out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] 
++out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] 
++out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9] pred rd[F] rd[T] sin 
++sout succA succB
+XanAltSta@0 clS[F] clS[T] cl[F] cl[T] mc pred rd[F] rd[T] sin sout succA 
++succB net@2 anAltStartS
+Xins20Bx3@0 net@3 in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] 
++in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] 
++in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] in[3] 
++in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] out[12] out[13] out[14] 
++out[15] out[16] out[17] out[18] out[19] out[1] out[20] out[21] out[22] 
++out[23] out[24] out[25] out[26] out[27] out[28] out[29] out[2] out[30] 
++out[31] out[32] out[33] out[34] out[35] out[36] out[3] out[4] out[5] out[6] 
++out[7] out[8] out[9] ins20Bx36
+Xwire90@0 net@3 net@2 wire90-3692_5-layer_1-width_3
+.ENDS splitStart
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-291_8-R_34_667m a b
+Ccap@0 gnd net@14 1.07f
+Ccap@1 gnd net@8 1.07f
+Ccap@2 gnd net@11 1.07f
+Rres@0 net@14 a 1.686
+Rres@1 net@11 net@14 3.372
+Rres@2 b net@8 1.686
+Rres@3 net@8 net@11 3.372
+.ENDS wire-C_0_011f-291_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-291_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-291_8-R_34_667m
+.ENDS wire90-291_8-layer_1-width_3
+
+*** CELL: gaspL:aStage{sch}
+.SUBCKT aStage fire mc pred s[1] succ
+XctrAND2i@4 net@494 succ fire ctrAND2in30
+Xinv@4 net@987 s[1] inv-X_10
+Xinv@5 pred net@987 inv-X_5
+XpredDri2@1 fire mc pred predDri20wMC
+XsucDri20@1 fire succ sucDri20
+Xwire90@0 net@987 net@494 wire90-291_8-layer_1-width_3
+.ENDS aStage
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3704_051-R_34_667m a b
+Ccap@0 gnd net@14 13.582f
+Ccap@1 gnd net@8 13.582f
+Ccap@2 gnd net@11 13.582f
+Rres@0 net@14 a 21.401
+Rres@1 net@11 net@14 42.802
+Rres@2 b net@8 21.401
+Rres@3 net@8 net@11 42.802
+.ENDS wire-C_0_011f-3704_051-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3704_051-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-3704_051-R_34_667m
+.ENDS wire90-3704_051-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-809_6-R_34_667m a b
+Ccap@0 gnd net@14 2.969f
+Ccap@1 gnd net@8 2.969f
+Ccap@2 gnd net@11 2.969f
+Rres@0 net@14 a 4.678
+Rres@1 net@11 net@14 9.355
+Rres@2 b net@8 4.678
+Rres@3 net@8 net@11 9.355
+.ENDS wire-C_0_011f-809_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-809_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-809_6-R_34_667m
+.ENDS wire90-809_6-layer_1-width_3
+
+*** CELL: fifoL:splitStageD{sch}
+.SUBCKT splitStageD in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] 
++in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] 
++in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] in[3] 
++in[4] in[5] in[6] in[7] in[8] in[9] mc out[10] out[11] out[12] out[13] 
++out[14] out[15] out[16] out[17] out[18] out[19] out[1] out[20] out[21] 
++out[22] out[23] out[24] out[25] out[26] out[27] out[28] out[29] out[2] 
++out[30] out[31] out[32] out[33] out[34] out[35] out[36] out[3] out[4] out[5] 
++out[6] out[7] out[8] out[9] pred s[1] succ
+XaStage@0 net@104 mc pred s[1] succ aStage
+Xins20Bx3@0 net@120 in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] 
++in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] 
++in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] in[3] 
++in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] out[12] out[13] out[14] 
++out[15] out[16] out[17] out[18] out[19] out[1] out[20] out[21] out[22] 
++out[23] out[24] out[25] out[26] out[27] out[28] out[29] out[2] out[30] 
++out[31] out[32] out[33] out[34] out[35] out[36] out[3] out[4] out[5] out[6] 
++out[7] out[8] out[9] ins20Bx36
+XlatchDri@0 fire[1] take[1] latchDriver60
+Xwire90@1 net@120 take[1] wire90-3704_051-layer_1-width_3
+Xwire90@2 net@104 fire[1] wire90-809_6-layer_1-width_3
+.ENDS splitStageD
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-982_1-R_34_667m a b
+Ccap@0 gnd net@14 3.601f
+Ccap@1 gnd net@8 3.601f
+Ccap@2 gnd net@11 3.601f
+Rres@0 net@14 a 5.674
+Rres@1 net@11 net@14 11.349
+Rres@2 b net@8 5.674
+Rres@3 net@8 net@11 11.349
+.ENDS wire-C_0_011f-982_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-982_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-982_1-R_34_667m
+.ENDS wire90-982_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-605_4-R_34_667m a b
+Ccap@0 gnd net@14 2.22f
+Ccap@1 gnd net@8 2.22f
+Ccap@2 gnd net@11 2.22f
+Rres@0 net@14 a 3.498
+Rres@1 net@11 net@14 6.996
+Rres@2 b net@8 3.498
+Rres@3 net@8 net@11 6.996
+.ENDS wire-C_0_011f-605_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-605_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-605_4-R_34_667m
+.ENDS wire90-605_4-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-613_4-R_34_667m a b
+Ccap@0 gnd net@14 2.249f
+Ccap@1 gnd net@8 2.249f
+Ccap@2 gnd net@11 2.249f
+Rres@0 net@14 a 3.544
+Rres@1 net@11 net@14 7.088
+Rres@2 b net@8 3.544
+Rres@3 net@8 net@11 7.088
+.ENDS wire-C_0_011f-613_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-613_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-613_4-R_34_667m
+.ENDS wire90-613_4-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-623_9-R_34_667m a b
+Ccap@0 gnd net@14 2.288f
+Ccap@1 gnd net@8 2.288f
+Ccap@2 gnd net@11 2.288f
+Rres@0 net@14 a 3.605
+Rres@1 net@11 net@14 7.21
+Rres@2 b net@8 3.605
+Rres@3 net@8 net@11 7.21
+.ENDS wire-C_0_011f-623_9-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-623_9-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-623_9-R_34_667m
+.ENDS wire90-623_9-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-625_9-R_34_667m a b
+Ccap@0 gnd net@14 2.295f
+Ccap@1 gnd net@8 2.295f
+Ccap@2 gnd net@11 2.295f
+Rres@0 net@14 a 3.616
+Rres@1 net@11 net@14 7.233
+Rres@2 b net@8 3.616
+Rres@3 net@8 net@11 7.233
+.ENDS wire-C_0_011f-625_9-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-625_9-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-625_9-R_34_667m
+.ENDS wire90-625_9-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-607_8-R_34_667m a b
+Ccap@0 gnd net@14 2.229f
+Ccap@1 gnd net@8 2.229f
+Ccap@2 gnd net@11 2.229f
+Rres@0 net@14 a 3.512
+Rres@1 net@11 net@14 7.023
+Rres@2 b net@8 3.512
+Rres@3 net@8 net@11 7.023
+.ENDS wire-C_0_011f-607_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-607_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-607_8-R_34_667m
+.ENDS wire90-607_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-620_9-R_34_667m a b
+Ccap@0 gnd net@14 2.277f
+Ccap@1 gnd net@8 2.277f
+Ccap@2 gnd net@11 2.277f
+Rres@0 net@14 a 3.587
+Rres@1 net@11 net@14 7.175
+Rres@2 b net@8 3.587
+Rres@3 net@8 net@11 7.175
+.ENDS wire-C_0_011f-620_9-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-620_9-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-620_9-R_34_667m
+.ENDS wire90-620_9-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-612_5-R_34_667m a b
+Ccap@0 gnd net@14 2.246f
+Ccap@1 gnd net@8 2.246f
+Ccap@2 gnd net@11 2.246f
+Rres@0 net@14 a 3.539
+Rres@1 net@11 net@14 7.078
+Rres@2 b net@8 3.539
+Rres@3 net@8 net@11 7.078
+.ENDS wire-C_0_011f-612_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-612_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-612_5-R_34_667m
+.ENDS wire90-612_5-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-602_4-R_34_667m a b
+Ccap@0 gnd net@14 2.209f
+Ccap@1 gnd net@8 2.209f
+Ccap@2 gnd net@11 2.209f
+Rres@0 net@14 a 3.481
+Rres@1 net@11 net@14 6.961
+Rres@2 b net@8 3.481
+Rres@3 net@8 net@11 6.961
+.ENDS wire-C_0_011f-602_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-602_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-602_4-R_34_667m
+.ENDS wire90-602_4-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-607-R_34_667m a b
+Ccap@0 gnd net@14 2.226f
+Ccap@1 gnd net@8 2.226f
+Ccap@2 gnd net@11 2.226f
+Rres@0 net@14 a 3.507
+Rres@1 net@11 net@14 7.014
+Rres@2 b net@8 3.507
+Rres@3 net@8 net@11 7.014
+.ENDS wire-C_0_011f-607-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-607-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-607-R_34_667m
+.ENDS wire90-607-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-620_5-R_34_667m a b
+Ccap@0 gnd net@14 2.275f
+Ccap@1 gnd net@8 2.275f
+Ccap@2 gnd net@11 2.275f
+Rres@0 net@14 a 3.585
+Rres@1 net@11 net@14 7.17
+Rres@2 b net@8 3.585
+Rres@3 net@8 net@11 7.17
+.ENDS wire-C_0_011f-620_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-620_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-620_5-R_34_667m
+.ENDS wire90-620_5-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-624_5-R_34_667m a b
+Ccap@0 gnd net@14 2.29f
+Ccap@1 gnd net@8 2.29f
+Ccap@2 gnd net@11 2.29f
+Rres@0 net@14 a 3.608
+Rres@1 net@11 net@14 7.216
+Rres@2 b net@8 3.608
+Rres@3 net@8 net@11 7.216
+.ENDS wire-C_0_011f-624_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-624_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-624_5-R_34_667m
+.ENDS wire90-624_5-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-618-R_34_667m a b
+Ccap@0 gnd net@14 2.266f
+Ccap@1 gnd net@8 2.266f
+Ccap@2 gnd net@11 2.266f
+Rres@0 net@14 a 3.571
+Rres@1 net@11 net@14 7.141
+Rres@2 b net@8 3.571
+Rres@3 net@8 net@11 7.141
+.ENDS wire-C_0_011f-618-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-618-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-618-R_34_667m
+.ENDS wire90-618-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-532-R_34_667m a b
+Ccap@0 gnd net@14 1.951f
+Ccap@1 gnd net@8 1.951f
+Ccap@2 gnd net@11 1.951f
+Rres@0 net@14 a 3.074
+Rres@1 net@11 net@14 6.148
+Rres@2 b net@8 3.074
+Rres@3 net@8 net@11 6.148
+.ENDS wire-C_0_011f-532-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-532-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-532-R_34_667m
+.ENDS wire90-532-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-238-R_34_667m a b
+Ccap@0 gnd net@14 0.873f
+Ccap@1 gnd net@8 0.873f
+Ccap@2 gnd net@11 0.873f
+Rres@0 net@14 a 1.375
+Rres@1 net@11 net@14 2.75
+Rres@2 b net@8 1.375
+Rres@3 net@8 net@11 2.75
+.ENDS wire-C_0_011f-238-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-238-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-238-R_34_667m
+.ENDS wire90-238-layer_1-width_3
+
+*** CELL: fifoL:splitStageDx2{sch}
+.SUBCKT splitStageDx2 clS[F] clS[T] cl[F] cl[T] in[10] in[11] in[12] in[13] 
++in[14] in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] 
++in[24] in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] 
++in[34] in[35] in[36] in[3] in[4] in[5] in[6] in[7] in[8] in[9] mc out[10] 
++out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] 
++out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] 
++out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] 
++out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9] pred rd[F] rd[T] sin 
++sout succ
+XscanKhx2@0 clS[F] clS[T] cl[F] cl[T] s[1] s[2] mc rd[F] rd[T] sin sout 
++scanKhx2
+XsplitSta@1 in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] in[18] 
++in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] in[28] 
++in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] in[3] in[4] 
++in[5] in[6] in[7] in[8] in[9] mc x[10] x[11] x[12] x[13] x[14] x[15] x[16] 
++x[17] x[18] x[19] x[1] x[20] x[21] x[22] x[23] x[24] x[25] x[26] x[27] x[28] 
++x[29] x[2] x[30] x[31] x[32] x[33] x[34] x[35] x[36] x[3] x[4] x[5] x[6] x[7] 
++x[8] x[9] pred s[1] net@155 splitStageD
+XsplitSta@2 x[10] x[11] x[12] x[13] x[14] x[15] x[16] x[17] x[18] x[19] x[1] 
++x[20] x[21] x[22] x[23] x[24] x[25] x[26] x[27] x[28] x[29] x[2] x[30] x[31] 
++x[32] x[33] x[34] x[35] x[36] x[3] x[4] x[5] x[6] x[7] x[8] x[9] mc out[10] 
++out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] 
++out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] 
++out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] 
++out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9] net@154 s[2] succ 
++splitStageD
+Xwire90@3 net@155 net@154 wire90-982_1-layer_1-width_3
+Xwire90@4 x[1] wire90@4_b wire90-605_4-layer_1-width_3
+Xwire90@5 x[2] wire90@5_b wire90-613_4-layer_1-width_3
+Xwire90@6 x[3] wire90@6_b wire90-605_4-layer_1-width_3
+Xwire90@7 x[4] wire90@7_b wire90-623_9-layer_1-width_3
+Xwire90@8 x[5] wire90@8_b wire90-605_4-layer_1-width_3
+Xwire90@9 x[6] wire90@9_b wire90-625_9-layer_1-width_3
+Xwire90@10 x[7] wire90@10_b wire90-607_8-layer_1-width_3
+Xwire90@11 x[8] wire90@11_b wire90-620_9-layer_1-width_3
+Xwire90@12 x[9] wire90@12_b wire90-605_4-layer_1-width_3
+Xwire90@13 x[10] wire90@13_b wire90-612_5-layer_1-width_3
+Xwire90@14 x[11] wire90@14_b wire90-602_4-layer_1-width_3
+Xwire90@15 x[12] wire90@15_b wire90-607-layer_1-width_3
+Xwire90@16 x[13] wire90@16_b wire90-602_4-layer_1-width_3
+Xwire90@17 x[14] wire90@17_b wire90-620_5-layer_1-width_3
+Xwire90@18 x[15] wire90@18_b wire90-602_4-layer_1-width_3
+Xwire90@19 x[16] wire90@19_b wire90-624_5-layer_1-width_3
+Xwire90@20 x[17] wire90@20_b wire90-602_4-layer_1-width_3
+Xwire90@21 x[18] wire90@21_b wire90-618-layer_1-width_3
+Xwire90@22 x[19] wire90@22_b wire90-605_4-layer_1-width_3
+Xwire90@23 x[20] wire90@23_b wire90-613_4-layer_1-width_3
+Xwire90@24 x[21] wire90@24_b wire90-605_4-layer_1-width_3
+Xwire90@25 x[22] wire90@25_b wire90-623_9-layer_1-width_3
+Xwire90@26 x[23] wire90@26_b wire90-605_4-layer_1-width_3
+Xwire90@27 x[24] wire90@27_b wire90-625_9-layer_1-width_3
+Xwire90@28 x[25] wire90@28_b wire90-607_8-layer_1-width_3
+Xwire90@29 x[26] wire90@29_b wire90-620_9-layer_1-width_3
+Xwire90@30 x[27] wire90@30_b wire90-605_4-layer_1-width_3
+Xwire90@31 x[28] wire90@31_b wire90-612_5-layer_1-width_3
+Xwire90@32 x[29] wire90@32_b wire90-602_4-layer_1-width_3
+Xwire90@33 x[30] wire90@33_b wire90-607-layer_1-width_3
+Xwire90@34 x[31] wire90@34_b wire90-602_4-layer_1-width_3
+Xwire90@35 x[32] wire90@35_b wire90-620_5-layer_1-width_3
+Xwire90@36 x[33] wire90@36_b wire90-602_4-layer_1-width_3
+Xwire90@37 x[34] wire90@37_b wire90-624_5-layer_1-width_3
+Xwire90@38 x[35] wire90@38_b wire90-602_4-layer_1-width_3
+Xwire90@39 x[36] wire90@39_b wire90-618-layer_1-width_3
+Xwire90@40 wire90@40_a s[2] wire90-532-layer_1-width_3
+Xwire90@41 wire90@41_a s[1] wire90-238-layer_1-width_3
+.ENDS splitStageDx2
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2777_3-R_34_667m a b
+Ccap@0 gnd net@14 10.183f
+Ccap@1 gnd net@8 10.183f
+Ccap@2 gnd net@11 10.183f
+Rres@0 net@14 a 16.047
+Rres@1 net@11 net@14 32.093
+Rres@2 b net@8 16.047
+Rres@3 net@8 net@11 32.093
+.ENDS wire-C_0_011f-2777_3-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2777_3-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2777_3-R_34_667m
+.ENDS wire90-2777_3-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2581_1-R_34_667m a b
+Ccap@0 gnd net@14 9.464f
+Ccap@1 gnd net@8 9.464f
+Ccap@2 gnd net@11 9.464f
+Rres@0 net@14 a 14.913
+Rres@1 net@11 net@14 29.826
+Rres@2 b net@8 14.913
+Rres@3 net@8 net@11 29.826
+.ENDS wire-C_0_011f-2581_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2581_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2581_1-R_34_667m
+.ENDS wire90-2581_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2599_6-R_34_667m a b
+Ccap@0 gnd net@14 9.532f
+Ccap@1 gnd net@8 9.532f
+Ccap@2 gnd net@11 9.532f
+Rres@0 net@14 a 15.02
+Rres@1 net@11 net@14 30.04
+Rres@2 b net@8 15.02
+Rres@3 net@8 net@11 30.04
+.ENDS wire-C_0_011f-2599_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2599_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2599_6-R_34_667m
+.ENDS wire90-2599_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2611_1-R_34_667m a b
+Ccap@0 gnd net@14 9.574f
+Ccap@1 gnd net@8 9.574f
+Ccap@2 gnd net@11 9.574f
+Rres@0 net@14 a 15.086
+Rres@1 net@11 net@14 30.173
+Rres@2 b net@8 15.086
+Rres@3 net@8 net@11 30.173
+.ENDS wire-C_0_011f-2611_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2611_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2611_1-R_34_667m
+.ENDS wire90-2611_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2654_1-R_34_667m a b
+Ccap@0 gnd net@14 9.732f
+Ccap@1 gnd net@8 9.732f
+Ccap@2 gnd net@11 9.732f
+Rres@0 net@14 a 15.335
+Rres@1 net@11 net@14 30.67
+Rres@2 b net@8 15.335
+Rres@3 net@8 net@11 30.67
+.ENDS wire-C_0_011f-2654_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2654_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2654_1-R_34_667m
+.ENDS wire90-2654_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2637_1-R_34_667m a b
+Ccap@0 gnd net@14 9.669f
+Ccap@1 gnd net@8 9.669f
+Ccap@2 gnd net@11 9.669f
+Rres@0 net@14 a 15.237
+Rres@1 net@11 net@14 30.473
+Rres@2 b net@8 15.237
+Rres@3 net@8 net@11 30.473
+.ENDS wire-C_0_011f-2637_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2637_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2637_1-R_34_667m
+.ENDS wire90-2637_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2690_6-R_34_667m a b
+Ccap@0 gnd net@14 9.866f
+Ccap@1 gnd net@8 9.866f
+Ccap@2 gnd net@11 9.866f
+Rres@0 net@14 a 15.546
+Rres@1 net@11 net@14 31.091
+Rres@2 b net@8 15.546
+Rres@3 net@8 net@11 31.091
+.ENDS wire-C_0_011f-2690_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2690_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2690_6-R_34_667m
+.ENDS wire90-2690_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2675_5-R_34_667m a b
+Ccap@0 gnd net@14 9.81f
+Ccap@1 gnd net@8 9.81f
+Ccap@2 gnd net@11 9.81f
+Rres@0 net@14 a 15.458
+Rres@1 net@11 net@14 30.917
+Rres@2 b net@8 15.458
+Rres@3 net@8 net@11 30.917
+.ENDS wire-C_0_011f-2675_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2675_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2675_5-R_34_667m
+.ENDS wire90-2675_5-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2737_6-R_34_667m a b
+Ccap@0 gnd net@14 10.038f
+Ccap@1 gnd net@8 10.038f
+Ccap@2 gnd net@11 10.038f
+Rres@0 net@14 a 15.817
+Rres@1 net@11 net@14 31.634
+Rres@2 b net@8 15.817
+Rres@3 net@8 net@11 31.634
+.ENDS wire-C_0_011f-2737_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2737_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2737_6-R_34_667m
+.ENDS wire90-2737_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2725_1-R_34_667m a b
+Ccap@0 gnd net@14 9.992f
+Ccap@1 gnd net@8 9.992f
+Ccap@2 gnd net@11 9.992f
+Rres@0 net@14 a 15.745
+Rres@1 net@11 net@14 31.49
+Rres@2 b net@8 15.745
+Rres@3 net@8 net@11 31.49
+.ENDS wire-C_0_011f-2725_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2725_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2725_1-R_34_667m
+.ENDS wire90-2725_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2582_2-R_34_667m a b
+Ccap@0 gnd net@14 9.468f
+Ccap@1 gnd net@8 9.468f
+Ccap@2 gnd net@11 9.468f
+Rres@0 net@14 a 14.919
+Rres@1 net@11 net@14 29.839
+Rres@2 b net@8 14.919
+Rres@3 net@8 net@11 29.839
+.ENDS wire-C_0_011f-2582_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2582_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2582_2-R_34_667m
+.ENDS wire90-2582_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2584_1-R_34_667m a b
+Ccap@0 gnd net@14 9.475f
+Ccap@1 gnd net@8 9.475f
+Ccap@2 gnd net@11 9.475f
+Rres@0 net@14 a 14.93
+Rres@1 net@11 net@14 29.861
+Rres@2 b net@8 14.93
+Rres@3 net@8 net@11 29.861
+.ENDS wire-C_0_011f-2584_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2584_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2584_1-R_34_667m
+.ENDS wire90-2584_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2620_2-R_34_667m a b
+Ccap@0 gnd net@14 9.607f
+Ccap@1 gnd net@8 9.607f
+Ccap@2 gnd net@11 9.607f
+Rres@0 net@14 a 15.139
+Rres@1 net@11 net@14 30.278
+Rres@2 b net@8 15.139
+Rres@3 net@8 net@11 30.278
+.ENDS wire-C_0_011f-2620_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2620_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2620_2-R_34_667m
+.ENDS wire90-2620_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2660_1-R_34_667m a b
+Ccap@0 gnd net@14 9.754f
+Ccap@1 gnd net@8 9.754f
+Ccap@2 gnd net@11 9.754f
+Rres@0 net@14 a 15.369
+Rres@1 net@11 net@14 30.739
+Rres@2 b net@8 15.369
+Rres@3 net@8 net@11 30.739
+.ENDS wire-C_0_011f-2660_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2660_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2660_1-R_34_667m
+.ENDS wire90-2660_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2681_2-R_34_667m a b
+Ccap@0 gnd net@14 9.831f
+Ccap@1 gnd net@8 9.831f
+Ccap@2 gnd net@11 9.831f
+Rres@0 net@14 a 15.491
+Rres@1 net@11 net@14 30.983
+Rres@2 b net@8 15.491
+Rres@3 net@8 net@11 30.983
+.ENDS wire-C_0_011f-2681_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2681_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2681_2-R_34_667m
+.ENDS wire90-2681_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2708_1-R_34_667m a b
+Ccap@0 gnd net@14 9.93f
+Ccap@1 gnd net@8 9.93f
+Ccap@2 gnd net@11 9.93f
+Rres@0 net@14 a 15.647
+Rres@1 net@11 net@14 31.294
+Rres@2 b net@8 15.647
+Rres@3 net@8 net@11 31.294
+.ENDS wire-C_0_011f-2708_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2708_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2708_1-R_34_667m
+.ENDS wire90-2708_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2733_2-R_34_667m a b
+Ccap@0 gnd net@14 10.022f
+Ccap@1 gnd net@8 10.022f
+Ccap@2 gnd net@11 10.022f
+Rres@0 net@14 a 15.792
+Rres@1 net@11 net@14 31.584
+Rres@2 b net@8 15.792
+Rres@3 net@8 net@11 31.584
+.ENDS wire-C_0_011f-2733_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2733_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2733_2-R_34_667m
+.ENDS wire90-2733_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2760_1-R_34_667m a b
+Ccap@0 gnd net@14 10.12f
+Ccap@1 gnd net@8 10.12f
+Ccap@2 gnd net@11 10.12f
+Rres@0 net@14 a 15.947
+Rres@1 net@11 net@14 31.894
+Rres@2 b net@8 15.947
+Rres@3 net@8 net@11 31.894
+.ENDS wire-C_0_011f-2760_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2760_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2760_1-R_34_667m
+.ENDS wire90-2760_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2778_7-R_34_667m a b
+Ccap@0 gnd net@14 10.189f
+Ccap@1 gnd net@8 10.189f
+Ccap@2 gnd net@11 10.189f
+Rres@0 net@14 a 16.055
+Rres@1 net@11 net@14 32.109
+Rres@2 b net@8 16.055
+Rres@3 net@8 net@11 32.109
+.ENDS wire-C_0_011f-2778_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2778_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2778_7-R_34_667m
+.ENDS wire90-2778_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3023_6-R_34_667m a b
+Ccap@0 gnd net@14 11.087f
+Ccap@1 gnd net@8 11.087f
+Ccap@2 gnd net@11 11.087f
+Rres@0 net@14 a 17.47
+Rres@1 net@11 net@14 34.939
+Rres@2 b net@8 17.47
+Rres@3 net@8 net@11 34.939
+.ENDS wire-C_0_011f-3023_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3023_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-3023_6-R_34_667m
+.ENDS wire90-3023_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3036_1-R_34_667m a b
+Ccap@0 gnd net@14 11.132f
+Ccap@1 gnd net@8 11.132f
+Ccap@2 gnd net@11 11.132f
+Rres@0 net@14 a 17.542
+Rres@1 net@11 net@14 35.084
+Rres@2 b net@8 17.542
+Rres@3 net@8 net@11 35.084
+.ENDS wire-C_0_011f-3036_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3036_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-3036_1-R_34_667m
+.ENDS wire90-3036_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3046_6-R_34_667m a b
+Ccap@0 gnd net@14 11.171f
+Ccap@1 gnd net@8 11.171f
+Ccap@2 gnd net@11 11.171f
+Rres@0 net@14 a 17.603
+Rres@1 net@11 net@14 35.205
+Rres@2 b net@8 17.603
+Rres@3 net@8 net@11 35.205
+.ENDS wire-C_0_011f-3046_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3046_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-3046_6-R_34_667m
+.ENDS wire90-3046_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3053_1-R_34_667m a b
+Ccap@0 gnd net@14 11.195f
+Ccap@1 gnd net@8 11.195f
+Ccap@2 gnd net@11 11.195f
+Rres@0 net@14 a 17.64
+Rres@1 net@11 net@14 35.28
+Rres@2 b net@8 17.64
+Rres@3 net@8 net@11 35.28
+.ENDS wire-C_0_011f-3053_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3053_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-3053_1-R_34_667m
+.ENDS wire90-3053_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3026-R_34_667m a b
+Ccap@0 gnd net@14 11.095f
+Ccap@1 gnd net@8 11.095f
+Ccap@2 gnd net@11 11.095f
+Rres@0 net@14 a 17.484
+Rres@1 net@11 net@14 34.967
+Rres@2 b net@8 17.484
+Rres@3 net@8 net@11 34.967
+.ENDS wire-C_0_011f-3026-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3026-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-3026-R_34_667m
+.ENDS wire90-3026-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3048_1-R_34_667m a b
+Ccap@0 gnd net@14 11.176f
+Ccap@1 gnd net@8 11.176f
+Ccap@2 gnd net@11 11.176f
+Rres@0 net@14 a 17.611
+Rres@1 net@11 net@14 35.222
+Rres@2 b net@8 17.611
+Rres@3 net@8 net@11 35.222
+.ENDS wire-C_0_011f-3048_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3048_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-3048_1-R_34_667m
+.ENDS wire90-3048_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3091_7-R_34_667m a b
+Ccap@0 gnd net@14 11.336f
+Ccap@1 gnd net@8 11.336f
+Ccap@2 gnd net@11 11.336f
+Rres@0 net@14 a 17.863
+Rres@1 net@11 net@14 35.726
+Rres@2 b net@8 17.863
+Rres@3 net@8 net@11 35.726
+.ENDS wire-C_0_011f-3091_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3091_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-3091_7-R_34_667m
+.ENDS wire90-3091_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3099_6-R_34_667m a b
+Ccap@0 gnd net@14 11.365f
+Ccap@1 gnd net@8 11.365f
+Ccap@2 gnd net@11 11.365f
+Rres@0 net@14 a 17.909
+Rres@1 net@11 net@14 35.818
+Rres@2 b net@8 17.909
+Rres@3 net@8 net@11 35.818
+.ENDS wire-C_0_011f-3099_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3099_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-3099_6-R_34_667m
+.ENDS wire90-3099_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3147_7-R_34_667m a b
+Ccap@0 gnd net@14 11.542f
+Ccap@1 gnd net@8 11.542f
+Ccap@2 gnd net@11 11.542f
+Rres@0 net@14 a 18.187
+Rres@1 net@11 net@14 36.373
+Rres@2 b net@8 18.187
+Rres@3 net@8 net@11 36.373
+.ENDS wire-C_0_011f-3147_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3147_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-3147_7-R_34_667m
+.ENDS wire90-3147_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3187_6-R_34_667m a b
+Ccap@0 gnd net@14 11.688f
+Ccap@1 gnd net@8 11.688f
+Ccap@2 gnd net@11 11.688f
+Rres@0 net@14 a 18.417
+Rres@1 net@11 net@14 36.834
+Rres@2 b net@8 18.417
+Rres@3 net@8 net@11 36.834
+.ENDS wire-C_0_011f-3187_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3187_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-3187_6-R_34_667m
+.ENDS wire90-3187_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3208_7-R_34_667m a b
+Ccap@0 gnd net@14 11.765f
+Ccap@1 gnd net@8 11.765f
+Ccap@2 gnd net@11 11.765f
+Rres@0 net@14 a 18.539
+Rres@1 net@11 net@14 37.078
+Rres@2 b net@8 18.539
+Rres@3 net@8 net@11 37.078
+.ENDS wire-C_0_011f-3208_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3208_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-3208_7-R_34_667m
+.ENDS wire90-3208_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3235_6-R_34_667m a b
+Ccap@0 gnd net@14 11.864f
+Ccap@1 gnd net@8 11.864f
+Ccap@2 gnd net@11 11.864f
+Rres@0 net@14 a 18.695
+Rres@1 net@11 net@14 37.389
+Rres@2 b net@8 18.695
+Rres@3 net@8 net@11 37.389
+.ENDS wire-C_0_011f-3235_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3235_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-3235_6-R_34_667m
+.ENDS wire90-3235_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3260_7-R_34_667m a b
+Ccap@0 gnd net@14 11.956f
+Ccap@1 gnd net@8 11.956f
+Ccap@2 gnd net@11 11.956f
+Rres@0 net@14 a 18.84
+Rres@1 net@11 net@14 37.679
+Rres@2 b net@8 18.84
+Rres@3 net@8 net@11 37.679
+.ENDS wire-C_0_011f-3260_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3260_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-3260_7-R_34_667m
+.ENDS wire90-3260_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3287_6-R_34_667m a b
+Ccap@0 gnd net@14 12.055f
+Ccap@1 gnd net@8 12.055f
+Ccap@2 gnd net@11 12.055f
+Rres@0 net@14 a 18.995
+Rres@1 net@11 net@14 37.99
+Rres@2 b net@8 18.995
+Rres@3 net@8 net@11 37.99
+.ENDS wire-C_0_011f-3287_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3287_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-3287_6-R_34_667m
+.ENDS wire90-3287_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3306_2-R_34_667m a b
+Ccap@0 gnd net@14 12.123f
+Ccap@1 gnd net@8 12.123f
+Ccap@2 gnd net@11 12.123f
+Rres@0 net@14 a 19.102
+Rres@1 net@11 net@14 38.205
+Rres@2 b net@8 19.102
+Rres@3 net@8 net@11 38.205
+.ENDS wire-C_0_011f-3306_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3306_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-3306_2-R_34_667m
+.ENDS wire90-3306_2-layer_1-width_3
+
+*** CELL: fifoL:splitStageDx4{sch}
+.SUBCKT splitStageDx4 clS[1][F] clS[1][T] clS[2][F] clS[2][T] cl[1][F] 
++cl[1][T] cl[2][F] cl[2][T] in[10] in[11] in[12] in[13] in[14] in[15] in[16] 
++in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] 
++in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] 
++in[3] in[4] in[5] in[6] in[7] in[8] in[9] mc[1] mc[2] out[10] out[11] out[12] 
++out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] out[20] 
++out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] out[29] 
++out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] out[3] out[4] 
++out[5] out[6] out[7] out[8] out[9] pred rd[1][F] rd[1][T] rd[2][F] rd[2][T] 
++sin[1] sin[2] sout[1] sout[2] succ
+XsplitSta@4 clS[1][F] clS[1][T] cl[1][F] cl[1][T] in[10] in[11] in[12] in[13] 
++in[14] in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] 
++in[24] in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] 
++in[34] in[35] in[36] in[3] in[4] in[5] in[6] in[7] in[8] in[9] mc[1] xx[10] 
++xx[11] xx[12] xx[13] xx[14] xx[15] xx[16] xx[17] xx[18] xx[19] xx[1] xx[20] 
++xx[21] xx[22] xx[23] xx[24] xx[25] xx[26] xx[27] xx[28] xx[29] xx[2] xx[30] 
++xx[31] xx[32] xx[33] xx[34] xx[35] xx[36] xx[3] xx[4] xx[5] xx[6] xx[7] xx[8] 
++xx[9] pred rd[1][F] rd[1][T] sin[1] sout[1] net@255 splitStageDx2
+XsplitSta@5 clS[2][F] clS[2][T] cl[2][F] cl[2][T] xx[10] xx[11] xx[12] xx[13] 
++xx[14] xx[15] xx[16] xx[17] xx[18] xx[19] xx[1] xx[20] xx[21] xx[22] xx[23] 
++xx[24] xx[25] xx[26] xx[27] xx[28] xx[29] xx[2] xx[30] xx[31] xx[32] xx[33] 
++xx[34] xx[35] xx[36] xx[3] xx[4] xx[5] xx[6] xx[7] xx[8] xx[9] mc[2] out[10] 
++out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] 
++out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] 
++out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] 
++out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9] net@258 rd[2][F] 
++rd[2][T] sin[2] sout[2] succ splitStageDx2
+Xwire90@3 net@255 net@258 wire90-2777_3-layer_1-width_3
+Xwire90@4 xx[1] wire90@4_b wire90-2581_1-layer_1-width_3
+Xwire90@5 xx[2] wire90@5_b wire90-2599_6-layer_1-width_3
+Xwire90@6 xx[3] wire90@6_b wire90-2611_1-layer_1-width_3
+Xwire90@7 xx[4] wire90@7_b wire90-2654_1-layer_1-width_3
+Xwire90@8 xx[5] wire90@8_b wire90-2637_1-layer_1-width_3
+Xwire90@9 xx[6] wire90@9_b wire90-2690_6-layer_1-width_3
+Xwire90@10 xx[7] wire90@10_b wire90-2675_5-layer_1-width_3
+Xwire90@11 xx[8] wire90@11_b wire90-2737_6-layer_1-width_3
+Xwire90@12 xx[9] wire90@12_b wire90-2725_1-layer_1-width_3
+Xwire90@13 xx[10] wire90@13_b wire90-2582_2-layer_1-width_3
+Xwire90@14 xx[11] wire90@14_b wire90-2584_1-layer_1-width_3
+Xwire90@15 xx[12] wire90@15_b wire90-2620_2-layer_1-width_3
+Xwire90@16 xx[13] wire90@16_b wire90-2660_1-layer_1-width_3
+Xwire90@17 xx[14] wire90@17_b wire90-2681_2-layer_1-width_3
+Xwire90@18 xx[15] wire90@18_b wire90-2708_1-layer_1-width_3
+Xwire90@19 xx[16] wire90@19_b wire90-2733_2-layer_1-width_3
+Xwire90@20 xx[17] wire90@20_b wire90-2760_1-layer_1-width_3
+Xwire90@21 xx[18] wire90@21_b wire90-2778_7-layer_1-width_3
+Xwire90@22 xx[19] wire90@22_b wire90-3023_6-layer_1-width_3
+Xwire90@23 xx[20] wire90@23_b wire90-3036_1-layer_1-width_3
+Xwire90@24 xx[21] wire90@24_b wire90-3023_6-layer_1-width_3
+Xwire90@25 xx[22] wire90@25_b wire90-3046_6-layer_1-width_3
+Xwire90@26 xx[23] wire90@26_b wire90-3023_6-layer_1-width_3
+Xwire90@27 xx[24] wire90@27_b wire90-3053_1-layer_1-width_3
+Xwire90@28 xx[25] wire90@28_b wire90-3026-layer_1-width_3
+Xwire90@29 xx[26] wire90@29_b wire90-3048_1-layer_1-width_3
+Xwire90@30 xx[27] wire90@30_b wire90-3023_6-layer_1-width_3
+Xwire90@31 xx[28] wire90@31_b wire90-3091_7-layer_1-width_3
+Xwire90@32 xx[29] wire90@32_b wire90-3099_6-layer_1-width_3
+Xwire90@33 xx[30] wire90@33_b wire90-3147_7-layer_1-width_3
+Xwire90@34 xx[31] wire90@34_b wire90-3187_6-layer_1-width_3
+Xwire90@35 xx[32] wire90@35_b wire90-3208_7-layer_1-width_3
+Xwire90@36 xx[33] wire90@36_b wire90-3235_6-layer_1-width_3
+Xwire90@37 xx[34] wire90@37_b wire90-3260_7-layer_1-width_3
+Xwire90@38 xx[35] wire90@38_b wire90-3287_6-layer_1-width_3
+Xwire90@39 xx[36] wire90@39_b wire90-3306_2-layer_1-width_3
+.ENDS splitStageDx4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1085-R_34_667m a b
+Ccap@0 gnd net@14 3.978f
+Ccap@1 gnd net@8 3.978f
+Ccap@2 gnd net@11 3.978f
+Rres@0 net@14 a 6.269
+Rres@1 net@11 net@14 12.538
+Rres@2 b net@8 6.269
+Rres@3 net@8 net@11 12.538
+.ENDS wire-C_0_011f-1085-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1085-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1085-R_34_667m
+.ENDS wire90-1085-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2816_7-R_34_667m a b
+Ccap@0 gnd net@14 10.328f
+Ccap@1 gnd net@8 10.328f
+Ccap@2 gnd net@11 10.328f
+Rres@0 net@14 a 16.274
+Rres@1 net@11 net@14 32.549
+Rres@2 b net@8 16.274
+Rres@3 net@8 net@11 32.549
+.ENDS wire-C_0_011f-2816_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2816_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2816_7-R_34_667m
+.ENDS wire90-2816_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1847-R_34_667m a b
+Ccap@0 gnd net@14 6.772f
+Ccap@1 gnd net@8 6.772f
+Ccap@2 gnd net@11 6.772f
+Rres@0 net@14 a 10.672
+Rres@1 net@11 net@14 21.343
+Rres@2 b net@8 10.672
+Rres@3 net@8 net@11 21.343
+.ENDS wire-C_0_011f-1847-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1847-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1847-R_34_667m
+.ENDS wire90-1847-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1161-R_34_667m a b
+Ccap@0 gnd net@14 4.257f
+Ccap@1 gnd net@8 4.257f
+Ccap@2 gnd net@11 4.257f
+Rres@0 net@14 a 6.708
+Rres@1 net@11 net@14 13.416
+Rres@2 b net@8 6.708
+Rres@3 net@8 net@11 13.416
+.ENDS wire-C_0_011f-1161-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1161-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1161-R_34_667m
+.ENDS wire90-1161-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-941-R_34_667m a b
+Ccap@0 gnd net@14 3.45f
+Ccap@1 gnd net@8 3.45f
+Ccap@2 gnd net@11 3.45f
+Rres@0 net@14 a 5.437
+Rres@1 net@11 net@14 10.874
+Rres@2 b net@8 5.437
+Rres@3 net@8 net@11 10.874
+.ENDS wire-C_0_011f-941-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-941-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-941-R_34_667m
+.ENDS wire90-941-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-992_5-R_34_667m a b
+Ccap@0 gnd net@14 3.639f
+Ccap@1 gnd net@8 3.639f
+Ccap@2 gnd net@11 3.639f
+Rres@0 net@14 a 5.734
+Rres@1 net@11 net@14 11.469
+Rres@2 b net@8 5.734
+Rres@3 net@8 net@11 11.469
+.ENDS wire-C_0_011f-992_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-992_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-992_5-R_34_667m
+.ENDS wire90-992_5-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-924_4-R_34_667m a b
+Ccap@0 gnd net@14 3.389f
+Ccap@1 gnd net@8 3.389f
+Ccap@2 gnd net@11 3.389f
+Rres@0 net@14 a 5.341
+Rres@1 net@11 net@14 10.682
+Rres@2 b net@8 5.341
+Rres@3 net@8 net@11 10.682
+.ENDS wire-C_0_011f-924_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-924_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-924_4-R_34_667m
+.ENDS wire90-924_4-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1463_4-R_34_667m a b
+Ccap@0 gnd net@14 5.366f
+Ccap@1 gnd net@8 5.366f
+Ccap@2 gnd net@11 5.366f
+Rres@0 net@14 a 8.455
+Rres@1 net@11 net@14 16.91
+Rres@2 b net@8 8.455
+Rres@3 net@8 net@11 16.91
+.ENDS wire-C_0_011f-1463_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1463_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1463_4-R_34_667m
+.ENDS wire90-1463_4-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1346_1-R_34_667m a b
+Ccap@0 gnd net@14 4.936f
+Ccap@1 gnd net@8 4.936f
+Ccap@2 gnd net@11 4.936f
+Rres@0 net@14 a 7.777
+Rres@1 net@11 net@14 15.555
+Rres@2 b net@8 7.777
+Rres@3 net@8 net@11 15.555
+.ENDS wire-C_0_011f-1346_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1346_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1346_1-R_34_667m
+.ENDS wire90-1346_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1337_6-R_34_667m a b
+Ccap@0 gnd net@14 4.905f
+Ccap@1 gnd net@8 4.905f
+Ccap@2 gnd net@11 4.905f
+Rres@0 net@14 a 7.728
+Rres@1 net@11 net@14 15.457
+Rres@2 b net@8 7.728
+Rres@3 net@8 net@11 15.457
+.ENDS wire-C_0_011f-1337_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1337_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1337_6-R_34_667m
+.ENDS wire90-1337_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1339_1-R_34_667m a b
+Ccap@0 gnd net@14 4.91f
+Ccap@1 gnd net@8 4.91f
+Ccap@2 gnd net@11 4.91f
+Rres@0 net@14 a 7.737
+Rres@1 net@11 net@14 15.474
+Rres@2 b net@8 7.737
+Rres@3 net@8 net@11 15.474
+.ENDS wire-C_0_011f-1339_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1339_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1339_1-R_34_667m
+.ENDS wire90-1339_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1356_6-R_34_667m a b
+Ccap@0 gnd net@14 4.974f
+Ccap@1 gnd net@8 4.974f
+Ccap@2 gnd net@11 4.974f
+Rres@0 net@14 a 7.838
+Rres@1 net@11 net@14 15.676
+Rres@2 b net@8 7.838
+Rres@3 net@8 net@11 15.676
+.ENDS wire-C_0_011f-1356_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1356_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1356_6-R_34_667m
+.ENDS wire90-1356_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1341_1-R_34_667m a b
+Ccap@0 gnd net@14 4.917f
+Ccap@1 gnd net@8 4.917f
+Ccap@2 gnd net@11 4.917f
+Rres@0 net@14 a 7.749
+Rres@1 net@11 net@14 15.497
+Rres@2 b net@8 7.749
+Rres@3 net@8 net@11 15.497
+.ENDS wire-C_0_011f-1341_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1341_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1341_1-R_34_667m
+.ENDS wire90-1341_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1345_1-R_34_667m a b
+Ccap@0 gnd net@14 4.932f
+Ccap@1 gnd net@8 4.932f
+Ccap@2 gnd net@11 4.932f
+Rres@0 net@14 a 7.772
+Rres@1 net@11 net@14 15.543
+Rres@2 b net@8 7.772
+Rres@3 net@8 net@11 15.543
+.ENDS wire-C_0_011f-1345_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1345_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1345_1-R_34_667m
+.ENDS wire90-1345_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1361_4-R_34_667m a b
+Ccap@0 gnd net@14 4.992f
+Ccap@1 gnd net@8 4.992f
+Ccap@2 gnd net@11 4.992f
+Rres@0 net@14 a 7.866
+Rres@1 net@11 net@14 15.732
+Rres@2 b net@8 7.866
+Rres@3 net@8 net@11 15.732
+.ENDS wire-C_0_011f-1361_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1361_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1361_4-R_34_667m
+.ENDS wire90-1361_4-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1342_1-R_34_667m a b
+Ccap@0 gnd net@14 4.921f
+Ccap@1 gnd net@8 4.921f
+Ccap@2 gnd net@11 4.921f
+Rres@0 net@14 a 7.754
+Rres@1 net@11 net@14 15.509
+Rres@2 b net@8 7.754
+Rres@3 net@8 net@11 15.509
+.ENDS wire-C_0_011f-1342_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1342_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1342_1-R_34_667m
+.ENDS wire90-1342_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1349_6-R_34_667m a b
+Ccap@0 gnd net@14 4.949f
+Ccap@1 gnd net@8 4.949f
+Ccap@2 gnd net@11 4.949f
+Rres@0 net@14 a 7.798
+Rres@1 net@11 net@14 15.595
+Rres@2 b net@8 7.798
+Rres@3 net@8 net@11 15.595
+.ENDS wire-C_0_011f-1349_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1349_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1349_6-R_34_667m
+.ENDS wire90-1349_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1345_8-R_34_667m a b
+Ccap@0 gnd net@14 4.935f
+Ccap@1 gnd net@8 4.935f
+Ccap@2 gnd net@11 4.935f
+Rres@0 net@14 a 7.776
+Rres@1 net@11 net@14 15.551
+Rres@2 b net@8 7.776
+Rres@3 net@8 net@11 15.551
+.ENDS wire-C_0_011f-1345_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1345_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1345_8-R_34_667m
+.ENDS wire90-1345_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1346_7-R_34_667m a b
+Ccap@0 gnd net@14 4.938f
+Ccap@1 gnd net@8 4.938f
+Ccap@2 gnd net@11 4.938f
+Rres@0 net@14 a 7.781
+Rres@1 net@11 net@14 15.562
+Rres@2 b net@8 7.781
+Rres@3 net@8 net@11 15.562
+.ENDS wire-C_0_011f-1346_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1346_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1346_7-R_34_667m
+.ENDS wire90-1346_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1330_8-R_34_667m a b
+Ccap@0 gnd net@14 4.88f
+Ccap@1 gnd net@8 4.88f
+Ccap@2 gnd net@11 4.88f
+Rres@0 net@14 a 7.689
+Rres@1 net@11 net@14 15.378
+Rres@2 b net@8 7.689
+Rres@3 net@8 net@11 15.378
+.ENDS wire-C_0_011f-1330_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1330_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1330_8-R_34_667m
+.ENDS wire90-1330_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1339_7-R_34_667m a b
+Ccap@0 gnd net@14 4.912f
+Ccap@1 gnd net@8 4.912f
+Ccap@2 gnd net@11 4.912f
+Rres@0 net@14 a 7.74
+Rres@1 net@11 net@14 15.481
+Rres@2 b net@8 7.74
+Rres@3 net@8 net@11 15.481
+.ENDS wire-C_0_011f-1339_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1339_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1339_7-R_34_667m
+.ENDS wire90-1339_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1353_3-R_34_667m a b
+Ccap@0 gnd net@14 4.962f
+Ccap@1 gnd net@8 4.962f
+Ccap@2 gnd net@11 4.962f
+Rres@0 net@14 a 7.819
+Rres@1 net@11 net@14 15.638
+Rres@2 b net@8 7.819
+Rres@3 net@8 net@11 15.638
+.ENDS wire-C_0_011f-1353_3-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1353_3-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1353_3-R_34_667m
+.ENDS wire90-1353_3-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1355_2-R_34_667m a b
+Ccap@0 gnd net@14 4.969f
+Ccap@1 gnd net@8 4.969f
+Ccap@2 gnd net@11 4.969f
+Rres@0 net@14 a 7.83
+Rres@1 net@11 net@14 15.66
+Rres@2 b net@8 7.83
+Rres@3 net@8 net@11 15.66
+.ENDS wire-C_0_011f-1355_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1355_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1355_2-R_34_667m
+.ENDS wire90-1355_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1359_3-R_34_667m a b
+Ccap@0 gnd net@14 4.984f
+Ccap@1 gnd net@8 4.984f
+Ccap@2 gnd net@11 4.984f
+Rres@0 net@14 a 7.854
+Rres@1 net@11 net@14 15.707
+Rres@2 b net@8 7.854
+Rres@3 net@8 net@11 15.707
+.ENDS wire-C_0_011f-1359_3-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1359_3-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1359_3-R_34_667m
+.ENDS wire90-1359_3-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1357_2-R_34_667m a b
+Ccap@0 gnd net@14 4.976f
+Ccap@1 gnd net@8 4.976f
+Ccap@2 gnd net@11 4.976f
+Rres@0 net@14 a 7.842
+Rres@1 net@11 net@14 15.683
+Rres@2 b net@8 7.842
+Rres@3 net@8 net@11 15.683
+.ENDS wire-C_0_011f-1357_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1357_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1357_2-R_34_667m
+.ENDS wire90-1357_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1356_1-R_34_667m a b
+Ccap@0 gnd net@14 4.972f
+Ccap@1 gnd net@8 4.972f
+Ccap@2 gnd net@11 4.972f
+Rres@0 net@14 a 7.835
+Rres@1 net@11 net@14 15.67
+Rres@2 b net@8 7.835
+Rres@3 net@8 net@11 15.67
+.ENDS wire-C_0_011f-1356_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1356_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1356_1-R_34_667m
+.ENDS wire90-1356_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1379_1-R_34_667m a b
+Ccap@0 gnd net@14 5.057f
+Ccap@1 gnd net@8 5.057f
+Ccap@2 gnd net@11 5.057f
+Rres@0 net@14 a 7.968
+Rres@1 net@11 net@14 15.936
+Rres@2 b net@8 7.968
+Rres@3 net@8 net@11 15.936
+.ENDS wire-C_0_011f-1379_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1379_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1379_1-R_34_667m
+.ENDS wire90-1379_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1351_6-R_34_667m a b
+Ccap@0 gnd net@14 4.956f
+Ccap@1 gnd net@8 4.956f
+Ccap@2 gnd net@11 4.956f
+Rres@0 net@14 a 7.809
+Rres@1 net@11 net@14 15.618
+Rres@2 b net@8 7.809
+Rres@3 net@8 net@11 15.618
+.ENDS wire-C_0_011f-1351_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1351_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1351_6-R_34_667m
+.ENDS wire90-1351_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1376_6-R_34_667m a b
+Ccap@0 gnd net@14 5.048f
+Ccap@1 gnd net@8 5.048f
+Ccap@2 gnd net@11 5.048f
+Rres@0 net@14 a 7.954
+Rres@1 net@11 net@14 15.907
+Rres@2 b net@8 7.954
+Rres@3 net@8 net@11 15.907
+.ENDS wire-C_0_011f-1376_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1376_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1376_6-R_34_667m
+.ENDS wire90-1376_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1372_4-R_34_667m a b
+Ccap@0 gnd net@14 5.032f
+Ccap@1 gnd net@8 5.032f
+Ccap@2 gnd net@11 5.032f
+Rres@0 net@14 a 7.929
+Rres@1 net@11 net@14 15.859
+Rres@2 b net@8 7.929
+Rres@3 net@8 net@11 15.859
+.ENDS wire-C_0_011f-1372_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1372_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1372_4-R_34_667m
+.ENDS wire90-1372_4-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1373_6-R_34_667m a b
+Ccap@0 gnd net@14 5.037f
+Ccap@1 gnd net@8 5.037f
+Ccap@2 gnd net@11 5.037f
+Rres@0 net@14 a 7.936
+Rres@1 net@11 net@14 15.873
+Rres@2 b net@8 7.936
+Rres@3 net@8 net@11 15.873
+.ENDS wire-C_0_011f-1373_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1373_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1373_6-R_34_667m
+.ENDS wire90-1373_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1360_1-R_34_667m a b
+Ccap@0 gnd net@14 4.987f
+Ccap@1 gnd net@8 4.987f
+Ccap@2 gnd net@11 4.987f
+Rres@0 net@14 a 7.858
+Rres@1 net@11 net@14 15.717
+Rres@2 b net@8 7.858
+Rres@3 net@8 net@11 15.717
+.ENDS wire-C_0_011f-1360_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1360_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1360_1-R_34_667m
+.ENDS wire90-1360_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1323_3-R_34_667m a b
+Ccap@0 gnd net@14 4.852f
+Ccap@1 gnd net@8 4.852f
+Ccap@2 gnd net@11 4.852f
+Rres@0 net@14 a 7.646
+Rres@1 net@11 net@14 15.291
+Rres@2 b net@8 7.646
+Rres@3 net@8 net@11 15.291
+.ENDS wire-C_0_011f-1323_3-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1323_3-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1323_3-R_34_667m
+.ENDS wire90-1323_3-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1330_3-R_34_667m a b
+Ccap@0 gnd net@14 4.878f
+Ccap@1 gnd net@8 4.878f
+Ccap@2 gnd net@11 4.878f
+Rres@0 net@14 a 7.686
+Rres@1 net@11 net@14 15.372
+Rres@2 b net@8 7.686
+Rres@3 net@8 net@11 15.372
+.ENDS wire-C_0_011f-1330_3-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1330_3-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1330_3-R_34_667m
+.ENDS wire90-1330_3-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1329_2-R_34_667m a b
+Ccap@0 gnd net@14 4.874f
+Ccap@1 gnd net@8 4.874f
+Ccap@2 gnd net@11 4.874f
+Rres@0 net@14 a 7.68
+Rres@1 net@11 net@14 15.36
+Rres@2 b net@8 7.68
+Rres@3 net@8 net@11 15.36
+.ENDS wire-C_0_011f-1329_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1329_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1329_2-R_34_667m
+.ENDS wire90-1329_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1325_8-R_34_667m a b
+Ccap@0 gnd net@14 4.861f
+Ccap@1 gnd net@8 4.861f
+Ccap@2 gnd net@11 4.861f
+Rres@0 net@14 a 7.66
+Rres@1 net@11 net@14 15.32
+Rres@2 b net@8 7.66
+Rres@3 net@8 net@11 15.32
+.ENDS wire-C_0_011f-1325_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1325_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1325_8-R_34_667m
+.ENDS wire90-1325_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1344_7-R_34_667m a b
+Ccap@0 gnd net@14 4.931f
+Ccap@1 gnd net@8 4.931f
+Ccap@2 gnd net@11 4.931f
+Rres@0 net@14 a 7.769
+Rres@1 net@11 net@14 15.539
+Rres@2 b net@8 7.769
+Rres@3 net@8 net@11 15.539
+.ENDS wire-C_0_011f-1344_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1344_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1344_7-R_34_667m
+.ENDS wire90-1344_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1327_8-R_34_667m a b
+Ccap@0 gnd net@14 4.869f
+Ccap@1 gnd net@8 4.869f
+Ccap@2 gnd net@11 4.869f
+Rres@0 net@14 a 7.672
+Rres@1 net@11 net@14 15.343
+Rres@2 b net@8 7.672
+Rres@3 net@8 net@11 15.343
+.ENDS wire-C_0_011f-1327_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1327_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1327_8-R_34_667m
+.ENDS wire90-1327_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1321_8-R_34_667m a b
+Ccap@0 gnd net@14 4.847f
+Ccap@1 gnd net@8 4.847f
+Ccap@2 gnd net@11 4.847f
+Rres@0 net@14 a 7.637
+Rres@1 net@11 net@14 15.274
+Rres@2 b net@8 7.637
+Rres@3 net@8 net@11 15.274
+.ENDS wire-C_0_011f-1321_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1321_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1321_8-R_34_667m
+.ENDS wire90-1321_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-638-R_34_667m a b
+Ccap@0 gnd net@14 2.339f
+Ccap@1 gnd net@8 2.339f
+Ccap@2 gnd net@11 2.339f
+Rres@0 net@14 a 3.686
+Rres@1 net@11 net@14 7.372
+Rres@2 b net@8 3.686
+Rres@3 net@8 net@11 7.372
+.ENDS wire-C_0_011f-638-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-638-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-638-R_34_667m
+.ENDS wire90-638-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-641-R_34_667m a b
+Ccap@0 gnd net@14 2.35f
+Ccap@1 gnd net@8 2.35f
+Ccap@2 gnd net@11 2.35f
+Rres@0 net@14 a 3.704
+Rres@1 net@11 net@14 7.407
+Rres@2 b net@8 3.704
+Rres@3 net@8 net@11 7.407
+.ENDS wire-C_0_011f-641-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-641-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-641-R_34_667m
+.ENDS wire90-641-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-644-R_34_667m a b
+Ccap@0 gnd net@14 2.361f
+Ccap@1 gnd net@8 2.361f
+Ccap@2 gnd net@11 2.361f
+Rres@0 net@14 a 3.721
+Rres@1 net@11 net@14 7.442
+Rres@2 b net@8 3.721
+Rres@3 net@8 net@11 7.442
+.ENDS wire-C_0_011f-644-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-644-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-644-R_34_667m
+.ENDS wire90-644-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-635-R_34_667m a b
+Ccap@0 gnd net@14 2.328f
+Ccap@1 gnd net@8 2.328f
+Ccap@2 gnd net@11 2.328f
+Rres@0 net@14 a 3.669
+Rres@1 net@11 net@14 7.338
+Rres@2 b net@8 3.669
+Rres@3 net@8 net@11 7.338
+.ENDS wire-C_0_011f-635-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-635-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-635-R_34_667m
+.ENDS wire90-635-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-666-R_34_667m a b
+Ccap@0 gnd net@14 2.442f
+Ccap@1 gnd net@8 2.442f
+Ccap@2 gnd net@11 2.442f
+Rres@0 net@14 a 3.848
+Rres@1 net@11 net@14 7.696
+Rres@2 b net@8 3.848
+Rres@3 net@8 net@11 7.696
+.ENDS wire-C_0_011f-666-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-666-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-666-R_34_667m
+.ENDS wire90-666-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-633_5-R_34_667m a b
+Ccap@0 gnd net@14 2.323f
+Ccap@1 gnd net@8 2.323f
+Ccap@2 gnd net@11 2.323f
+Rres@0 net@14 a 3.66
+Rres@1 net@11 net@14 7.32
+Rres@2 b net@8 3.66
+Rres@3 net@8 net@11 7.32
+.ENDS wire-C_0_011f-633_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-633_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-633_5-R_34_667m
+.ENDS wire90-633_5-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-655-R_34_667m a b
+Ccap@0 gnd net@14 2.402f
+Ccap@1 gnd net@8 2.402f
+Ccap@2 gnd net@11 2.402f
+Rres@0 net@14 a 3.784
+Rres@1 net@11 net@14 7.569
+Rres@2 b net@8 3.784
+Rres@3 net@8 net@11 7.569
+.ENDS wire-C_0_011f-655-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-655-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-655-R_34_667m
+.ENDS wire90-655-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-636_5-R_34_667m a b
+Ccap@0 gnd net@14 2.334f
+Ccap@1 gnd net@8 2.334f
+Ccap@2 gnd net@11 2.334f
+Rres@0 net@14 a 3.678
+Rres@1 net@11 net@14 7.355
+Rres@2 b net@8 3.678
+Rres@3 net@8 net@11 7.355
+.ENDS wire-C_0_011f-636_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-636_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-636_5-R_34_667m
+.ENDS wire90-636_5-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-594_5-R_34_667m a b
+Ccap@0 gnd net@14 2.18f
+Ccap@1 gnd net@8 2.18f
+Ccap@2 gnd net@11 2.18f
+Rres@0 net@14 a 3.435
+Rres@1 net@11 net@14 6.87
+Rres@2 b net@8 3.435
+Rres@3 net@8 net@11 6.87
+.ENDS wire-C_0_011f-594_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-594_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-594_5-R_34_667m
+.ENDS wire90-594_5-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-599_4-R_34_667m a b
+Ccap@0 gnd net@14 2.198f
+Ccap@1 gnd net@8 2.198f
+Ccap@2 gnd net@11 2.198f
+Rres@0 net@14 a 3.463
+Rres@1 net@11 net@14 6.926
+Rres@2 b net@8 3.463
+Rres@3 net@8 net@11 6.926
+.ENDS wire-C_0_011f-599_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-599_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-599_4-R_34_667m
+.ENDS wire90-599_4-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-590_5-R_34_667m a b
+Ccap@0 gnd net@14 2.165f
+Ccap@1 gnd net@8 2.165f
+Ccap@2 gnd net@11 2.165f
+Rres@0 net@14 a 3.412
+Rres@1 net@11 net@14 6.824
+Rres@2 b net@8 3.412
+Rres@3 net@8 net@11 6.824
+.ENDS wire-C_0_011f-590_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-590_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-590_5-R_34_667m
+.ENDS wire90-590_5-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-601_6-R_34_667m a b
+Ccap@0 gnd net@14 2.206f
+Ccap@1 gnd net@8 2.206f
+Ccap@2 gnd net@11 2.206f
+Rres@0 net@14 a 3.476
+Rres@1 net@11 net@14 6.952
+Rres@2 b net@8 3.476
+Rres@3 net@8 net@11 6.952
+.ENDS wire-C_0_011f-601_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-601_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-601_6-R_34_667m
+.ENDS wire90-601_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-605-R_34_667m a b
+Ccap@0 gnd net@14 2.218f
+Ccap@1 gnd net@8 2.218f
+Ccap@2 gnd net@11 2.218f
+Rres@0 net@14 a 3.496
+Rres@1 net@11 net@14 6.991
+Rres@2 b net@8 3.496
+Rres@3 net@8 net@11 6.991
+.ENDS wire-C_0_011f-605-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-605-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-605-R_34_667m
+.ENDS wire90-605-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-594_9-R_34_667m a b
+Ccap@0 gnd net@14 2.181f
+Ccap@1 gnd net@8 2.181f
+Ccap@2 gnd net@11 2.181f
+Rres@0 net@14 a 3.437
+Rres@1 net@11 net@14 6.874
+Rres@2 b net@8 3.437
+Rres@3 net@8 net@11 6.874
+.ENDS wire-C_0_011f-594_9-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-594_9-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-594_9-R_34_667m
+.ENDS wire90-594_9-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-600-R_34_667m a b
+Ccap@0 gnd net@14 2.2f
+Ccap@1 gnd net@8 2.2f
+Ccap@2 gnd net@11 2.2f
+Rres@0 net@14 a 3.467
+Rres@1 net@11 net@14 6.933
+Rres@2 b net@8 3.467
+Rres@3 net@8 net@11 6.933
+.ENDS wire-C_0_011f-600-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-600-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-600-R_34_667m
+.ENDS wire90-600-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-639_5-R_34_667m a b
+Ccap@0 gnd net@14 2.345f
+Ccap@1 gnd net@8 2.345f
+Ccap@2 gnd net@11 2.345f
+Rres@0 net@14 a 3.695
+Rres@1 net@11 net@14 7.39
+Rres@2 b net@8 3.695
+Rres@3 net@8 net@11 7.39
+.ENDS wire-C_0_011f-639_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-639_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-639_5-R_34_667m
+.ENDS wire90-639_5-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-655_5-R_34_667m a b
+Ccap@0 gnd net@14 2.403f
+Ccap@1 gnd net@8 2.403f
+Ccap@2 gnd net@11 2.403f
+Rres@0 net@14 a 3.787
+Rres@1 net@11 net@14 7.575
+Rres@2 b net@8 3.787
+Rres@3 net@8 net@11 7.575
+.ENDS wire-C_0_011f-655_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-655_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-655_5-R_34_667m
+.ENDS wire90-655_5-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-632-R_34_667m a b
+Ccap@0 gnd net@14 2.317f
+Ccap@1 gnd net@8 2.317f
+Ccap@2 gnd net@11 2.317f
+Rres@0 net@14 a 3.652
+Rres@1 net@11 net@14 7.303
+Rres@2 b net@8 3.652
+Rres@3 net@8 net@11 7.303
+.ENDS wire-C_0_011f-632-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-632-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-632-R_34_667m
+.ENDS wire90-632-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-645-R_34_667m a b
+Ccap@0 gnd net@14 2.365f
+Ccap@1 gnd net@8 2.365f
+Ccap@2 gnd net@11 2.365f
+Rres@0 net@14 a 3.727
+Rres@1 net@11 net@14 7.453
+Rres@2 b net@8 3.727
+Rres@3 net@8 net@11 7.453
+.ENDS wire-C_0_011f-645-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-645-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-645-R_34_667m
+.ENDS wire90-645-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-600_5-R_34_667m a b
+Ccap@0 gnd net@14 2.202f
+Ccap@1 gnd net@8 2.202f
+Ccap@2 gnd net@11 2.202f
+Rres@0 net@14 a 3.47
+Rres@1 net@11 net@14 6.939
+Rres@2 b net@8 3.47
+Rres@3 net@8 net@11 6.939
+.ENDS wire-C_0_011f-600_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-600_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-600_5-R_34_667m
+.ENDS wire90-600_5-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-596_4-R_34_667m a b
+Ccap@0 gnd net@14 2.187f
+Ccap@1 gnd net@8 2.187f
+Ccap@2 gnd net@11 2.187f
+Rres@0 net@14 a 3.446
+Rres@1 net@11 net@14 6.892
+Rres@2 b net@8 3.446
+Rres@3 net@8 net@11 6.892
+.ENDS wire-C_0_011f-596_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-596_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-596_4-R_34_667m
+.ENDS wire90-596_4-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-595-R_34_667m a b
+Ccap@0 gnd net@14 2.182f
+Ccap@1 gnd net@8 2.182f
+Ccap@2 gnd net@11 2.182f
+Rres@0 net@14 a 3.438
+Rres@1 net@11 net@14 6.876
+Rres@2 b net@8 3.438
+Rres@3 net@8 net@11 6.876
+.ENDS wire-C_0_011f-595-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-595-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-595-R_34_667m
+.ENDS wire90-595-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-613-R_34_667m a b
+Ccap@0 gnd net@14 2.248f
+Ccap@1 gnd net@8 2.248f
+Ccap@2 gnd net@11 2.248f
+Rres@0 net@14 a 3.542
+Rres@1 net@11 net@14 7.084
+Rres@2 b net@8 3.542
+Rres@3 net@8 net@11 7.084
+.ENDS wire-C_0_011f-613-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-613-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-613-R_34_667m
+.ENDS wire90-613-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-598_6-R_34_667m a b
+Ccap@0 gnd net@14 2.195f
+Ccap@1 gnd net@8 2.195f
+Ccap@2 gnd net@11 2.195f
+Rres@0 net@14 a 3.459
+Rres@1 net@11 net@14 6.917
+Rres@2 b net@8 3.459
+Rres@3 net@8 net@11 6.917
+.ENDS wire-C_0_011f-598_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-598_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-598_6-R_34_667m
+.ENDS wire90-598_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-611-R_34_667m a b
+Ccap@0 gnd net@14 2.24f
+Ccap@1 gnd net@8 2.24f
+Ccap@2 gnd net@11 2.24f
+Rres@0 net@14 a 3.53
+Rres@1 net@11 net@14 7.06
+Rres@2 b net@8 3.53
+Rres@3 net@8 net@11 7.06
+.ENDS wire-C_0_011f-611-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-611-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-611-R_34_667m
+.ENDS wire90-611-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-591_9-R_34_667m a b
+Ccap@0 gnd net@14 2.17f
+Ccap@1 gnd net@8 2.17f
+Ccap@2 gnd net@11 2.17f
+Rres@0 net@14 a 3.42
+Rres@1 net@11 net@14 6.84
+Rres@2 b net@8 3.42
+Rres@3 net@8 net@11 6.84
+.ENDS wire-C_0_011f-591_9-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-591_9-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-591_9-R_34_667m
+.ENDS wire90-591_9-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-606-R_34_667m a b
+Ccap@0 gnd net@14 2.222f
+Ccap@1 gnd net@8 2.222f
+Ccap@2 gnd net@11 2.222f
+Rres@0 net@14 a 3.501
+Rres@1 net@11 net@14 7.003
+Rres@2 b net@8 3.501
+Rres@3 net@8 net@11 7.003
+.ENDS wire-C_0_011f-606-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-606-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-606-R_34_667m
+.ENDS wire90-606-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1186_7-R_34_667m a b
+Ccap@0 gnd net@14 4.351f
+Ccap@1 gnd net@8 4.351f
+Ccap@2 gnd net@11 4.351f
+Rres@0 net@14 a 6.856
+Rres@1 net@11 net@14 13.713
+Rres@2 b net@8 6.856
+Rres@3 net@8 net@11 13.713
+.ENDS wire-C_0_011f-1186_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1186_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1186_7-R_34_667m
+.ENDS wire90-1186_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1241_2-R_34_667m a b
+Ccap@0 gnd net@14 4.551f
+Ccap@1 gnd net@8 4.551f
+Ccap@2 gnd net@11 4.551f
+Rres@0 net@14 a 7.171
+Rres@1 net@11 net@14 14.343
+Rres@2 b net@8 7.171
+Rres@3 net@8 net@11 14.343
+.ENDS wire-C_0_011f-1241_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1241_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1241_2-R_34_667m
+.ENDS wire90-1241_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1192_7-R_34_667m a b
+Ccap@0 gnd net@14 4.373f
+Ccap@1 gnd net@8 4.373f
+Ccap@2 gnd net@11 4.373f
+Rres@0 net@14 a 6.891
+Rres@1 net@11 net@14 13.782
+Rres@2 b net@8 6.891
+Rres@3 net@8 net@11 13.782
+.ENDS wire-C_0_011f-1192_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1192_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1192_7-R_34_667m
+.ENDS wire90-1192_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1239_2-R_34_667m a b
+Ccap@0 gnd net@14 4.544f
+Ccap@1 gnd net@8 4.544f
+Ccap@2 gnd net@11 4.544f
+Rres@0 net@14 a 7.16
+Rres@1 net@11 net@14 14.32
+Rres@2 b net@8 7.16
+Rres@3 net@8 net@11 14.32
+.ENDS wire-C_0_011f-1239_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1239_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1239_2-R_34_667m
+.ENDS wire90-1239_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1190_7-R_34_667m a b
+Ccap@0 gnd net@14 4.366f
+Ccap@1 gnd net@8 4.366f
+Ccap@2 gnd net@11 4.366f
+Rres@0 net@14 a 6.88
+Rres@1 net@11 net@14 13.759
+Rres@2 b net@8 6.88
+Rres@3 net@8 net@11 13.759
+.ENDS wire-C_0_011f-1190_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1190_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1190_7-R_34_667m
+.ENDS wire90-1190_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1268_7-R_34_667m a b
+Ccap@0 gnd net@14 4.652f
+Ccap@1 gnd net@8 4.652f
+Ccap@2 gnd net@11 4.652f
+Rres@0 net@14 a 7.33
+Rres@1 net@11 net@14 14.661
+Rres@2 b net@8 7.33
+Rres@3 net@8 net@11 14.661
+.ENDS wire-C_0_011f-1268_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1268_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1268_7-R_34_667m
+.ENDS wire90-1268_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1187_7-R_34_667m a b
+Ccap@0 gnd net@14 4.355f
+Ccap@1 gnd net@8 4.355f
+Ccap@2 gnd net@11 4.355f
+Rres@0 net@14 a 6.862
+Rres@1 net@11 net@14 13.725
+Rres@2 b net@8 6.862
+Rres@3 net@8 net@11 13.725
+.ENDS wire-C_0_011f-1187_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1187_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1187_7-R_34_667m
+.ENDS wire90-1187_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1257_7-R_34_667m a b
+Ccap@0 gnd net@14 4.612f
+Ccap@1 gnd net@8 4.612f
+Ccap@2 gnd net@11 4.612f
+Rres@0 net@14 a 7.267
+Rres@1 net@11 net@14 14.533
+Rres@2 b net@8 7.267
+Rres@3 net@8 net@11 14.533
+.ENDS wire-C_0_011f-1257_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1257_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1257_7-R_34_667m
+.ENDS wire90-1257_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1190_2-R_34_667m a b
+Ccap@0 gnd net@14 4.364f
+Ccap@1 gnd net@8 4.364f
+Ccap@2 gnd net@11 4.364f
+Rres@0 net@14 a 6.877
+Rres@1 net@11 net@14 13.753
+Rres@2 b net@8 6.877
+Rres@3 net@8 net@11 13.753
+.ENDS wire-C_0_011f-1190_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1190_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1190_2-R_34_667m
+.ENDS wire90-1190_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1197_6-R_34_667m a b
+Ccap@0 gnd net@14 4.391f
+Ccap@1 gnd net@8 4.391f
+Ccap@2 gnd net@11 4.391f
+Rres@0 net@14 a 6.919
+Rres@1 net@11 net@14 13.839
+Rres@2 b net@8 6.919
+Rres@3 net@8 net@11 13.839
+.ENDS wire-C_0_011f-1197_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1197_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1197_6-R_34_667m
+.ENDS wire90-1197_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1171-R_34_667m a b
+Ccap@0 gnd net@14 4.294f
+Ccap@1 gnd net@8 4.294f
+Ccap@2 gnd net@11 4.294f
+Rres@0 net@14 a 6.766
+Rres@1 net@11 net@14 13.532
+Rres@2 b net@8 6.766
+Rres@3 net@8 net@11 13.532
+.ENDS wire-C_0_011f-1171-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1171-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1171-R_34_667m
+.ENDS wire90-1171-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1186_6-R_34_667m a b
+Ccap@0 gnd net@14 4.351f
+Ccap@1 gnd net@8 4.351f
+Ccap@2 gnd net@11 4.351f
+Rres@0 net@14 a 6.856
+Rres@1 net@11 net@14 13.712
+Rres@2 b net@8 6.856
+Rres@3 net@8 net@11 13.712
+.ENDS wire-C_0_011f-1186_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1186_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1186_6-R_34_667m
+.ENDS wire90-1186_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1178-R_34_667m a b
+Ccap@0 gnd net@14 4.319f
+Ccap@1 gnd net@8 4.319f
+Ccap@2 gnd net@11 4.319f
+Rres@0 net@14 a 6.806
+Rres@1 net@11 net@14 13.612
+Rres@2 b net@8 6.806
+Rres@3 net@8 net@11 13.612
+.ENDS wire-C_0_011f-1178-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1178-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1178-R_34_667m
+.ENDS wire90-1178-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1216_1-R_34_667m a b
+Ccap@0 gnd net@14 4.459f
+Ccap@1 gnd net@8 4.459f
+Ccap@2 gnd net@11 4.459f
+Rres@0 net@14 a 7.026
+Rres@1 net@11 net@14 14.053
+Rres@2 b net@8 7.026
+Rres@3 net@8 net@11 14.053
+.ENDS wire-C_0_011f-1216_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1216_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1216_1-R_34_667m
+.ENDS wire90-1216_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1172_5-R_34_667m a b
+Ccap@0 gnd net@14 4.299f
+Ccap@1 gnd net@8 4.299f
+Ccap@2 gnd net@11 4.299f
+Rres@0 net@14 a 6.774
+Rres@1 net@11 net@14 13.549
+Rres@2 b net@8 6.774
+Rres@3 net@8 net@11 13.549
+.ENDS wire-C_0_011f-1172_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1172_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1172_5-R_34_667m
+.ENDS wire90-1172_5-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1214_1-R_34_667m a b
+Ccap@0 gnd net@14 4.452f
+Ccap@1 gnd net@8 4.452f
+Ccap@2 gnd net@11 4.452f
+Rres@0 net@14 a 7.015
+Rres@1 net@11 net@14 14.03
+Rres@2 b net@8 7.015
+Rres@3 net@8 net@11 14.03
+.ENDS wire-C_0_011f-1214_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1214_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1214_1-R_34_667m
+.ENDS wire90-1214_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1166_5-R_34_667m a b
+Ccap@0 gnd net@14 4.277f
+Ccap@1 gnd net@8 4.277f
+Ccap@2 gnd net@11 4.277f
+Rres@0 net@14 a 6.74
+Rres@1 net@11 net@14 13.48
+Rres@2 b net@8 6.74
+Rres@3 net@8 net@11 13.48
+.ENDS wire-C_0_011f-1166_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1166_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1166_5-R_34_667m
+.ENDS wire90-1166_5-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1203_1-R_34_667m a b
+Ccap@0 gnd net@14 4.411f
+Ccap@1 gnd net@8 4.411f
+Ccap@2 gnd net@11 4.411f
+Rres@0 net@14 a 6.951
+Rres@1 net@11 net@14 13.902
+Rres@2 b net@8 6.951
+Rres@3 net@8 net@11 13.902
+.ENDS wire-C_0_011f-1203_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1203_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1203_1-R_34_667m
+.ENDS wire90-1203_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1199_2-R_34_667m a b
+Ccap@0 gnd net@14 4.397f
+Ccap@1 gnd net@8 4.397f
+Ccap@2 gnd net@11 4.397f
+Rres@0 net@14 a 6.929
+Rres@1 net@11 net@14 13.857
+Rres@2 b net@8 6.929
+Rres@3 net@8 net@11 13.857
+.ENDS wire-C_0_011f-1199_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1199_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1199_2-R_34_667m
+.ENDS wire90-1199_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1217_2-R_34_667m a b
+Ccap@0 gnd net@14 4.463f
+Ccap@1 gnd net@8 4.463f
+Ccap@2 gnd net@11 4.463f
+Rres@0 net@14 a 7.033
+Rres@1 net@11 net@14 14.065
+Rres@2 b net@8 7.033
+Rres@3 net@8 net@11 14.065
+.ENDS wire-C_0_011f-1217_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1217_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1217_2-R_34_667m
+.ENDS wire90-1217_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1208_2-R_34_667m a b
+Ccap@0 gnd net@14 4.43f
+Ccap@1 gnd net@8 4.43f
+Ccap@2 gnd net@11 4.43f
+Rres@0 net@14 a 6.981
+Rres@1 net@11 net@14 13.961
+Rres@2 b net@8 6.981
+Rres@3 net@8 net@11 13.961
+.ENDS wire-C_0_011f-1208_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1208_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1208_2-R_34_667m
+.ENDS wire90-1208_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1215_2-R_34_667m a b
+Ccap@0 gnd net@14 4.456f
+Ccap@1 gnd net@8 4.456f
+Ccap@2 gnd net@11 4.456f
+Rres@0 net@14 a 7.021
+Rres@1 net@11 net@14 14.042
+Rres@2 b net@8 7.021
+Rres@3 net@8 net@11 14.042
+.ENDS wire-C_0_011f-1215_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1215_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1215_2-R_34_667m
+.ENDS wire90-1215_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1205_2-R_34_667m a b
+Ccap@0 gnd net@14 4.419f
+Ccap@1 gnd net@8 4.419f
+Ccap@2 gnd net@11 4.419f
+Rres@0 net@14 a 6.963
+Rres@1 net@11 net@14 13.927
+Rres@2 b net@8 6.963
+Rres@3 net@8 net@11 13.927
+.ENDS wire-C_0_011f-1205_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1205_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1205_2-R_34_667m
+.ENDS wire90-1205_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1244_7-R_34_667m a b
+Ccap@0 gnd net@14 4.564f
+Ccap@1 gnd net@8 4.564f
+Ccap@2 gnd net@11 4.564f
+Rres@0 net@14 a 7.192
+Rres@1 net@11 net@14 14.383
+Rres@2 b net@8 7.192
+Rres@3 net@8 net@11 14.383
+.ENDS wire-C_0_011f-1244_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1244_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1244_7-R_34_667m
+.ENDS wire90-1244_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1184_2-R_34_667m a b
+Ccap@0 gnd net@14 4.342f
+Ccap@1 gnd net@8 4.342f
+Ccap@2 gnd net@11 4.342f
+Rres@0 net@14 a 6.842
+Rres@1 net@11 net@14 13.684
+Rres@2 b net@8 6.842
+Rres@3 net@8 net@11 13.684
+.ENDS wire-C_0_011f-1184_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1184_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1184_2-R_34_667m
+.ENDS wire90-1184_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1233_7-R_34_667m a b
+Ccap@0 gnd net@14 4.524f
+Ccap@1 gnd net@8 4.524f
+Ccap@2 gnd net@11 4.524f
+Rres@0 net@14 a 7.128
+Rres@1 net@11 net@14 14.256
+Rres@2 b net@8 7.128
+Rres@3 net@8 net@11 14.256
+.ENDS wire-C_0_011f-1233_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1233_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1233_7-R_34_667m
+.ENDS wire90-1233_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1187_2-R_34_667m a b
+Ccap@0 gnd net@14 4.353f
+Ccap@1 gnd net@8 4.353f
+Ccap@2 gnd net@11 4.353f
+Rres@0 net@14 a 6.859
+Rres@1 net@11 net@14 13.719
+Rres@2 b net@8 6.859
+Rres@3 net@8 net@11 13.719
+.ENDS wire-C_0_011f-1187_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1187_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1187_2-R_34_667m
+.ENDS wire90-1187_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1215_6-R_34_667m a b
+Ccap@0 gnd net@14 4.457f
+Ccap@1 gnd net@8 4.457f
+Ccap@2 gnd net@11 4.457f
+Rres@0 net@14 a 7.023
+Rres@1 net@11 net@14 14.047
+Rres@2 b net@8 7.023
+Rres@3 net@8 net@11 14.047
+.ENDS wire-C_0_011f-1215_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1215_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1215_6-R_34_667m
+.ENDS wire90-1215_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1168-R_34_667m a b
+Ccap@0 gnd net@14 4.283f
+Ccap@1 gnd net@8 4.283f
+Ccap@2 gnd net@11 4.283f
+Rres@0 net@14 a 6.748
+Rres@1 net@11 net@14 13.497
+Rres@2 b net@8 6.748
+Rres@3 net@8 net@11 13.497
+.ENDS wire-C_0_011f-1168-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1168-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1168-R_34_667m
+.ENDS wire90-1168-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1204_6-R_34_667m a b
+Ccap@0 gnd net@14 4.417f
+Ccap@1 gnd net@8 4.417f
+Ccap@2 gnd net@11 4.417f
+Rres@0 net@14 a 6.96
+Rres@1 net@11 net@14 13.92
+Rres@2 b net@8 6.96
+Rres@3 net@8 net@11 13.92
+.ENDS wire-C_0_011f-1204_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1204_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1204_6-R_34_667m
+.ENDS wire90-1204_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1234_1-R_34_667m a b
+Ccap@0 gnd net@14 4.525f
+Ccap@1 gnd net@8 4.525f
+Ccap@2 gnd net@11 4.525f
+Rres@0 net@14 a 7.13
+Rres@1 net@11 net@14 14.261
+Rres@2 b net@8 7.13
+Rres@3 net@8 net@11 14.261
+.ENDS wire-C_0_011f-1234_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1234_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1234_1-R_34_667m
+.ENDS wire90-1234_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1169_5-R_34_667m a b
+Ccap@0 gnd net@14 4.288f
+Ccap@1 gnd net@8 4.288f
+Ccap@2 gnd net@11 4.288f
+Rres@0 net@14 a 6.757
+Rres@1 net@11 net@14 13.514
+Rres@2 b net@8 6.757
+Rres@3 net@8 net@11 13.514
+.ENDS wire-C_0_011f-1169_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1169_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1169_5-R_34_667m
+.ENDS wire90-1169_5-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1232_1-R_34_667m a b
+Ccap@0 gnd net@14 4.518f
+Ccap@1 gnd net@8 4.518f
+Ccap@2 gnd net@11 4.518f
+Rres@0 net@14 a 7.119
+Rres@1 net@11 net@14 14.238
+Rres@2 b net@8 7.119
+Rres@3 net@8 net@11 14.238
+.ENDS wire-C_0_011f-1232_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1232_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1232_1-R_34_667m
+.ENDS wire90-1232_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1163_5-R_34_667m a b
+Ccap@0 gnd net@14 4.266f
+Ccap@1 gnd net@8 4.266f
+Ccap@2 gnd net@11 4.266f
+Rres@0 net@14 a 6.722
+Rres@1 net@11 net@14 13.445
+Rres@2 b net@8 6.722
+Rres@3 net@8 net@11 13.445
+.ENDS wire-C_0_011f-1163_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1163_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1163_5-R_34_667m
+.ENDS wire90-1163_5-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1221_1-R_34_667m a b
+Ccap@0 gnd net@14 4.477f
+Ccap@1 gnd net@8 4.477f
+Ccap@2 gnd net@11 4.477f
+Rres@0 net@14 a 7.055
+Rres@1 net@11 net@14 14.11
+Rres@2 b net@8 7.055
+Rres@3 net@8 net@11 14.11
+.ENDS wire-C_0_011f-1221_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1221_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1221_1-R_34_667m
+.ENDS wire90-1221_1-layer_1-width_3
+
+*** CELL: fifoL:split10{sch}
+.SUBCKT split10 clS[F] clS[T] cl[F] cl[T] in[10] in[11] in[12] in[13] in[14] 
++in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] 
++in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] 
++in[35] in[36] in[3] in[4] in[5] in[6] in[7] in[8] in[9] mc out[10] out[11] 
++out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] 
++out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] 
++out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] out[3] 
++out[4] out[5] out[6] out[7] out[8] out[9] pred rd[F] rd[T] sin sout succ
+XsplitEnd@0 clS[F] clS[T] cl[F] cl[T] a[10] a[11] a[12] a[13] a[14] a[15] 
++a[16] a[17] a[18] a[19] a[1] a[20] a[21] a[22] a[23] a[24] a[25] a[26] a[27] 
++a[28] a[29] a[2] a[30] a[31] a[32] a[33] a[34] a[35] a[36] a[3] a[4] a[5] 
++a[6] a[7] a[8] a[9] b[10] b[11] b[12] b[13] b[14] b[15] b[16] b[17] b[18] 
++b[19] b[1] b[20] b[21] b[22] b[23] b[24] b[25] b[26] b[27] b[28] b[29] b[2] 
++b[30] b[31] b[32] b[33] b[34] b[35] b[36] b[3] b[4] b[5] b[6] b[7] b[8] b[9] 
++mc out[10] out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] 
++out[19] out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] 
++out[27] out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] 
++out[35] out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9] net@336 
++net@337 rd[F] rd[T] net@335 sout succ splitEnd
+XsplitSta@0 clS[F] clS[T] cl[F] cl[T] in[10] in[11] in[12] in[13] in[14] 
++in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] 
++in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] 
++in[35] in[36] in[3] in[4] in[5] in[6] in[7] in[8] in[9] mc x[10] x[11] x[12] 
++x[13] x[14] x[15] x[16] x[17] x[18] x[19] x[1] x[20] x[21] x[22] x[23] x[24] 
++x[25] x[26] x[27] x[28] x[29] x[2] x[30] x[31] x[32] x[33] x[34] x[35] x[36] 
++x[3] x[4] x[5] x[6] x[7] x[8] x[9] pred rd[F] rd[T] sin net@315 net@312 
++net@313 splitStart
+XsplitSta@1 clS[F] clS[T] clS[F] clS[T] cl[F] cl[T] cl[F] cl[T] x[10] x[11] 
++x[12] x[13] x[14] x[15] x[16] x[17] x[18] x[19] x[1] x[20] x[21] x[22] x[23] 
++x[24] x[25] x[26] x[27] x[28] x[29] x[2] x[30] x[31] x[32] x[33] x[34] x[35] 
++x[36] x[3] x[4] x[5] x[6] x[7] x[8] x[9] mc mc a[10] a[11] a[12] a[13] a[14] 
++a[15] a[16] a[17] a[18] a[19] a[1] a[20] a[21] a[22] a[23] a[24] a[25] a[26] 
++a[27] a[28] a[29] a[2] a[30] a[31] a[32] a[33] a[34] a[35] a[36] a[3] a[4] 
++a[5] a[6] a[7] a[8] a[9] net@245 rd[F] rd[T] rd[F] rd[T] net@285 net@252 
++net@251 net@270 net@276 splitStageDx4
+XsplitSta@2 clS[F] clS[T] clS[F] clS[T] cl[F] cl[T] cl[F] cl[T] x[10] x[11] 
++x[12] x[13] x[14] x[15] x[16] x[17] x[18] x[19] x[1] x[20] x[21] x[22] x[23] 
++x[24] x[25] x[26] x[27] x[28] x[29] x[2] x[30] x[31] x[32] x[33] x[34] x[35] 
++x[36] x[3] x[4] x[5] x[6] x[7] x[8] x[9] mc mc b[10] b[11] b[12] b[13] b[14] 
++b[15] b[16] b[17] b[18] b[19] b[1] b[20] b[21] b[22] b[23] b[24] b[25] b[26] 
++b[27] b[28] b[29] b[2] b[30] b[31] b[32] b[33] b[34] b[35] b[36] b[3] b[4] 
++b[5] b[6] b[7] b[8] b[9] net@248 rd[F] rd[T] rd[F] rd[T] net@316 net@309 
++net@307 net@322 net@279 splitStageDx4
+Xwire90@0 net@316 net@251 wire90-1085-layer_1-width_3
+Xwire90@1 net@307 net@309 wire90-2816_7-layer_1-width_3
+Xwire90@2 net@313 net@248 wire90-1847-layer_1-width_3
+Xwire90@3 net@312 net@245 wire90-1161-layer_1-width_3
+Xwire90@4 net@315 net@285 wire90-941-layer_1-width_3
+Xwire90@5 net@322 net@252 wire90-1085-layer_1-width_3
+Xwire90@6 net@270 net@335 wire90-992_5-layer_1-width_3
+Xwire90@7 net@276 net@336 wire90-924_4-layer_1-width_3
+Xwire90@8 net@279 net@337 wire90-1463_4-layer_1-width_3
+Xwire90@9 x[1] wire90@9_b wire90-1346_1-layer_1-width_3
+Xwire90@10 x[2] wire90@10_b wire90-1337_6-layer_1-width_3
+Xwire90@11 x[3] wire90@11_b wire90-1339_1-layer_1-width_3
+Xwire90@12 x[4] wire90@12_b wire90-1356_6-layer_1-width_3
+Xwire90@13 x[5] wire90@13_b wire90-1341_1-layer_1-width_3
+Xwire90@14 x[6] wire90@14_b wire90-1345_1-layer_1-width_3
+Xwire90@15 x[7] wire90@15_b wire90-1361_4-layer_1-width_3
+Xwire90@16 x[8] wire90@16_b wire90-1342_1-layer_1-width_3
+Xwire90@17 x[9] wire90@17_b wire90-1349_6-layer_1-width_3
+Xwire90@18 x[10] wire90@18_b wire90-1345_8-layer_1-width_3
+Xwire90@19 x[11] wire90@19_b wire90-1346_7-layer_1-width_3
+Xwire90@20 x[12] wire90@20_b wire90-1330_8-layer_1-width_3
+Xwire90@21 x[13] wire90@21_b wire90-1339_7-layer_1-width_3
+Xwire90@22 x[14] wire90@22_b wire90-1353_3-layer_1-width_3
+Xwire90@23 x[15] wire90@23_b wire90-1355_2-layer_1-width_3
+Xwire90@24 x[16] wire90@24_b wire90-1359_3-layer_1-width_3
+Xwire90@25 x[17] wire90@25_b wire90-1357_2-layer_1-width_3
+Xwire90@26 x[18] wire90@26_b wire90-1353_3-layer_1-width_3
+Xwire90@27 x[19] wire90@27_b wire90-1356_6-layer_1-width_3
+Xwire90@28 x[20] wire90@28_b wire90-1356_1-layer_1-width_3
+Xwire90@29 x[21] wire90@29_b wire90-1349_6-layer_1-width_3
+Xwire90@30 x[22] wire90@30_b wire90-1379_1-layer_1-width_3
+Xwire90@31 x[23] wire90@31_b wire90-1351_6-layer_1-width_3
+Xwire90@32 x[24] wire90@32_b wire90-1376_6-layer_1-width_3
+Xwire90@33 x[25] wire90@33_b wire90-1372_4-layer_1-width_3
+Xwire90@34 x[26] wire90@34_b wire90-1373_6-layer_1-width_3
+Xwire90@35 x[27] wire90@35_b wire90-1360_1-layer_1-width_3
+Xwire90@36 x[28] wire90@36_b wire90-1323_3-layer_1-width_3
+Xwire90@37 x[29] wire90@37_b wire90-1336_2-layer_1-width_3
+Xwire90@38 x[30] wire90@38_b wire90-1330_3-layer_1-width_3
+Xwire90@39 x[31] wire90@39_b wire90-1329_2-layer_1-width_3
+Xwire90@40 x[32] wire90@40_b wire90-1325_8-layer_1-width_3
+Xwire90@41 x[33] wire90@41_b wire90-1344_7-layer_1-width_3
+Xwire90@42 x[34] wire90@42_b wire90-1327_8-layer_1-width_3
+Xwire90@43 x[35] wire90@43_b wire90-1346_7-layer_1-width_3
+Xwire90@44 x[36] wire90@44_b wire90-1321_8-layer_1-width_3
+Xwire90@45 a[1] wire90@45_b wire90-638-layer_1-width_3
+Xwire90@46 a[2] wire90@46_b wire90-638-layer_1-width_3
+Xwire90@47 a[3] wire90@47_b wire90-641-layer_1-width_3
+Xwire90@48 a[4] wire90@48_b wire90-644-layer_1-width_3
+Xwire90@49 a[5] wire90@49_b wire90-635-layer_1-width_3
+Xwire90@50 a[6] wire90@50_b wire90-666-layer_1-width_3
+Xwire90@51 a[7] wire90@51_b wire90-633_5-layer_1-width_3
+Xwire90@52 a[8] wire90@52_b wire90-655-layer_1-width_3
+Xwire90@53 a[9] wire90@53_b wire90-636_5-layer_1-width_3
+Xwire90@54 a[10] wire90@54_b wire90-594_5-layer_1-width_3
+Xwire90@55 a[11] wire90@55_b wire90-599_4-layer_1-width_3
+Xwire90@56 a[12] wire90@56_b wire90-590_5-layer_1-width_3
+Xwire90@57 a[13] wire90@57_b wire90-602_4-layer_1-width_3
+Xwire90@58 a[14] wire90@58_b wire90-607-layer_1-width_3
+Xwire90@59 a[15] wire90@59_b wire90-601_6-layer_1-width_3
+Xwire90@60 a[16] wire90@60_b wire90-605-layer_1-width_3
+Xwire90@61 a[17] wire90@61_b wire90-594_9-layer_1-width_3
+Xwire90@62 a[18] wire90@62_b wire90-600-layer_1-width_3
+Xwire90@63 a[19] wire90@63_b wire90-636_5-layer_1-width_3
+Xwire90@64 a[20] wire90@64_b wire90-635-layer_1-width_3
+Xwire90@65 a[21] wire90@65_b wire90-639_5-layer_1-width_3
+Xwire90@66 a[22] wire90@66_b wire90-641-layer_1-width_3
+Xwire90@67 a[23] wire90@67_b wire90-633_5-layer_1-width_3
+Xwire90@68 a[24] wire90@68_b wire90-655_5-layer_1-width_3
+Xwire90@69 a[25] wire90@69_b wire90-632-layer_1-width_3
+Xwire90@70 a[26] wire90@70_b wire90-645-layer_1-width_3
+Xwire90@71 a[27] wire90@71_b wire90-635-layer_1-width_3
+Xwire90@72 a[28] wire90@72_b wire90-600_5-layer_1-width_3
+Xwire90@73 a[29] wire90@73_b wire90-596_4-layer_1-width_3
+Xwire90@74 a[30] wire90@74_b wire90-595-layer_1-width_3
+Xwire90@75 a[31] wire90@75_b wire90-599_4-layer_1-width_3
+Xwire90@76 a[32] wire90@76_b wire90-613-layer_1-width_3
+Xwire90@77 a[33] wire90@77_b wire90-598_6-layer_1-width_3
+Xwire90@78 a[34] wire90@78_b wire90-611-layer_1-width_3
+Xwire90@79 a[35] wire90@79_b wire90-591_9-layer_1-width_3
+Xwire90@80 a[36] wire90@80_b wire90-606-layer_1-width_3
+Xwire90@81 b[1] wire90@81_b wire90-1186_7-layer_1-width_3
+Xwire90@82 b[2] wire90@82_b wire90-1241_2-layer_1-width_3
+Xwire90@83 b[3] wire90@83_b wire90-1192_7-layer_1-width_3
+Xwire90@84 b[4] wire90@84_b wire90-1239_2-layer_1-width_3
+Xwire90@85 b[5] wire90@85_b wire90-1190_7-layer_1-width_3
+Xwire90@86 b[6] wire90@86_b wire90-1268_7-layer_1-width_3
+Xwire90@87 b[7] wire90@87_b wire90-1187_7-layer_1-width_3
+Xwire90@88 b[8] wire90@88_b wire90-1257_7-layer_1-width_3
+Xwire90@89 b[9] wire90@89_b wire90-1190_2-layer_1-width_3
+Xwire90@90 b[10] wire90@90_b wire90-1197_6-layer_1-width_3
+Xwire90@91 b[11] wire90@91_b wire90-1171-layer_1-width_3
+Xwire90@92 b[12] wire90@92_b wire90-1186_6-layer_1-width_3
+Xwire90@93 b[13] wire90@93_b wire90-1178-layer_1-width_3
+Xwire90@94 b[14] wire90@94_b wire90-1216_1-layer_1-width_3
+Xwire90@95 b[15] wire90@95_b wire90-1172_5-layer_1-width_3
+Xwire90@96 b[16] wire90@96_b wire90-1214_1-layer_1-width_3
+Xwire90@97 b[17] wire90@97_b wire90-1166_5-layer_1-width_3
+Xwire90@98 b[18] wire90@98_b wire90-1203_1-layer_1-width_3
+Xwire90@99 b[19] wire90@99_b wire90-1199_2-layer_1-width_3
+Xwire90@100 b[20] wire90@100_b wire90-1217_2-layer_1-width_3
+Xwire90@101 b[21] wire90@101_b wire90-1208_2-layer_1-width_3
+Xwire90@102 b[22] wire90@102_b wire90-1215_2-layer_1-width_3
+Xwire90@103 b[23] wire90@103_b wire90-1205_2-layer_1-width_3
+Xwire90@104 b[24] wire90@104_b wire90-1244_7-layer_1-width_3
+Xwire90@105 b[25] wire90@105_b wire90-1184_2-layer_1-width_3
+Xwire90@106 b[26] wire90@106_b wire90-1233_7-layer_1-width_3
+Xwire90@107 b[27] wire90@107_b wire90-1187_2-layer_1-width_3
+Xwire90@108 b[28] wire90@108_b wire90-1215_6-layer_1-width_3
+Xwire90@109 b[29] wire90@109_b wire90-1168-layer_1-width_3
+Xwire90@110 b[30] wire90@110_b wire90-1204_6-layer_1-width_3
+Xwire90@111 b[31] wire90@111_b wire90-1171-layer_1-width_3
+Xwire90@112 b[32] wire90@112_b wire90-1234_1-layer_1-width_3
+Xwire90@113 b[33] wire90@113_b wire90-1169_5-layer_1-width_3
+Xwire90@114 b[34] wire90@114_b wire90-1232_1-layer_1-width_3
+Xwire90@115 b[35] wire90@115_b wire90-1163_5-layer_1-width_3
+Xwire90@116 b[36] wire90@116_b wire90-1221_1-layer_1-width_3
+.ENDS split10
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3513_1-R_34_667m a b
+Ccap@0 gnd net@14 12.881f
+Ccap@1 gnd net@8 12.881f
+Ccap@2 gnd net@11 12.881f
+Rres@0 net@14 a 20.298
+Rres@1 net@11 net@14 40.596
+Rres@2 b net@8 20.298
+Rres@3 net@8 net@11 40.596
+.ENDS wire-C_0_011f-3513_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3513_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-3513_1-R_34_667m
+.ENDS wire90-3513_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3124_7-R_34_667m a b
+Ccap@0 gnd net@14 11.457f
+Ccap@1 gnd net@8 11.457f
+Ccap@2 gnd net@11 11.457f
+Rres@0 net@14 a 18.054
+Rres@1 net@11 net@14 36.108
+Rres@2 b net@8 18.054
+Rres@3 net@8 net@11 36.108
+.ENDS wire-C_0_011f-3124_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3124_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-3124_7-R_34_667m
+.ENDS wire90-3124_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-603_9-R_26m a b
+Ccap@0 gnd net@14 2.214f
+Ccap@1 gnd net@8 2.214f
+Ccap@2 gnd net@11 2.214f
+Rres@0 net@14 a 2.617
+Rres@1 net@11 net@14 5.234
+Rres@2 b net@8 2.617
+Rres@3 net@8 net@11 5.234
+.ENDS wire-C_0_011f-603_9-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-603_9-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-603_9-R_26m
+.ENDS wire90-603_9-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-608_4-R_26m a b
+Ccap@0 gnd net@14 2.231f
+Ccap@1 gnd net@8 2.231f
+Ccap@2 gnd net@11 2.231f
+Rres@0 net@14 a 2.636
+Rres@1 net@11 net@14 5.273
+Rres@2 b net@8 2.636
+Rres@3 net@8 net@11 5.273
+.ENDS wire-C_0_011f-608_4-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-608_4-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-608_4-R_26m
+.ENDS wire90-608_4-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-632_5-R_26m a b
+Ccap@0 gnd net@14 2.319f
+Ccap@1 gnd net@8 2.319f
+Ccap@2 gnd net@11 2.319f
+Rres@0 net@14 a 2.741
+Rres@1 net@11 net@14 5.482
+Rres@2 b net@8 2.741
+Rres@3 net@8 net@11 5.482
+.ENDS wire-C_0_011f-632_5-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-632_5-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-632_5-R_26m
+.ENDS wire90-632_5-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-630-R_26m a b
+Ccap@0 gnd net@14 2.31f
+Ccap@1 gnd net@8 2.31f
+Ccap@2 gnd net@11 2.31f
+Rres@0 net@14 a 2.73
+Rres@1 net@11 net@14 5.46
+Rres@2 b net@8 2.73
+Rres@3 net@8 net@11 5.46
+.ENDS wire-C_0_011f-630-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-630-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-630-R_26m
+.ENDS wire90-630-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-611_4-R_26m a b
+Ccap@0 gnd net@14 2.242f
+Ccap@1 gnd net@8 2.242f
+Ccap@2 gnd net@11 2.242f
+Rres@0 net@14 a 2.649
+Rres@1 net@11 net@14 5.299
+Rres@2 b net@8 2.649
+Rres@3 net@8 net@11 5.299
+.ENDS wire-C_0_011f-611_4-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-611_4-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-611_4-R_26m
+.ENDS wire90-611_4-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-613_5-R_26m a b
+Ccap@0 gnd net@14 2.25f
+Ccap@1 gnd net@8 2.25f
+Ccap@2 gnd net@11 2.25f
+Rres@0 net@14 a 2.658
+Rres@1 net@11 net@14 5.317
+Rres@2 b net@8 2.658
+Rres@3 net@8 net@11 5.317
+.ENDS wire-C_0_011f-613_5-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-613_5-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-613_5-R_26m
+.ENDS wire90-613_5-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-613_8-R_26m a b
+Ccap@0 gnd net@14 2.251f
+Ccap@1 gnd net@8 2.251f
+Ccap@2 gnd net@11 2.251f
+Rres@0 net@14 a 2.66
+Rres@1 net@11 net@14 5.32
+Rres@2 b net@8 2.66
+Rres@3 net@8 net@11 5.32
+.ENDS wire-C_0_011f-613_8-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-613_8-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-613_8-R_26m
+.ENDS wire90-613_8-layer_1-width_4
+
+*** CELL: fifoL:ringFIFO{sch}
+.SUBCKT ringFIFO clS[F] clS[T] cl[F] cl[T] do[L] do[M] do[epi] fire[ODE] 
++fire[m1] fire[m2] inE[10] inE[11] inE[12] inE[13] inE[14] inE[15] inE[16] 
++inE[17] inE[18] inE[19] inE[1] inE[20] inE[21] inE[22] inE[23] inE[24] 
++inE[25] inE[26] inE[27] inE[28] inE[29] inE[2] inE[30] inE[31] inE[32] 
++inE[33] inE[34] inE[35] inE[36] inE[3] inE[4] inE[5] inE[6] inE[7] inE[8] 
++inE[9] mc outm1[1] outm1[20] outm1[22] outm1[23] outm1[24] outm1[25] 
++outm1[26] outm1[27] outm1[2] outm1[3] outm1[4] outm1[5] outm1[6] outm1[8] 
++pout[10] pout[11] pout[12] pout[13] pout[14] pout[15] pout[16] pout[17] 
++pout[18] pout[1] pout[2] pout[3] pout[4] pout[5] pout[6] pout[7] pout[8] 
++pout[9] rd[F] rd[T] sin sout
+Xm12stage@0 clS[F] clS[T] cl[F] cl[T] fire[m1] fire[m2] pout[10] pout[11] 
++pout[12] m3[13] m3[14] m3[15] m3[16] m3[17] m3[18] m3[19] pout[1] m3[20] 
++m3[21] m3[22] m3[23] m3[24] m3[25] m3[26] m3[27] m3[28] m3[29] pout[2] m3[30] 
++m3[31] m3[32] m3[33] m3[34] m3[35] m3[36] pout[3] pout[4] pout[5] pout[6] 
++pout[7] pout[8] pout[9] mc m1[10] m1[11] m1[12] m1[13] m1[14] m1[15] m1[16] 
++m1[17] m1[18] m1[19] outm1[1] outm1[20] m1[21] outm1[22] outm1[23] outm1[24] 
++outm1[25] outm1[26] outm1[27] m1[28] m1[29] outm1[2] m1[30] m1[31] m1[32] 
++m1[33] m1[34] m1[35] m1[36] outm1[3] outm1[4] outm1[5] outm1[6] m1[7] 
++outm1[8] m1[9] pout[13] pout[14] pout[15] pout[16] pout[17] pout[18] net@233 
++rd[F] rd[T] net@291 sout net@122 m12stageD
+XodRQstag@0 clS[F] clS[T] cl[F] cl[T] do[L] do[M] do[epi] net@236 fire[ODE] 
++inE[10] inE[11] inE[12] inE[13] inE[14] inE[15] inE[16] inE[17] inE[18] 
++inE[19] inE[1] inE[20] inE[21] inE[22] inE[23] inE[24] inE[25] inE[26] 
++inE[27] inE[28] inE[29] inE[2] inE[30] inE[31] inE[32] inE[33] inE[34] 
++inE[35] inE[36] inE[3] inE[4] inE[5] inE[6] inE[7] inE[8] inE[9] m1[10] 
++m1[11] m1[12] m1[13] m1[14] m1[15] m1[16] m1[17] m1[18] m1[19] outm1[1] 
++outm1[20] m1[21] outm1[22] outm1[23] outm1[24] outm1[25] outm1[26] outm1[27] 
++m1[28] m1[29] outm1[2] m1[30] m1[31] m1[32] m1[33] m1[34] m1[35] m1[36] 
++outm1[3] outm1[4] outm1[5] outm1[6] m1[7] outm1[8] m1[9] mc rq[10] rq[11] 
++rq[12] rq[13] rq[14] rq[15] rq[16] rq[17] rq[18] rq[19] rq[1] rq[20] rq[21] 
++rq[22] rq[23] rq[24] rq[25] rq[26] rq[27] rq[28] rq[29] rq[2] rq[30] rq[31] 
++rq[32] rq[33] rq[34] rq[35] rq[36] rq[3] rq[4] rq[5] rq[6] rq[7] rq[8] rq[9] 
++net@149 rd[F] rd[T] sin net@253 odRQstageD
+Xsplit10@0 clS[F] clS[T] cl[F] cl[T] rq[10] rq[11] rq[12] rq[13] rq[14] 
++rq[15] rq[16] rq[17] rq[18] rq[19] rq[1] rq[20] rq[21] rq[22] rq[23] rq[24] 
++rq[25] rq[26] rq[27] rq[28] rq[29] rq[2] rq[30] rq[31] rq[32] rq[33] rq[34] 
++rq[35] rq[36] rq[3] rq[4] rq[5] rq[6] rq[7] rq[8] rq[9] mc pout[10] pout[11] 
++pout[12] m3[13] m3[14] m3[15] m3[16] m3[17] m3[18] m3[19] pout[1] m3[20] 
++m3[21] m3[22] m3[23] m3[24] m3[25] m3[26] m3[27] m3[28] m3[29] pout[2] m3[30] 
++m3[31] m3[32] m3[33] m3[34] m3[35] m3[36] pout[3] pout[4] pout[5] pout[6] 
++pout[7] pout[8] pout[9] net@238 rd[F] rd[T] net@260 net@290 net@289 split10
+Xwire90@2 net@122 net@149 wire90-3513_1-layer_1-width_3
+Xwire90@39 net@238 net@236 wire90-3124_7-layer_1-width_3
+Xwire90@40 net@260 net@253 wire90-3124_7-layer_1-width_3
+Xwire90@41 net@289 net@233 wire90-3513_1-layer_1-width_3
+Xwire90@42 net@290 net@291 wire90-3513_1-layer_1-width_3
+Xwire90@46 m3[19] wire90@46_b wire90-605_4-layer_1-width_4
+Xwire90@47 m3[20] wire90@47_b wire90-613_4-layer_1-width_4
+Xwire90@48 m3[21] wire90@48_b wire90-605_4-layer_1-width_4
+Xwire90@49 m3[22] wire90@49_b wire90-623_9-layer_1-width_4
+Xwire90@50 m3[23] wire90@50_b wire90-603_9-layer_1-width_4
+Xwire90@51 m3[24] wire90@51_b wire90-625_9-layer_1-width_4
+Xwire90@52 m3[25] wire90@52_b wire90-607_8-layer_1-width_4
+Xwire90@53 m3[26] wire90@53_b wire90-620_9-layer_1-width_4
+Xwire90@54 m3[27] wire90@54_b wire90-605_4-layer_1-width_4
+Xwire90@56 m3[28] wire90@56_b wire90-612_5-layer_1-width_4
+Xwire90@58 m3[29] wire90@58_b wire90-602_4-layer_1-width_4
+Xwire90@59 m3[30] wire90@59_b wire90-607-layer_1-width_4
+Xwire90@60 m3[31] wire90@60_b wire90-602_4-layer_1-width_4
+Xwire90@61 m3[32] wire90@61_b wire90-620_5-layer_1-width_4
+Xwire90@62 m3[33] wire90@62_b wire90-602_4-layer_1-width_4
+Xwire90@63 m3[34] wire90@63_b wire90-624_5-layer_1-width_4
+Xwire90@64 m3[35] wire90@64_b wire90-602_4-layer_1-width_4
+Xwire90@65 m3[36] wire90@65_b wire90-618-layer_1-width_4
+Xwire90@73 m3[13] wire90@73_b wire90-608_4-layer_1-width_4
+Xwire90@74 m3[14] wire90@74_b wire90-632_5-layer_1-width_4
+Xwire90@75 m3[15] wire90@75_b wire90-608_4-layer_1-width_4
+Xwire90@76 m3[16] wire90@76_b wire90-636_5-layer_1-width_4
+Xwire90@77 m3[17] wire90@77_b wire90-608_4-layer_1-width_4
+Xwire90@78 m3[18] wire90@78_b wire90-630-layer_1-width_4
+Xwire90@79 m1[9] wire90@79_b wire90-611_4-layer_1-width_4
+Xwire90@80 m1[10] wire90@80_b wire90-624_5-layer_1-width_4
+Xwire90@82 m1[19] wire90@82_b wire90-605_4-layer_1-width_4
+Xwire90@91 m1[11] wire90@91_b wire90-608_4-layer_1-width_4
+Xwire90@92 m1[28] wire90@92_b wire90-612_5-layer_1-width_4
+Xwire90@94 m1[29] wire90@94_b wire90-602_4-layer_1-width_4
+Xwire90@95 m1[30] wire90@95_b wire90-607-layer_1-width_4
+Xwire90@96 m1[31] wire90@96_b wire90-602_4-layer_1-width_4
+Xwire90@97 m1[32] wire90@97_b wire90-620_5-layer_1-width_4
+Xwire90@98 m1[33] wire90@98_b wire90-602_4-layer_1-width_4
+Xwire90@99 m1[34] wire90@99_b wire90-624_5-layer_1-width_4
+Xwire90@100 m1[35] wire90@100_b wire90-602_4-layer_1-width_4
+Xwire90@101 m1[36] wire90@101_b wire90-618-layer_1-width_4
+Xwire90@102 m1[12] wire90@102_b wire90-613_5-layer_1-width_4
+Xwire90@107 m1[7] wire90@107_b wire90-613_8-layer_1-width_4
+Xwire90@109 m1[13] wire90@109_b wire90-608_4-layer_1-width_4
+Xwire90@110 m1[14] wire90@110_b wire90-632_5-layer_1-width_4
+Xwire90@111 m1[15] wire90@111_b wire90-608_4-layer_1-width_4
+Xwire90@112 m1[16] wire90@112_b wire90-636_5-layer_1-width_4
+Xwire90@113 m1[17] wire90@113_b wire90-608_4-layer_1-width_4
+Xwire90@114 m1[18] wire90@114_b wire90-630-layer_1-width_4
+Xwire90@115 rq[9] wire90@115_b wire90-611_4-layer_1-width_4
+Xwire90@116 rq[10] wire90@116_b wire90-624_5-layer_1-width_4
+Xwire90@117 rq[1] wire90@117_b wire90-611_4-layer_1-width_4
+Xwire90@118 rq[19] wire90@118_b wire90-605_4-layer_1-width_4
+Xwire90@119 rq[20] wire90@119_b wire90-613_4-layer_1-width_4
+Xwire90@120 rq[21] wire90@120_b wire90-605_4-layer_1-width_4
+Xwire90@121 rq[22] wire90@121_b wire90-623_9-layer_1-width_4
+Xwire90@122 rq[23] wire90@122_b wire90-603_9-layer_1-width_4
+Xwire90@123 rq[24] wire90@123_b wire90-625_9-layer_1-width_4
+Xwire90@124 rq[25] wire90@124_b wire90-607_8-layer_1-width_4
+Xwire90@125 rq[26] wire90@125_b wire90-620_9-layer_1-width_4
+Xwire90@126 rq[27] wire90@126_b wire90-605_4-layer_1-width_4
+Xwire90@127 rq[11] wire90@127_b wire90-608_4-layer_1-width_4
+Xwire90@128 rq[28] wire90@128_b wire90-612_5-layer_1-width_4
+Xwire90@129 rq[2] wire90@129_b wire90-613_4-layer_1-width_4
+Xwire90@130 rq[29] wire90@130_b wire90-602_4-layer_1-width_4
+Xwire90@131 rq[30] wire90@131_b wire90-607-layer_1-width_4
+Xwire90@132 rq[31] wire90@132_b wire90-602_4-layer_1-width_4
+Xwire90@133 rq[32] wire90@133_b wire90-620_5-layer_1-width_4
+Xwire90@134 rq[33] wire90@134_b wire90-602_4-layer_1-width_4
+Xwire90@135 rq[34] wire90@135_b wire90-624_5-layer_1-width_4
+Xwire90@136 rq[35] wire90@136_b wire90-602_4-layer_1-width_4
+Xwire90@137 rq[36] wire90@137_b wire90-618-layer_1-width_4
+Xwire90@138 rq[12] wire90@138_b wire90-613_5-layer_1-width_4
+Xwire90@139 rq[3] wire90@139_b wire90-611_4-layer_1-width_4
+Xwire90@140 rq[4] wire90@140_b wire90-623_9-layer_1-width_4
+Xwire90@141 rq[5] wire90@141_b wire90-608_4-layer_1-width_4
+Xwire90@142 rq[6] wire90@142_b wire90-625_9-layer_1-width_4
+Xwire90@143 rq[7] wire90@143_b wire90-613_8-layer_1-width_4
+Xwire90@144 rq[8] wire90@144_b wire90-620_9-layer_1-width_4
+Xwire90@145 rq[13] wire90@145_b wire90-608_4-layer_1-width_4
+Xwire90@146 rq[14] wire90@146_b wire90-632_5-layer_1-width_4
+Xwire90@147 rq[15] wire90@147_b wire90-608_4-layer_1-width_4
+Xwire90@148 rq[16] wire90@148_b wire90-636_5-layer_1-width_4
+Xwire90@149 rq[17] wire90@149_b wire90-608_4-layer_1-width_4
+Xwire90@150 rq[18] wire90@150_b wire90-630-layer_1-width_4
+.ENDS ringFIFO
+
+*** CELL: redFour:invLT{sch}
+.SUBCKT invLT-X_2 in out
+XNMOS@0 out in gnd NMOSx-X_4
+XPMOS@0 out in vdd PMOSx-X_2
+.ENDS invLT-X_2
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-216_3-R_34_667m a b
+Ccap@0 gnd net@14 0.793f
+Ccap@1 gnd net@8 0.793f
+Ccap@2 gnd net@11 0.793f
+Rres@0 net@14 a 1.25
+Rres@1 net@11 net@14 2.499
+Rres@2 b net@8 1.25
+Rres@3 net@8 net@11 2.499
+.ENDS wire-C_0_011f-216_3-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-216_3-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-216_3-R_34_667m
+.ENDS wire90-216_3-layer_1-width_3
+
+*** CELL: latchesK:latchZ10{sch}
+.SUBCKT latchZ10 c[1] c[2] cl[F] cl[T] in[1] mc out[TT] out[T]
+MNMOSf@1 out[T] net@186 gnd gnd nch W='12*(1+ABN/sqrt(12*3))' L='3' 
++DELVTO='AVT0N/sqrt(12*3)'
+XNMOSx@2 out[T] mc gnd NMOSx-X_10
+XNMOSx@3 out[T] c[1] gnd NMOSx-X_10
+XNMOSx@4 out[T] c[2] gnd NMOSx-X_20
+XPMOSx@2 out[T] net@186 vdd PMOSx-X_2
+Xinv@0 net@240 out[TT] inv-X_10
+XinvLT@0 out[T] net@186 invLT-X_2
+Xnms2@0 out[T] in[1] cl[T] nms2-X_10
+Xpms2@0 out[T] in[1] cl[F] pms2-X_10
+Xwire90@0 net@240 net@186 wire90-216_3-layer_1-width_3
+.ENDS latchZ10
+
+*** CELL: redFour:nor2n_sy{sch}
+.SUBCKT nor2n_sy-X_20 ina inb out
+Xnor2@0 ina inb out nor2_sy-X_20
+.ENDS nor2n_sy-X_20
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-133_8-R_34_667m a b
+Ccap@0 gnd net@14 0.491f
+Ccap@1 gnd net@8 0.491f
+Ccap@2 gnd net@11 0.491f
+Rres@0 net@14 a 0.773
+Rres@1 net@11 net@14 1.546
+Rres@2 b net@8 0.773
+Rres@3 net@8 net@11 1.546
+.ENDS wire-C_0_011f-133_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-133_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-133_8-R_34_667m
+.ENDS wire90-133_8-layer_1-width_3
+
+*** CELL: latchesK:mlat1in5i{sch}
+.SUBCKT mlat1in5i c[F] c[T] in out
+XinvLT@0 out net@119 invLT-X_2
+Xnms2@2 out in c[T] nms2-X_5
+Xnms2@3 out net@114 c[F] nms2-X_2
+Xpms2@0 out net@114 c[T] pms2-X_1
+Xpms2@1 out in c[F] pms2-X_5
+Xwire90@19 net@114 net@119 wire90-133_8-layer_1-width_3
+.ENDS mlat1in5i
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-200_9-R_34_667m a b
+Ccap@0 gnd net@14 0.737f
+Ccap@1 gnd net@8 0.737f
+Ccap@2 gnd net@11 0.737f
+Rres@0 net@14 a 1.161
+Rres@1 net@11 net@14 2.322
+Rres@2 b net@8 1.161
+Rres@3 net@8 net@11 2.322
+.ENDS wire-C_0_011f-200_9-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-200_9-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-200_9-R_34_667m
+.ENDS wire90-200_9-layer_1-width_3
+
+*** CELL: latchesK:mlat2in10i{sch}
+.SUBCKT mlat2in10i clA[F] clA[T] clB[F] clB[T] inA inB out[1]
+Xinv@0 out[1] net@33 inv-X_4
+Xnms2@0 out[1] inB clB[T] nms2-X_10
+Xnms2@1 out[1] inA clA[T] nms2-X_10
+Xnms3@0 out[1] clB[F] clA[F] net@33 nms3-X_2
+Xpms2@0 out[1] inB clB[F] pms2-X_10
+Xpms2@1 out[1] inA clA[F] pms2-X_10
+Xpms3@0 out[1] clA[T] clB[T] net@81 pms3-X_1
+Xwire90@1 net@81 net@33 wire90-200_9-layer_1-width_3
+.ENDS mlat2in10i
+
+*** CELL: redFour:nor2{sch}
+.SUBCKT nor2-X_10 ina inb out
+XNMOS@0 out ina gnd NMOSx-X_10
+XNMOS@1 out inb gnd NMOSx-X_10
+Xpms2@0 out ina inb pms2-X_10
+.ENDS nor2-X_10
+
+*** CELL: redFour:nor2n{sch}
+.SUBCKT nor2n-X_10 ina inb out
+Xnor2@0 ina inb out nor2-X_10
+.ENDS nor2n-X_10
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-173_2-R_34_667m a b
+Ccap@0 gnd net@14 0.635f
+Ccap@1 gnd net@8 0.635f
+Ccap@2 gnd net@11 0.635f
+Rres@0 net@14 a 1.001
+Rres@1 net@11 net@14 2.001
+Rres@2 b net@8 1.001
+Rres@3 net@8 net@11 2.001
+.ENDS wire-C_0_011f-173_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-173_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-173_2-R_34_667m
+.ENDS wire90-173_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-381_1-R_34_667m a b
+Ccap@0 gnd net@14 1.397f
+Ccap@1 gnd net@8 1.397f
+Ccap@2 gnd net@11 1.397f
+Rres@0 net@14 a 2.202
+Rres@1 net@11 net@14 4.404
+Rres@2 b net@8 2.202
+Rres@3 net@8 net@11 4.404
+.ENDS wire-C_0_011f-381_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-381_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-381_1-R_34_667m
+.ENDS wire90-381_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-981_4-R_34_667m a b
+Ccap@0 gnd net@14 3.598f
+Ccap@1 gnd net@8 3.598f
+Ccap@2 gnd net@11 3.598f
+Rres@0 net@14 a 5.67
+Rres@1 net@11 net@14 11.341
+Rres@2 b net@8 5.67
+Rres@3 net@8 net@11 11.341
+.ENDS wire-C_0_011f-981_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-981_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-981_4-R_34_667m
+.ENDS wire90-981_4-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-523_4-R_34_667m a b
+Ccap@0 gnd net@14 1.919f
+Ccap@1 gnd net@8 1.919f
+Ccap@2 gnd net@11 1.919f
+Rres@0 net@14 a 3.024
+Rres@1 net@11 net@14 6.048
+Rres@2 b net@8 3.024
+Rres@3 net@8 net@11 6.048
+.ENDS wire-C_0_011f-523_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-523_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-523_4-R_34_667m
+.ENDS wire90-523_4-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-535_1-R_34_667m a b
+Ccap@0 gnd net@14 1.962f
+Ccap@1 gnd net@8 1.962f
+Ccap@2 gnd net@11 1.962f
+Rres@0 net@14 a 3.092
+Rres@1 net@11 net@14 6.183
+Rres@2 b net@8 3.092
+Rres@3 net@8 net@11 6.183
+.ENDS wire-C_0_011f-535_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-535_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-535_1-R_34_667m
+.ENDS wire90-535_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-555_1-R_34_667m a b
+Ccap@0 gnd net@14 2.035f
+Ccap@1 gnd net@8 2.035f
+Ccap@2 gnd net@11 2.035f
+Rres@0 net@14 a 3.207
+Rres@1 net@11 net@14 6.414
+Rres@2 b net@8 3.207
+Rres@3 net@8 net@11 6.414
+.ENDS wire-C_0_011f-555_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-555_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-555_1-R_34_667m
+.ENDS wire90-555_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-677_1-R_34_667m a b
+Ccap@0 gnd net@14 2.483f
+Ccap@1 gnd net@8 2.483f
+Ccap@2 gnd net@11 2.483f
+Rres@0 net@14 a 3.912
+Rres@1 net@11 net@14 7.824
+Rres@2 b net@8 3.912
+Rres@3 net@8 net@11 7.824
+.ENDS wire-C_0_011f-677_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-677_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-677_1-R_34_667m
+.ENDS wire90-677_1-layer_1-width_3
+
+*** CELL: loopCountL:ringB{sch}
+.SUBCKT ringB bit[1] count[F] count[T] do[1] inLO[1] load[F] load[T]
+Xinv@0 net@60 bit[1] inv-X_20
+Xinv@1 bit[1] net@67 inv-X_5
+Xinv@2 net@68 net@65 inv-X_10
+Xinv@3 xx[T] net@64 inv-X_10
+Xmlat1in5@0 xx[T] xx[F] net@66 net@9 mlat1in5i
+Xmlat1in5@1 count[T] count[F] do[1] net@77 mlat1in5i
+Xmlat2in1@0 load[F] load[T] xx[F] xx[T] inLO[1] net@63 net@61 mlat2in10i
+Xnor2n@0 net@78 count[F] net@84 nor2n-X_10
+Xwire90@1 net@67 net@68 wire90-173_2-layer_1-width_3
+Xwire90@2 net@65 net@66 wire90-381_1-layer_1-width_3
+Xwire90@3 net@60 net@61 wire90-981_4-layer_1-width_3
+Xwire90@5 net@63 net@9 wire90-523_4-layer_1-width_3
+Xwire90@6 net@64 xx[F] wire90-535_1-layer_1-width_3
+Xwire90@7 net@77 net@78 wire90-555_1-layer_1-width_3
+Xwire90@8 net@84 xx[T] wire90-677_1-layer_1-width_3
+.ENDS ringB
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1350_3-R_34_667m a b
+Ccap@0 gnd net@14 4.951f
+Ccap@1 gnd net@8 4.951f
+Ccap@2 gnd net@11 4.951f
+Rres@0 net@14 a 7.802
+Rres@1 net@11 net@14 15.603
+Rres@2 b net@8 7.802
+Rres@3 net@8 net@11 15.603
+.ENDS wire-C_0_011f-1350_3-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1350_3-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1350_3-R_34_667m
+.ENDS wire90-1350_3-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-985_7-R_34_667m a b
+Ccap@0 gnd net@14 3.614f
+Ccap@1 gnd net@8 3.614f
+Ccap@2 gnd net@11 3.614f
+Rres@0 net@14 a 5.695
+Rres@1 net@11 net@14 11.39
+Rres@2 b net@8 5.695
+Rres@3 net@8 net@11 11.39
+.ENDS wire-C_0_011f-985_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-985_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-985_7-R_34_667m
+.ENDS wire90-985_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1915_8-R_34_667m a b
+Ccap@0 gnd net@14 7.025f
+Ccap@1 gnd net@8 7.025f
+Ccap@2 gnd net@11 7.025f
+Rres@0 net@14 a 11.069
+Rres@1 net@11 net@14 22.138
+Rres@2 b net@8 11.069
+Rres@3 net@8 net@11 22.138
+.ENDS wire-C_0_011f-1915_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1915_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1915_8-R_34_667m
+.ENDS wire90-1915_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1810_4-R_34_667m a b
+Ccap@0 gnd net@14 6.638f
+Ccap@1 gnd net@8 6.638f
+Ccap@2 gnd net@11 6.638f
+Rres@0 net@14 a 10.46
+Rres@1 net@11 net@14 20.92
+Rres@2 b net@8 10.46
+Rres@3 net@8 net@11 20.92
+.ENDS wire-C_0_011f-1810_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1810_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1810_4-R_34_667m
+.ENDS wire90-1810_4-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-520_8-R_34_667m a b
+Ccap@0 gnd net@14 1.91f
+Ccap@1 gnd net@8 1.91f
+Ccap@2 gnd net@11 1.91f
+Rres@0 net@14 a 3.009
+Rres@1 net@11 net@14 6.018
+Rres@2 b net@8 3.009
+Rres@3 net@8 net@11 6.018
+.ENDS wire-C_0_011f-520_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-520_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-520_8-R_34_667m
+.ENDS wire90-520_8-layer_1-width_3
+
+*** CELL: loopCountL:ilcEven{sch}
+.SUBCKT ilcEven bit[2] bit[4] bit[6] bitt[7] count do[2] do[4] do[6] 
++ilc[done] inLO[2] inLO[4] inLO[6] inLO[8] kill load mc zeroLO
+Xinv@5 load[F] net@269 inv-X_30
+Xinv@6 count[F] net@271 inv-X_30
+Xinv@7 count net@273 inv-X_30
+Xinv@8 load net@275 inv-X_30
+Xinv@9 ilc[done] bitt[7] inv-X_10
+XlatchZ10@0 gnd kill load[F] load[T] inLO[8] mc net@317 latchZ10@0_out[T] 
++latchZ10
+Xnor2n_sy@1 net@318 zeroLO ilc[done] nor2n_sy-X_20
+XringB@0 bit[4] count[F] count[T] do[4] inLO[4] load[F] load[T] ringB
+XringB@1 bit[2] count[F] count[T] do[2] inLO[2] load[F] load[T] ringB
+XringB@2 bit[6] count[F] count[T] do[6] inLO[6] load[F] load[T] ringB
+Xwire90@6 net@269 load[T] wire90-1350_3-layer_1-width_3
+Xwire90@7 net@271 count[T] wire90-985_7-layer_1-width_3
+Xwire90@8 net@273 count[F] wire90-1915_8-layer_1-width_3
+Xwire90@9 net@275 load[F] wire90-1810_4-layer_1-width_3
+Xwire90@11 net@318 net@317 wire90-520_8-layer_1-width_3
+.ENDS ilcEven
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1278-R_34_667m a b
+Ccap@0 gnd net@14 4.686f
+Ccap@1 gnd net@8 4.686f
+Ccap@2 gnd net@11 4.686f
+Rres@0 net@14 a 7.384
+Rres@1 net@11 net@14 14.768
+Rres@2 b net@8 7.384
+Rres@3 net@8 net@11 14.768
+.ENDS wire-C_0_011f-1278-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1278-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1278-R_34_667m
+.ENDS wire90-1278-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2344-R_34_667m a b
+Ccap@0 gnd net@14 8.595f
+Ccap@1 gnd net@8 8.595f
+Ccap@2 gnd net@11 8.595f
+Rres@0 net@14 a 13.543
+Rres@1 net@11 net@14 27.086
+Rres@2 b net@8 13.543
+Rres@3 net@8 net@11 27.086
+.ENDS wire-C_0_011f-2344-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2344-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2344-R_34_667m
+.ENDS wire90-2344-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-285_1-R_34_667m a b
+Ccap@0 gnd net@14 1.045f
+Ccap@1 gnd net@8 1.045f
+Ccap@2 gnd net@11 1.045f
+Rres@0 net@14 a 1.647
+Rres@1 net@11 net@14 3.294
+Rres@2 b net@8 1.647
+Rres@3 net@8 net@11 3.294
+.ENDS wire-C_0_011f-285_1-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-285_1-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-285_1-R_34_667m
+.ENDS wire90-285_1-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-556_6-R_34_667m a b
+Ccap@0 gnd net@14 2.041f
+Ccap@1 gnd net@8 2.041f
+Ccap@2 gnd net@11 2.041f
+Rres@0 net@14 a 3.216
+Rres@1 net@11 net@14 6.432
+Rres@2 b net@8 3.216
+Rres@3 net@8 net@11 6.432
+.ENDS wire-C_0_011f-556_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-556_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-556_6-R_34_667m
+.ENDS wire90-556_6-layer_1-width_3
+
+*** CELL: loopCountL:ilcOdd{sch}
+.SUBCKT ilcOdd bit[1] bit[3] bit[5] count do[3] do[5] do[7] inLO[1] inLO[3] 
++inLO[5] inLO[7] kill load mc zeroLO
+Xinv@3 load[F] net@269 inv-X_30
+Xinv@4 count[F] net@271 inv-X_30
+Xinv@5 count net@273 inv-X_30
+Xinv@6 load net@275 inv-X_30
+XlatchZ10@0 kill net@369 load[F] load[T] inLO[7] mc zeroLO latchZ10@0_out[T] 
++latchZ10
+Xmlat1in5@0 count[T] count[F] do[7] net@376 mlat1in5i
+Xnor2n@0 net@378 count[F] net@372 nor2n-X_10
+XringB@0 bit[5] count[F] count[T] do[5] inLO[5] load[F] load[T] ringB
+XringB@1 bit[3] count[F] count[T] do[3] inLO[3] load[F] load[T] ringB
+XringB@2 bit[1] count[F] count[T] vdd inLO[1] load[F] load[T] ringB
+Xwire90@2 net@269 load[T] wire90-1350_3-layer_1-width_3
+Xwire90@3 net@271 count[T] wire90-1278-layer_1-width_3
+Xwire90@4 net@273 count[F] wire90-2344-layer_1-width_3
+Xwire90@5 net@275 load[F] wire90-1810_4-layer_1-width_3
+Xwire90@10 net@369 net@372 wire90-285_1-layer_1-width_3
+Xwire90@11 net@376 net@378 wire90-556_6-layer_1-width_3
+.ENDS ilcOdd
+
+*** CELL: orangeTSMC090nm:PMOSx{sch}
+.SUBCKT PMOSx-X_6_667 d g s
+MPMOSf@0 d g s vdd pch W='40.002*(1+ABP/sqrt(40.002*2))' L='2'  
++DELVTO='AVT0P/sqrt(40.002*2)'
+.ENDS PMOSx-X_6_667
+
+*** CELL: orangeTSMC090nm:NMOSx{sch}
+.SUBCKT NMOSx-X_20_001 d g s
+MNMOSf@0 d g s gnd nch W='60.003*(1+ABN/sqrt(60.003*2))' L='2' 
++DELVTO='AVT0N/sqrt(60.003*2)'
+.ENDS NMOSx-X_20_001
+
+*** CELL: redFour:nms3{sch}
+.SUBCKT nms3-X_6_667 d g g2 g3
+XNMOS@0 d g3 net@6 NMOSx-X_20_001
+XNMOS@1 net@7 g gnd NMOSx-X_20_001
+XNMOS@2 net@6 g2 net@7 NMOSx-X_20_001
+.ENDS nms3-X_6_667
+
+*** CELL: redFour:nand3{sch}
+.SUBCKT nand3-X_6_667 ina inb inc out
+XPMOS@0 out inc vdd PMOSx-X_6_667
+XPMOS@1 out inb vdd PMOSx-X_6_667
+XPMOS@2 out ina vdd PMOSx-X_6_667
+Xnms3@0 out ina inb inc nms3-X_6_667
+.ENDS nand3-X_6_667
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-549_2-R_34_667m a b
+Ccap@0 gnd net@14 2.014f
+Ccap@1 gnd net@8 2.014f
+Ccap@2 gnd net@11 2.014f
+Rres@0 net@14 a 3.173
+Rres@1 net@11 net@14 6.346
+Rres@2 b net@8 3.173
+Rres@3 net@8 net@11 6.346
+.ENDS wire-C_0_011f-549_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-549_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-549_2-R_34_667m
+.ENDS wire90-549_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-703_8-R_34_667m a b
+Ccap@0 gnd net@14 2.581f
+Ccap@1 gnd net@8 2.581f
+Ccap@2 gnd net@11 2.581f
+Rres@0 net@14 a 4.066
+Rres@1 net@11 net@14 8.133
+Rres@2 b net@8 4.066
+Rres@3 net@8 net@11 8.133
+.ENDS wire-C_0_011f-703_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-703_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-703_8-R_34_667m
+.ENDS wire90-703_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-543_6-R_34_667m a b
+Ccap@0 gnd net@14 1.993f
+Ccap@1 gnd net@8 1.993f
+Ccap@2 gnd net@11 1.993f
+Rres@0 net@14 a 3.141
+Rres@1 net@11 net@14 6.282
+Rres@2 b net@8 3.141
+Rres@3 net@8 net@11 6.282
+.ENDS wire-C_0_011f-543_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-543_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-543_6-R_34_667m
+.ENDS wire90-543_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-645_3-R_34_667m a b
+Ccap@0 gnd net@14 2.366f
+Ccap@1 gnd net@8 2.366f
+Ccap@2 gnd net@11 2.366f
+Rres@0 net@14 a 3.728
+Rres@1 net@11 net@14 7.457
+Rres@2 b net@8 3.728
+Rres@3 net@8 net@11 7.457
+.ENDS wire-C_0_011f-645_3-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-645_3-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-645_3-R_34_667m
+.ENDS wire90-645_3-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-378_8-R_34_667m a b
+Ccap@0 gnd net@14 1.389f
+Ccap@1 gnd net@8 1.389f
+Ccap@2 gnd net@11 1.389f
+Rres@0 net@14 a 2.189
+Rres@1 net@11 net@14 4.377
+Rres@2 b net@8 2.189
+Rres@3 net@8 net@11 4.377
+.ENDS wire-C_0_011f-378_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-378_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-378_8-R_34_667m
+.ENDS wire90-378_8-layer_1-width_3
+
+*** CELL: loopCountL:countLogic{sch}
+.SUBCKT countLogic bit[1] bit[2] bit[3] bit[4] bit[5] bit[6] do[2] do[3] 
++do[4] do[5] do[6] do[7]
+Xinv@0 net@257 do[2] inv-X_10
+Xinv@1 bit[2] net@128 inv-X_10
+Xinv@2 bit[1] net@257 inv-X_10
+Xnand2@0 bit[3] bit[1] net@145 nand2-X_10
+Xnand2@1 bit[4] bit[2] net@195 nand2-X_10
+Xnand2@2 bit[3] bit[5] net@315 nand2-X_10
+Xnand3@0 bit[5] bit[3] bit[1] net@264 nand3-X_6_667
+Xnand3@1 bit[6] bit[4] bit[2] net@198 nand3-X_6_667
+Xnor2n@1 net@128 net@257 do[3] nor2n-X_10
+Xnor2n@2 net@145 net@146 do[4] nor2n-X_10
+Xnor2n@3 net@195 net@58 do[5] nor2n-X_10
+Xnor2n@4 net@221 net@56 do[6] nor2n-X_10
+Xnor2n@5 net@289 net@267 do[7] nor2n-X_10
+Xwire90@0 net@264 net@221 wire90-549_2-layer_1-width_3
+Xwire90@1 net@58 net@145 wire90-703_8-layer_1-width_3
+Xwire90@3 net@56 net@195 wire90-703_8-layer_1-width_3
+Xwire90@5 net@198 net@289 wire90-543_6-layer_1-width_3
+Xwire90@6 net@146 net@128 wire90-645_3-layer_1-width_3
+Xwire90@8 net@267 net@315 wire90-378_8-layer_1-width_3
+.ENDS countLogic
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-374_2-R_34_667m a b
+Ccap@0 gnd net@14 1.372f
+Ccap@1 gnd net@8 1.372f
+Ccap@2 gnd net@11 1.372f
+Rres@0 net@14 a 2.162
+Rres@1 net@11 net@14 4.324
+Rres@2 b net@8 2.162
+Rres@3 net@8 net@11 4.324
+.ENDS wire-C_0_011f-374_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-374_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-374_2-R_34_667m
+.ENDS wire90-374_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-464_8-R_34_667m a b
+Ccap@0 gnd net@14 1.704f
+Ccap@1 gnd net@8 1.704f
+Ccap@2 gnd net@11 1.704f
+Rres@0 net@14 a 2.686
+Rres@1 net@11 net@14 5.371
+Rres@2 b net@8 2.686
+Rres@3 net@8 net@11 5.371
+.ENDS wire-C_0_011f-464_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-464_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-464_8-R_34_667m
+.ENDS wire90-464_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-398_8-R_34_667m a b
+Ccap@0 gnd net@14 1.462f
+Ccap@1 gnd net@8 1.462f
+Ccap@2 gnd net@11 1.462f
+Rres@0 net@14 a 2.304
+Rres@1 net@11 net@14 4.608
+Rres@2 b net@8 2.304
+Rres@3 net@8 net@11 4.608
+.ENDS wire-C_0_011f-398_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-398_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-398_8-R_34_667m
+.ENDS wire90-398_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-474_8-R_34_667m a b
+Ccap@0 gnd net@14 1.741f
+Ccap@1 gnd net@8 1.741f
+Ccap@2 gnd net@11 1.741f
+Rres@0 net@14 a 2.743
+Rres@1 net@11 net@14 5.487
+Rres@2 b net@8 2.743
+Rres@3 net@8 net@11 5.487
+.ENDS wire-C_0_011f-474_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-474_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-474_8-R_34_667m
+.ENDS wire90-474_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-383_8-R_34_667m a b
+Ccap@0 gnd net@14 1.407f
+Ccap@1 gnd net@8 1.407f
+Ccap@2 gnd net@11 1.407f
+Rres@0 net@14 a 2.218
+Rres@1 net@11 net@14 4.435
+Rres@2 b net@8 2.218
+Rres@3 net@8 net@11 4.435
+.ENDS wire-C_0_011f-383_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-383_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-383_8-R_34_667m
+.ENDS wire90-383_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-399_8-R_34_667m a b
+Ccap@0 gnd net@14 1.466f
+Ccap@1 gnd net@8 1.466f
+Ccap@2 gnd net@11 1.466f
+Rres@0 net@14 a 2.31
+Rres@1 net@11 net@14 4.62
+Rres@2 b net@8 2.31
+Rres@3 net@8 net@11 4.62
+.ENDS wire-C_0_011f-399_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-399_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-399_8-R_34_667m
+.ENDS wire90-399_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-975_7-R_34_667m a b
+Ccap@0 gnd net@14 3.578f
+Ccap@1 gnd net@8 3.578f
+Ccap@2 gnd net@11 3.578f
+Rres@0 net@14 a 5.637
+Rres@1 net@11 net@14 11.275
+Rres@2 b net@8 5.637
+Rres@3 net@8 net@11 11.275
+.ENDS wire-C_0_011f-975_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-975_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-975_7-R_34_667m
+.ENDS wire90-975_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1009_4-R_34_667m a b
+Ccap@0 gnd net@14 3.701f
+Ccap@1 gnd net@8 3.701f
+Ccap@2 gnd net@11 3.701f
+Rres@0 net@14 a 5.832
+Rres@1 net@11 net@14 11.664
+Rres@2 b net@8 5.832
+Rres@3 net@8 net@11 11.664
+.ENDS wire-C_0_011f-1009_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1009_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1009_4-R_34_667m
+.ENDS wire90-1009_4-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-905_8-R_34_667m a b
+Ccap@0 gnd net@14 3.321f
+Ccap@1 gnd net@8 3.321f
+Ccap@2 gnd net@11 3.321f
+Rres@0 net@14 a 5.234
+Rres@1 net@11 net@14 10.467
+Rres@2 b net@8 5.234
+Rres@3 net@8 net@11 10.467
+.ENDS wire-C_0_011f-905_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-905_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-905_8-R_34_667m
+.ENDS wire90-905_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-758_3-R_34_667m a b
+Ccap@0 gnd net@14 2.78f
+Ccap@1 gnd net@8 2.78f
+Ccap@2 gnd net@11 2.78f
+Rres@0 net@14 a 4.381
+Rres@1 net@11 net@14 8.763
+Rres@2 b net@8 4.381
+Rres@3 net@8 net@11 8.763
+.ENDS wire-C_0_011f-758_3-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-758_3-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-758_3-R_34_667m
+.ENDS wire90-758_3-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-643_7-R_34_667m a b
+Ccap@0 gnd net@14 2.36f
+Ccap@1 gnd net@8 2.36f
+Ccap@2 gnd net@11 2.36f
+Rres@0 net@14 a 3.719
+Rres@1 net@11 net@14 7.438
+Rres@2 b net@8 3.719
+Rres@3 net@8 net@11 7.438
+.ENDS wire-C_0_011f-643_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-643_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-643_7-R_34_667m
+.ENDS wire90-643_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-561_7-R_34_667m a b
+Ccap@0 gnd net@14 2.06f
+Ccap@1 gnd net@8 2.06f
+Ccap@2 gnd net@11 2.06f
+Rres@0 net@14 a 3.245
+Rres@1 net@11 net@14 6.491
+Rres@2 b net@8 3.245
+Rres@3 net@8 net@11 6.491
+.ENDS wire-C_0_011f-561_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-561_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-561_7-R_34_667m
+.ENDS wire90-561_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-898_9-R_34_667m a b
+Ccap@0 gnd net@14 3.296f
+Ccap@1 gnd net@8 3.296f
+Ccap@2 gnd net@11 3.296f
+Rres@0 net@14 a 5.194
+Rres@1 net@11 net@14 10.387
+Rres@2 b net@8 5.194
+Rres@3 net@8 net@11 10.387
+.ENDS wire-C_0_011f-898_9-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-898_9-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-898_9-R_34_667m
+.ENDS wire90-898_9-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-902_4-R_34_667m a b
+Ccap@0 gnd net@14 3.309f
+Ccap@1 gnd net@8 3.309f
+Ccap@2 gnd net@11 3.309f
+Rres@0 net@14 a 5.214
+Rres@1 net@11 net@14 10.428
+Rres@2 b net@8 5.214
+Rres@3 net@8 net@11 10.428
+.ENDS wire-C_0_011f-902_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-902_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-902_4-R_34_667m
+.ENDS wire90-902_4-layer_1-width_3
+
+*** CELL: loopCountL:ilc{sch}
+.SUBCKT ilc bitt[1] bitt[2] bitt[3] bitt[4] bitt[5] bitt[6] bitt[7] ilc[cnt] 
++ilc[done] ilc[load] inLO[1] inLO[2] inLO[3] inLO[4] inLO[5] inLO[6] inLO[7] 
++inLO[8] kill mc
+XilcEven@0 bitt[2] bitt[4] bitt[6] bitt[7] ilc[cnt] do[2] do[4] do[6] 
++ilc[done] inLO[2] inLO[4] inLO[6] inLO[8] kill net@109 mc bit[7] ilcEven
+XilcOdd@0 bitt[1] bitt[3] bitt[5] ilc[cnt] do[3] do[5] do[7] inLO[1] inLO[3] 
++inLO[5] inLO[7] kill net@109 mc bit[7] ilcOdd
+Xinv@4 ilc[load] net@304 inv-X_30
+XolcCente@0 bitt[1] bitt[2] bitt[3] bitt[4] bitt[5] bitt[6] do[2] do[3] do[4] 
++do[5] do[6] do[7] countLogic
+Xwire90@1 wire90@1_a do[2] wire90-374_2-layer_1-width_3
+Xwire90@2 wire90@2_a do[3] wire90-464_8-layer_1-width_3
+Xwire90@3 wire90@3_a do[4] wire90-398_8-layer_1-width_3
+Xwire90@4 wire90@4_a do[5] wire90-474_8-layer_1-width_3
+Xwire90@5 wire90@5_a do[6] wire90-383_8-layer_1-width_3
+Xwire90@6 wire90@6_a do[7] wire90-399_8-layer_1-width_3
+Xwire90@7 wire90@7_a bitt[1] wire90-975_7-layer_1-width_3
+Xwire90@8 wire90@8_a bitt[2] wire90-1009_4-layer_1-width_3
+Xwire90@9 wire90@9_a bitt[3] wire90-905_8-layer_1-width_3
+Xwire90@10 wire90@10_a bitt[4] wire90-758_3-layer_1-width_3
+Xwire90@11 wire90@11_a bitt[5] wire90-643_7-layer_1-width_3
+Xwire90@12 wire90@12_a bitt[6] wire90-561_7-layer_1-width_3
+Xwire90@35 net@109 net@304 wire90-898_9-layer_1-width_3
+Xwire90@36 wire90@36_a bit[7] wire90-902_4-layer_1-width_3
+.ENDS ilc
+
+*** CELL: redFour:triInv{sch}
+.SUBCKT triInv-X_10 en enB in out
+Xnms2@0 out in en nms2-X_10
+Xpms2@0 out in enB pms2-X_10
+.ENDS triInv-X_10
+
+*** CELL: gatesK:mux10{sch}
+.SUBCKT mux10 inA[1] inB[1] out[1] s[F] s[T]
+XtriInv@0 s[T] s[F] inA[1] out[1] triInv-X_10
+XtriInv@1 s[F] s[T] inB[1] out[1] triInv-X_10
+.ENDS mux10
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1400_9-R_34_667m a b
+Ccap@0 gnd net@14 5.137f
+Ccap@1 gnd net@8 5.137f
+Ccap@2 gnd net@11 5.137f
+Rres@0 net@14 a 8.094
+Rres@1 net@11 net@14 16.188
+Rres@2 b net@8 8.094
+Rres@3 net@8 net@11 16.188
+.ENDS wire-C_0_011f-1400_9-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1400_9-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1400_9-R_34_667m
+.ENDS wire90-1400_9-layer_1-width_3
+
+*** CELL: loopCountL:inMux{sch}
+.SUBCKT inMux inA[1] inA[2] inA[3] inA[4] inA[5] inA[6] inB[1] inB[2] inB[3] 
++inB[4] inB[5] inB[6] inB[8] out[1] out[2] out[3] out[4] out[5] out[6] out[7] 
++out[8] sel[A]
+Xinv@0 sel[A] net@10 inv-X_20
+Xinv@1 s[F] net@12 inv-X_20
+Xmux[1] inA[1] inB[1] out[1] s[F] s[T] mux10
+Xmux[2] inA[2] inB[2] out[2] s[F] s[T] mux10
+Xmux[3] inA[3] inB[3] out[3] s[F] s[T] mux10
+Xmux[4] inA[4] inB[4] out[4] s[F] s[T] mux10
+Xmux[5] inA[5] inB[5] out[5] s[F] s[T] mux10
+Xmux[6] inA[6] inB[6] out[6] s[F] s[T] mux10
+Xmux[8] gnd inB[8] out[8] s[F] s[T] mux10
+Xnand3@1 out[1] out[2] out[5] net@25 nand3-X_6_667
+Xnand3@2 out[3] out[4] out[6] net@24 nand3-X_6_667
+Xnor2n_sy@0 net@18 net@20 out[7] nor2n_sy-X_10
+Xwire90@0 net@10 s[F] wire90-1400_9-layer_1-width_3
+Xwire90@1 net@12 s[T] wire90-1400_9-layer_1-width_3
+Xwire90@2 net@24 net@20 wire90-1400_9-layer_1-width_3
+Xwire90@3 net@18 net@25 wire90-1400_9-layer_1-width_3
+.ENDS inMux
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-836_8-R_34_667m a b
+Ccap@0 gnd net@14 3.068f
+Ccap@1 gnd net@8 3.068f
+Ccap@2 gnd net@11 3.068f
+Rres@0 net@14 a 4.835
+Rres@1 net@11 net@14 9.67
+Rres@2 b net@8 4.835
+Rres@3 net@8 net@11 9.67
+.ENDS wire-C_0_011f-836_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-836_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-836_8-R_34_667m
+.ENDS wire90-836_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1053_4-R_34_667m a b
+Ccap@0 gnd net@14 3.862f
+Ccap@1 gnd net@8 3.862f
+Ccap@2 gnd net@11 3.862f
+Rres@0 net@14 a 6.086
+Rres@1 net@11 net@14 12.173
+Rres@2 b net@8 6.086
+Rres@3 net@8 net@11 12.173
+.ENDS wire-C_0_011f-1053_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1053_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1053_4-R_34_667m
+.ENDS wire90-1053_4-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1764_4-R_34_667m a b
+Ccap@0 gnd net@14 6.469f
+Ccap@1 gnd net@8 6.469f
+Ccap@2 gnd net@11 6.469f
+Rres@0 net@14 a 10.194
+Rres@1 net@11 net@14 20.389
+Rres@2 b net@8 10.194
+Rres@3 net@8 net@11 20.389
+.ENDS wire-C_0_011f-1764_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1764_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1764_4-R_34_667m
+.ENDS wire90-1764_4-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1373_4-R_34_667m a b
+Ccap@0 gnd net@14 5.036f
+Ccap@1 gnd net@8 5.036f
+Ccap@2 gnd net@11 5.036f
+Rres@0 net@14 a 7.935
+Rres@1 net@11 net@14 15.87
+Rres@2 b net@8 7.935
+Rres@3 net@8 net@11 15.87
+.ENDS wire-C_0_011f-1373_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1373_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1373_4-R_34_667m
+.ENDS wire90-1373_4-layer_1-width_3
+
+*** CELL: loopCountL:olcEven{sch}
+.SUBCKT olcEven bit[2] bit[4] bit[6] count[2] do[2] do[4] do[6] inLO[2] 
++inLO[4] inLO[6] load[2]
+Xinv@0 count[F] net@196 inv-X_20
+Xinv@1 load[F] net@207 inv-X_20
+Xinv@2 count[2] net@210 inv-X_30
+Xinv@3 load[2] net@211 inv-X_30
+XringB@0 bit[4] count[F] count[T] do[4] inLO[4] load[F] load[T] ringB
+XringB@1 bit[2] count[F] count[T] do[2] inLO[2] load[F] load[T] ringB
+XringB@2 bit[6] count[F] count[T] do[6] inLO[6] load[F] load[T] ringB
+Xwire90@1 net@196 count[T] wire90-836_8-layer_1-width_3
+Xwire90@2 net@207 load[T] wire90-1053_4-layer_1-width_3
+Xwire90@3 net@210 count[F] wire90-1764_4-layer_1-width_3
+Xwire90@4 net@211 load[F] wire90-1373_4-layer_1-width_3
+.ENDS olcEven
+
+*** CELL: loopCountL:olcOdd{sch}
+.SUBCKT olcOdd bit[1] bit[3] bit[5] count[1] do[3] do[5] inLO[1] inLO[3] 
++inLO[5] load[1]
+Xinv@0 count[F] net@299 inv-X_20
+Xinv@1 load[F] net@300 inv-X_20
+Xinv@2 load[1] net@307 inv-X_30
+Xinv@3 count[1] net@310 inv-X_30
+XringB@0 bit[5] count[F] count[T] do[5] inLO[5] load[F] load[T] ringB
+XringB@1 bit[3] count[F] count[T] do[3] inLO[3] load[F] load[T] ringB
+XringB@2 bit[1] count[F] count[T] vdd inLO[1] load[F] load[T] ringB
+Xwire90@0 net@299 count[T] wire90-836_8-layer_1-width_3
+Xwire90@1 net@300 load[T] wire90-1053_4-layer_1-width_3
+Xwire90@2 net@307 load[F] wire90-1373_4-layer_1-width_3
+Xwire90@3 net@310 count[F] wire90-1764_4-layer_1-width_3
+.ENDS olcOdd
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-538_8-R_34_667m a b
+Ccap@0 gnd net@14 1.976f
+Ccap@1 gnd net@8 1.976f
+Ccap@2 gnd net@11 1.976f
+Rres@0 net@14 a 3.113
+Rres@1 net@11 net@14 6.226
+Rres@2 b net@8 3.113
+Rres@3 net@8 net@11 6.226
+.ENDS wire-C_0_011f-538_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-538_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-538_8-R_34_667m
+.ENDS wire90-538_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-472_8-R_34_667m a b
+Ccap@0 gnd net@14 1.734f
+Ccap@1 gnd net@8 1.734f
+Ccap@2 gnd net@11 1.734f
+Rres@0 net@14 a 2.732
+Rres@1 net@11 net@14 5.463
+Rres@2 b net@8 2.732
+Rres@3 net@8 net@11 5.463
+.ENDS wire-C_0_011f-472_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-472_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-472_8-R_34_667m
+.ENDS wire90-472_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-548_8-R_34_667m a b
+Ccap@0 gnd net@14 2.012f
+Ccap@1 gnd net@8 2.012f
+Ccap@2 gnd net@11 2.012f
+Rres@0 net@14 a 3.171
+Rres@1 net@11 net@14 6.342
+Rres@2 b net@8 3.171
+Rres@3 net@8 net@11 6.342
+.ENDS wire-C_0_011f-548_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-548_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-548_8-R_34_667m
+.ENDS wire90-548_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-457_8-R_34_667m a b
+Ccap@0 gnd net@14 1.679f
+Ccap@1 gnd net@8 1.679f
+Ccap@2 gnd net@11 1.679f
+Rres@0 net@14 a 2.645
+Rres@1 net@11 net@14 5.29
+Rres@2 b net@8 2.645
+Rres@3 net@8 net@11 5.29
+.ENDS wire-C_0_011f-457_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-457_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-457_8-R_34_667m
+.ENDS wire90-457_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1049_7-R_34_667m a b
+Ccap@0 gnd net@14 3.849f
+Ccap@1 gnd net@8 3.849f
+Ccap@2 gnd net@11 3.849f
+Rres@0 net@14 a 6.065
+Rres@1 net@11 net@14 12.13
+Rres@2 b net@8 6.065
+Rres@3 net@8 net@11 12.13
+.ENDS wire-C_0_011f-1049_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1049_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1049_7-R_34_667m
+.ENDS wire90-1049_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1049_4-R_34_667m a b
+Ccap@0 gnd net@14 3.848f
+Ccap@1 gnd net@8 3.848f
+Ccap@2 gnd net@11 3.848f
+Rres@0 net@14 a 6.063
+Rres@1 net@11 net@14 12.126
+Rres@2 b net@8 6.063
+Rres@3 net@8 net@11 12.126
+.ENDS wire-C_0_011f-1049_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1049_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1049_4-R_34_667m
+.ENDS wire90-1049_4-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-979_8-R_34_667m a b
+Ccap@0 gnd net@14 3.593f
+Ccap@1 gnd net@8 3.593f
+Ccap@2 gnd net@11 3.593f
+Rres@0 net@14 a 5.661
+Rres@1 net@11 net@14 11.322
+Rres@2 b net@8 5.661
+Rres@3 net@8 net@11 11.322
+.ENDS wire-C_0_011f-979_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-979_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-979_8-R_34_667m
+.ENDS wire90-979_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-786_3-R_34_667m a b
+Ccap@0 gnd net@14 2.883f
+Ccap@1 gnd net@8 2.883f
+Ccap@2 gnd net@11 2.883f
+Rres@0 net@14 a 4.543
+Rres@1 net@11 net@14 9.086
+Rres@2 b net@8 4.543
+Rres@3 net@8 net@11 9.086
+.ENDS wire-C_0_011f-786_3-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-786_3-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-786_3-R_34_667m
+.ENDS wire90-786_3-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-717_7-R_34_667m a b
+Ccap@0 gnd net@14 2.632f
+Ccap@1 gnd net@8 2.632f
+Ccap@2 gnd net@11 2.632f
+Rres@0 net@14 a 4.147
+Rres@1 net@11 net@14 8.293
+Rres@2 b net@8 4.147
+Rres@3 net@8 net@11 8.293
+.ENDS wire-C_0_011f-717_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-717_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-717_7-R_34_667m
+.ENDS wire90-717_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-487_7-R_34_667m a b
+Ccap@0 gnd net@14 1.788f
+Ccap@1 gnd net@8 1.788f
+Ccap@2 gnd net@11 1.788f
+Rres@0 net@14 a 2.818
+Rres@1 net@11 net@14 5.636
+Rres@2 b net@8 2.818
+Rres@3 net@8 net@11 5.636
+.ENDS wire-C_0_011f-487_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-487_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-487_7-R_34_667m
+.ENDS wire90-487_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-426-R_34_667m a b
+Ccap@0 gnd net@14 1.562f
+Ccap@1 gnd net@8 1.562f
+Ccap@2 gnd net@11 1.562f
+Rres@0 net@14 a 2.461
+Rres@1 net@11 net@14 4.923
+Rres@2 b net@8 2.461
+Rres@3 net@8 net@11 4.923
+.ENDS wire-C_0_011f-426-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-426-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-426-R_34_667m
+.ENDS wire90-426-layer_1-width_3
+
+*** CELL: loopCountL:olc{sch}
+.SUBCKT olc bitt[1] bitt[2] bitt[3] bitt[4] bitt[5] bitt[6] doLO[7] inLO[1] 
++inLO[2] inLO[3] inLO[4] inLO[5] inLO[6] olc[dec][1] olc[dec][2] olc[load][1] 
++olc[load][2]
+Xinv@6 net@270 doLO[7] inv-X_20
+XolcCente@1 bitt[1] bitt[2] bitt[3] bitt[4] bitt[5] bitt[6] do[2] do[3] do[4] 
++do[5] do[6] net@271 countLogic
+XolcEven@0 bitt[2] bitt[4] bitt[6] olc[dec][2] do[2] do[4] do[6] inLO[2] 
++inLO[4] inLO[6] olc[load][2] olcEven
+XolcOdd@1 bitt[1] bitt[3] bitt[5] olc[dec][1] do[3] do[5] inLO[1] inLO[3] 
++inLO[5] olc[load][1] olcOdd
+Xwire90@1 wire90@1_a do[2] wire90-374_2-layer_1-width_3
+Xwire90@2 wire90@2_a do[3] wire90-538_8-layer_1-width_3
+Xwire90@3 wire90@3_a do[4] wire90-472_8-layer_1-width_3
+Xwire90@4 wire90@4_a do[5] wire90-548_8-layer_1-width_3
+Xwire90@5 wire90@5_a do[6] wire90-457_8-layer_1-width_3
+Xwire90@7 wire90@7_a bitt[1] wire90-1049_7-layer_1-width_3
+Xwire90@8 wire90@8_a bitt[2] wire90-1049_4-layer_1-width_3
+Xwire90@9 wire90@9_a bitt[3] wire90-979_8-layer_1-width_3
+Xwire90@10 wire90@10_a bitt[4] wire90-786_3-layer_1-width_3
+Xwire90@11 wire90@11_a bitt[5] wire90-717_7-layer_1-width_3
+Xwire90@12 wire90@12_a bitt[6] wire90-487_7-layer_1-width_3
+Xwire90@29 net@270 net@271 wire90-426-layer_1-width_3
+.ENDS olc
+
+*** CELL: scanK:scanKx3{sch}
+.SUBCKT scanKx3 clS[F] clS[T] cl[F] cl[T] din[1] din[2] din[3] mc rd[F] rd[T] 
++sin sout
+XscanCell@4 clS[F] clS[T] cl[F] cl[T] din[1] rd[F] rd[T] sin net@18 
++scanCellKh
+XscanCell@5 clS[F] clS[T] cl[F] cl[T] din[2] rd[F] rd[T] net@31 net@20 
++scanCellKh
+XscanCell@6 clS[F] clS[T] cl[F] cl[T] din[3] rd[F] rd[T] net@32 sout 
++scanCellKh
+Xwire90@0 net@18 net@31 wire90-297_9-layer_1-width_3
+Xwire90@1 net@20 net@32 wire90-297_9-layer_1-width_3
+.ENDS scanKx3
+
+*** CELL: scanK:scanKx6{sch}
+.SUBCKT scanKx6 clS[F] clS[T] cl[F] cl[T] din[1] din[2] din[3] din[4] din[5] 
++din[6] mc rd[F] rd[T] sin sout
+XscanCell@4 clS[F] clS[T] cl[F] cl[T] din[1] rd[F] rd[T] sin net@18 
++scanCellKh
+XscanCell@5 clS[F] clS[T] cl[F] cl[T] din[2] rd[F] rd[T] net@31 net@20 
++scanCellKh
+XscanCell@6 clS[F] clS[T] cl[F] cl[T] din[3] rd[F] rd[T] net@32 net@24 
++scanCellKh
+XscanCell@7 clS[F] clS[T] cl[F] cl[T] din[4] rd[F] rd[T] net@33 net@51 
++scanCellKh
+XscanCell@8 clS[F] clS[T] cl[F] cl[T] din[5] rd[F] rd[T] net@50 net@56 
++scanCellKh
+XscanCell@9 clS[F] clS[T] cl[F] cl[T] din[6] rd[F] rd[T] net@55 sout 
++scanCellKh
+Xwire90@0 net@18 net@31 wire90-297_9-layer_1-width_3
+Xwire90@1 net@20 net@32 wire90-297_9-layer_1-width_3
+Xwire90@2 net@24 net@33 wire90-297_9-layer_1-width_3
+Xwire90@3 net@51 net@50 wire90-297_9-layer_1-width_3
+Xwire90@4 net@56 net@55 wire90-297_9-layer_1-width_3
+.ENDS scanKx6
+
+*** CELL: scanK:scanKx7{sch}
+.SUBCKT scanKx7 clS[F] clS[T] cl[F] cl[T] din[1] din[2] din[3] din[4] din[5] 
++din[6] din[7] mc rd[F] rd[T] sin sout
+XscanCell@4 clS[F] clS[T] cl[F] cl[T] din[1] rd[F] rd[T] sin net@18 
++scanCellKh
+XscanCell@5 clS[F] clS[T] cl[F] cl[T] din[2] rd[F] rd[T] net@31 net@20 
++scanCellKh
+XscanCell@6 clS[F] clS[T] cl[F] cl[T] din[3] rd[F] rd[T] net@32 net@24 
++scanCellKh
+XscanCell@7 clS[F] clS[T] cl[F] cl[T] din[4] rd[F] rd[T] net@33 net@51 
++scanCellKh
+XscanCell@8 clS[F] clS[T] cl[F] cl[T] din[5] rd[F] rd[T] net@50 net@56 
++scanCellKh
+XscanCell@9 clS[F] clS[T] cl[F] cl[T] din[6] rd[F] rd[T] net@55 net@63 
++scanCellKh
+XscanCell@10 clS[F] clS[T] cl[F] cl[T] din[7] rd[F] rd[T] net@61 sout 
++scanCellKh
+Xwire90@0 net@18 net@31 wire90-297_9-layer_1-width_3
+Xwire90@1 net@20 net@32 wire90-297_9-layer_1-width_3
+Xwire90@2 net@24 net@33 wire90-297_9-layer_1-width_3
+Xwire90@3 net@51 net@50 wire90-297_9-layer_1-width_3
+Xwire90@4 net@56 net@55 wire90-297_9-layer_1-width_3
+Xwire90@5 net@63 net@61 wire90-297_9-layer_1-width_3
+.ENDS scanKx7
+
+*** CELL: redFour:pms2{sch}
+.SUBCKT pms2-X_20 d g g2
+XPMOS@0 net@2 g vdd PMOSx-X_40
+XPMOS@1 d g2 net@2 PMOSx-X_40
+.ENDS pms2-X_20
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-99_3-R_34_667m a b
+Ccap@0 gnd net@14 0.364f
+Ccap@1 gnd net@8 0.364f
+Ccap@2 gnd net@11 0.364f
+Rres@0 net@14 a 0.574
+Rres@1 net@11 net@14 1.147
+Rres@2 b net@8 0.574
+Rres@3 net@8 net@11 1.147
+.ENDS wire-C_0_011f-99_3-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-99_3-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-99_3-R_34_667m
+.ENDS wire90-99_3-layer_1-width_3
+
+*** CELL: skipL:latchA20{sch}
+.SUBCKT latchA20 cl[F] cl[T] in[1] mc out[1]
+MNMOSf@1 out[1] net@186 gnd gnd nch W='12*(1+ABN/sqrt(12*3))' L='3' 
++DELVTO='AVT0N/sqrt(12*3)'
+XNMOSx@2 out[1] mc gnd NMOSx-X_10
+XPMOSx@2 out[1] net@193 vdd PMOSx-X_2
+XinvLT@0 out[1] net@186 invLT-X_2
+Xnms2@0 out[1] in[1] cl[T] nms2-X_20
+Xpms2@0 out[1] in[1] cl[F] pms2-X_20
+Xwire90@0 net@186 net@193 wire90-99_3-layer_1-width_3
+.ENDS latchA20
+
+*** CELL: skipL:flagDrivers{sch}
+.SUBCKT flagDrivers flag[A] flag[B] flag[C] in[A] in[B] in[C] loadC[T] 
++loadFlags[F] mc
+Xinv@0 loadFlags[F] net@511 inv-X_20
+Xinv@1 loadC[T] net@540 inv-X_10
+XlatchA20@0 loadFlags[F] loadFlags[T] in[A] mc flag[A] latchA20
+XlatchA20@1 loadFlags[F] loadFlags[T] in[B] mc flag[B] latchA20
+XlatchA20@2 loadC[F] loadC[T] in[C] mc flag[C] latchA20
+Xwire90@0 net@511 loadFlags[T] wire90-99_3-layer_1-width_3
+Xwire90@1 net@540 loadC[F] wire90-99_3-layer_1-width_3
+.ENDS flagDrivers
+
+*** CELL: redFour:triInv{sch}
+.SUBCKT triInv-X_5 en enB in out
+Xnms2@0 out in en nms2-X_5
+Xpms2@0 out in enB pms2-X_5
+.ENDS triInv-X_5
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-183-R_34_667m a b
+Ccap@0 gnd net@14 0.671f
+Ccap@1 gnd net@8 0.671f
+Ccap@2 gnd net@11 0.671f
+Rres@0 net@14 a 1.057
+Rres@1 net@11 net@14 2.115
+Rres@2 b net@8 1.057
+Rres@3 net@8 net@11 2.115
+.ENDS wire-C_0_011f-183-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-183-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-183-R_34_667m
+.ENDS wire90-183-layer_1-width_3
+
+*** CELL: skipL:muxInv{sch}
+.SUBCKT muxInv flag in[1][F] in[1][T] out
+Xinv@3 flag net@119 inv-X_5
+XtriInv@0 net@123 flag in[1][F] out triInv-X_5
+XtriInv@1 flag net@123 in[1][T] out triInv-X_5
+Xwire90@3 net@119 net@123 wire90-183-layer_1-width_3
+.ENDS muxInv
+
+*** CELL: redFour:nms2_sy{sch}
+.SUBCKT nms2_sy-X_6 d g g2
+Xnms2@0 d g g2 nms2-X_3
+Xnms2@1 d g2 g nms2-X_3
+.ENDS nms2_sy-X_6
+
+*** CELL: redFour:nand2_sy{sch}
+.SUBCKT nand2_sy-X_6 ina inb out
+XPMOS@0 out inb vdd PMOSx-X_6
+XPMOS@1 out ina vdd PMOSx-X_6
+Xnms2_sy@0 out ina inb nms2_sy-X_6
+.ENDS nand2_sy-X_6
+
+*** CELL: redFour:nand2n_sy{sch}
+.SUBCKT nand2n_sy-X_6 ina inb out
+Xnand2_sy@0 ina inb out nand2_sy-X_6
+.ENDS nand2n_sy-X_6
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-239_6-R_34_667m a b
+Ccap@0 gnd net@14 0.879f
+Ccap@1 gnd net@8 0.879f
+Ccap@2 gnd net@11 0.879f
+Rres@0 net@14 a 1.384
+Rres@1 net@11 net@14 2.769
+Rres@2 b net@8 1.384
+Rres@3 net@8 net@11 2.769
+.ENDS wire-C_0_011f-239_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-239_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-239_6-R_34_667m
+.ENDS wire90-239_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-321_6-R_34_667m a b
+Ccap@0 gnd net@14 1.179f
+Ccap@1 gnd net@8 1.179f
+Ccap@2 gnd net@11 1.179f
+Rres@0 net@14 a 1.858
+Rres@1 net@11 net@14 3.716
+Rres@2 b net@8 1.858
+Rres@3 net@8 net@11 3.716
+.ENDS wire-C_0_011f-321_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-321_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-321_6-R_34_667m
+.ENDS wire90-321_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-345-R_34_667m a b
+Ccap@0 gnd net@14 1.265f
+Ccap@1 gnd net@8 1.265f
+Ccap@2 gnd net@11 1.265f
+Rres@0 net@14 a 1.993
+Rres@1 net@11 net@14 3.987
+Rres@2 b net@8 1.993
+Rres@3 net@8 net@11 3.987
+.ENDS wire-C_0_011f-345-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-345-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-345-R_34_667m
+.ENDS wire90-345-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-883_7-R_34_667m a b
+Ccap@0 gnd net@14 3.24f
+Ccap@1 gnd net@8 3.24f
+Ccap@2 gnd net@11 3.24f
+Rres@0 net@14 a 5.106
+Rres@1 net@11 net@14 10.212
+Rres@2 b net@8 5.106
+Rres@3 net@8 net@11 10.212
+.ENDS wire-C_0_011f-883_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-883_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-883_7-R_34_667m
+.ENDS wire90-883_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1192-R_34_667m a b
+Ccap@0 gnd net@14 4.371f
+Ccap@1 gnd net@8 4.371f
+Ccap@2 gnd net@11 4.371f
+Rres@0 net@14 a 6.887
+Rres@1 net@11 net@14 13.774
+Rres@2 b net@8 6.887
+Rres@3 net@8 net@11 13.774
+.ENDS wire-C_0_011f-1192-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1192-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1192-R_34_667m
+.ENDS wire90-1192-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1256-R_34_667m a b
+Ccap@0 gnd net@14 4.605f
+Ccap@1 gnd net@8 4.605f
+Ccap@2 gnd net@11 4.605f
+Rres@0 net@14 a 7.257
+Rres@1 net@11 net@14 14.514
+Rres@2 b net@8 7.257
+Rres@3 net@8 net@11 14.514
+.ENDS wire-C_0_011f-1256-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1256-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1256-R_34_667m
+.ENDS wire90-1256-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1068_8-R_34_667m a b
+Ccap@0 gnd net@14 3.919f
+Ccap@1 gnd net@8 3.919f
+Ccap@2 gnd net@11 3.919f
+Rres@0 net@14 a 6.175
+Rres@1 net@11 net@14 12.351
+Rres@2 b net@8 6.175
+Rres@3 net@8 net@11 12.351
+.ENDS wire-C_0_011f-1068_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1068_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1068_8-R_34_667m
+.ENDS wire90-1068_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-839_7-R_34_667m a b
+Ccap@0 gnd net@14 3.079f
+Ccap@1 gnd net@8 3.079f
+Ccap@2 gnd net@11 3.079f
+Rres@0 net@14 a 4.852
+Rres@1 net@11 net@14 9.703
+Rres@2 b net@8 4.852
+Rres@3 net@8 net@11 9.703
+.ENDS wire-C_0_011f-839_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-839_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-839_7-R_34_667m
+.ENDS wire90-839_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-247_7-R_34_667m a b
+Ccap@0 gnd net@14 0.908f
+Ccap@1 gnd net@8 0.908f
+Ccap@2 gnd net@11 0.908f
+Rres@0 net@14 a 1.431
+Rres@1 net@11 net@14 2.862
+Rres@2 b net@8 1.431
+Rres@3 net@8 net@11 2.862
+.ENDS wire-C_0_011f-247_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-247_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-247_7-R_34_667m
+.ENDS wire90-247_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-245_7-R_34_667m a b
+Ccap@0 gnd net@14 0.901f
+Ccap@1 gnd net@8 0.901f
+Ccap@2 gnd net@11 0.901f
+Rres@0 net@14 a 1.42
+Rres@1 net@11 net@14 2.839
+Rres@2 b net@8 1.42
+Rres@3 net@8 net@11 2.839
+.ENDS wire-C_0_011f-245_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-245_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-245_7-R_34_667m
+.ENDS wire90-245_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-216_4-R_37_143m a b
+Ccap@0 gnd net@14 0.793f
+Ccap@1 gnd net@8 0.793f
+Ccap@2 gnd net@11 0.793f
+Rres@0 net@14 a 1.34
+Rres@1 net@11 net@14 2.679
+Rres@2 b net@8 1.34
+Rres@3 net@8 net@11 2.679
+.ENDS wire-C_0_011f-216_4-R_37_143m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-216_4-layer_1-width_2_8 a b
+Xwire@0 a b wire-C_0_011f-216_4-R_37_143m
+.ENDS wire90-216_4-layer_1-width_2_8
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-505_7-R_34_667m a b
+Ccap@0 gnd net@14 1.854f
+Ccap@1 gnd net@8 1.854f
+Ccap@2 gnd net@11 1.854f
+Rres@0 net@14 a 2.922
+Rres@1 net@11 net@14 5.844
+Rres@2 b net@8 2.922
+Rres@3 net@8 net@11 5.844
+.ENDS wire-C_0_011f-505_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-505_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-505_7-R_34_667m
+.ENDS wire90-505_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-353_6-R_34_667m a b
+Ccap@0 gnd net@14 1.297f
+Ccap@1 gnd net@8 1.297f
+Ccap@2 gnd net@11 1.297f
+Rres@0 net@14 a 2.043
+Rres@1 net@11 net@14 4.086
+Rres@2 b net@8 2.043
+Rres@3 net@8 net@11 4.086
+.ENDS wire-C_0_011f-353_6-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-353_6-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-353_6-R_34_667m
+.ENDS wire90-353_6-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-313_9-R_34_667m a b
+Ccap@0 gnd net@14 1.151f
+Ccap@1 gnd net@8 1.151f
+Ccap@2 gnd net@11 1.151f
+Rres@0 net@14 a 1.814
+Rres@1 net@11 net@14 3.627
+Rres@2 b net@8 1.814
+Rres@3 net@8 net@11 3.627
+.ENDS wire-C_0_011f-313_9-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-313_9-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-313_9-R_34_667m
+.ENDS wire90-313_9-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-309_5-R_34_667m a b
+Ccap@0 gnd net@14 1.135f
+Ccap@1 gnd net@8 1.135f
+Ccap@2 gnd net@11 1.135f
+Rres@0 net@14 a 1.788
+Rres@1 net@11 net@14 3.576
+Rres@2 b net@8 1.788
+Rres@3 net@8 net@11 3.576
+.ENDS wire-C_0_011f-309_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-309_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-309_5-R_34_667m
+.ENDS wire90-309_5-layer_1-width_3
+
+*** CELL: skipL:array{sch}
+.SUBCKT array doit flag[A] flag[B] flag[C] flag[NZ] in[1][F] in[1][T] 
++in[2][F] in[2][T] in[3][F] in[3][T] in[4][F] in[4][T] in[5][F] in[5][T] 
++in[6][F] in[6][T] in[7][F] in[7][T] in[8][F] in[8][T] in[9][F] in[9][T] in[C] 
++loadC[T] loadFlags[F] m1[F] m1[T] mc
+XflagDriv@0 net@1022 net@1015 net@1007 net@1012 net@1009 in[C] loadC[T] 
++loadFlags[F] mc flagDrivers
+Xinv@3 net@57 net@344 inv-X_10
+Xinv@9 net@352 net@350 inv-X_10
+Xinv@13 net@876 doit inv-X_20
+Xinv@14 net@924 net@925 inv-X_5
+Xinv@15 net@978 net@948 inv-X_5
+Xinv@16 net@977 net@963 inv-X_5
+Xmlat1in5@2 m1[F] m1[T] net@906 net@45 mlat1in5i
+Xmlat1in5@4 m1[F] m1[T] net@927 net@912 mlat1in5i
+Xmlat1in5@5 m1[F] m1[T] net@938 net@937 mlat1in5i
+Xmlat1in5@6 m1[F] m1[T] net@949 net@940 mlat1in5i
+Xmlat1in5@7 m1[F] m1[T] net@953 net@952 mlat1in5i
+Xmlat1in5@8 m1[F] m1[T] net@964 net@955 mlat1in5i
+XmuxInv@24 flag[A] in[1][F] in[1][T] net@711 muxInv
+XmuxInv@25 flag[B] in[2][F] in[2][T] net@722 muxInv
+XmuxInv@26 flag[C] in[3][F] in[3][T] net@733 muxInv
+XmuxInv@27 flag[A] in[4][F] in[4][T] net@744 muxInv
+XmuxInv@28 flag[B] in[5][F] in[5][T] net@755 muxInv
+XmuxInv@29 flag[C] in[6][F] in[6][T] net@766 muxInv
+XmuxInv@30 flag[A] in[7][F] in[7][T] net@777 muxInv
+XmuxInv@31 flag[B] in[8][F] in[8][T] net@788 muxInv
+XmuxInv@32 flag[NZ] in[9][F] in[9][T] net@799 muxInv
+Xnand2n_s@0 net@895 net@896 net@909 nand2n_sy-X_6
+Xnand2n_s@3 net@913 net@916 pFlag[A] nand2n_sy-X_6
+Xnand2n_s@4 net@973 net@974 net@939 nand2n_sy-X_6
+Xnand2n_s@5 net@941 net@944 pFlag[B] nand2n_sy-X_6
+Xnand2n_s@6 net@971 net@972 net@954 nand2n_sy-X_6
+Xnand2n_s@7 net@956 net@959 net@993 nand2n_sy-X_10
+Xwire90@12 net@925 net@906 wire90-239_6-layer_1-width_3
+Xwire90@13 net@45 net@913 wire90-321_6-layer_1-width_3
+Xwire90@15 net@57 pFlag[B] wire90-345-layer_1-width_3
+Xwire90@17 net@344 net@1009 wire90-883_7-layer_1-width_3
+Xwire90@19 flag[A] net@1022 wire90-1192-layer_1-width_3
+Xwire90@42 flag[B] net@1015 wire90-1256-layer_1-width_3
+Xwire90@43 flag[C] net@1007 wire90-1068_8-layer_1-width_3
+Xwire90@44 net@352 pFlag[A] wire90-345-layer_1-width_3
+Xwire90@45 net@350 net@1012 wire90-839_7-layer_1-width_3
+Xwire90@47 net@711 net@896 wire90-247_7-layer_1-width_3
+Xwire90@50 net@744 net@974 wire90-247_7-layer_1-width_3
+Xwire90@66 net@777 net@972 wire90-247_7-layer_1-width_3
+Xwire90@68 net@722 net@895 wire90-245_7-layer_1-width_3
+Xwire90@69 net@755 net@973 wire90-245_7-layer_1-width_3
+Xwire90@70 net@788 net@971 wire90-245_7-layer_1-width_3
+Xwire90@71 net@733 net@924 wire90-216_4-layer_1-width_2_8
+Xwire90@72 net@766 net@978 wire90-216_4-layer_1-width_2_8
+Xwire90@73 net@799 net@977 wire90-216_4-layer_1-width_2_8
+Xwire90@74 net@993 net@876 wire90-505_7-layer_1-width_3
+Xwire90@75 net@909 net@927 wire90-353_6-layer_1-width_3
+Xwire90@76 net@912 net@916 wire90-321_6-layer_1-width_3
+Xwire90@77 net@948 net@938 wire90-239_6-layer_1-width_3
+Xwire90@78 net@937 net@941 wire90-321_6-layer_1-width_3
+Xwire90@79 net@939 net@949 wire90-353_6-layer_1-width_3
+Xwire90@80 net@940 net@944 wire90-321_6-layer_1-width_3
+Xwire90@81 net@963 net@953 wire90-239_6-layer_1-width_3
+Xwire90@82 net@952 net@956 wire90-313_9-layer_1-width_3
+Xwire90@83 net@954 net@964 wire90-353_6-layer_1-width_3
+Xwire90@84 net@955 net@959 wire90-309_5-layer_1-width_3
+.ENDS array
+
+*** CELL: orangeTSMC090nm:NMOSx{sch}
+.SUBCKT NMOSx-X_80 d g s
+MNMOSf@0 d g s gnd nch W='240*(1+ABN/sqrt(240*2))' L='2' 
++DELVTO='AVT0N/sqrt(240*2)'
+.ENDS NMOSx-X_80
+
+*** CELL: orangeTSMC090nm:PMOSx{sch}
+.SUBCKT PMOSx-X_80 d g s
+MPMOSf@0 d g s vdd pch W='480*(1+ABP/sqrt(480*2))' L='2'  
++DELVTO='AVT0P/sqrt(480*2)'
+.ENDS PMOSx-X_80
+
+*** CELL: redFour:inv{sch}
+.SUBCKT inv-X_80 in out
+XNMOS@0 out in gnd NMOSx-X_80
+XPMOS@0 out in vdd PMOSx-X_80
+.ENDS inv-X_80
+
+*** CELL: redFour:nor2n_sy{sch}
+.SUBCKT nor2n_sy-X_5 ina inb out
+Xnor2@0 ina inb out nor2_sy-X_5
+.ENDS nor2n_sy-X_5
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-262_8-R_34_667m a b
+Ccap@0 gnd net@14 0.964f
+Ccap@1 gnd net@8 0.964f
+Ccap@2 gnd net@11 0.964f
+Rres@0 net@14 a 1.518
+Rres@1 net@11 net@14 3.037
+Rres@2 b net@8 1.518
+Rres@3 net@8 net@11 3.037
+.ENDS wire-C_0_011f-262_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-262_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-262_8-R_34_667m
+.ENDS wire90-262_8-layer_1-width_3
+
+*** CELL: skipL:proposeZero{sch}
+.SUBCKT proposeZero doLO[7] flag[NZ] inLO[7] kill mc olcNZ olc[dec][F] 
++olc[load][F]
+Xinv@1 olc[load][F] net@39 inv-X_10
+XlatchZ10@1 kill net@14 olc[load][F] olc[load][T] inLO[7] mc olcNZ flag[NZ] 
++latchZ10
+Xnor2n_sy@0 olc[dec][F] doLO[7] net@12 nor2n_sy-X_5
+Xwire90@0 olc[load][T] net@39 wire90-262_8-layer_1-width_3
+Xwire90@1 net@12 net@14 wire90-216_3-layer_1-width_3
+.ENDS proposeZero
+
+*** CELL: skipL:skipReg18{sch}
+.SUBCKT skipReg18 c[F] c[T] in[10] in[11] in[12] in[13] in[14] in[15] in[16] 
++in[17] in[18] in[1] in[2] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] 
++out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[1] out[2] 
++out[3] out[4] out[5] out[6] out[7] out[8] out[9]
+Xinv@0 in[1] xx[1] inv-X_10
+Xinv@15 in[2] xx[2] inv-X_10
+Xinv@16 in[3] xx[3] inv-X_10
+Xinv@17 in[4] xx[4] inv-X_10
+Xinv@18 in[5] xx[5] inv-X_10
+Xinv@19 in[6] xx[6] inv-X_10
+Xinv@20 in[7] xx[7] inv-X_10
+Xinv@21 in[8] xx[8] inv-X_10
+Xinv@22 in[9] xx[9] inv-X_10
+Xinv@23 in[10] xx[10] inv-X_10
+Xinv@24 in[11] xx[11] inv-X_10
+Xinv@25 in[12] xx[12] inv-X_10
+Xlat[1] c[F] c[T] xx[1] out[1] mlat1in5i
+Xlat[2] c[F] c[T] xx[2] out[2] mlat1in5i
+Xlat[3] c[F] c[T] xx[3] out[3] mlat1in5i
+Xlat[4] c[F] c[T] xx[4] out[4] mlat1in5i
+Xlat[5] c[F] c[T] xx[5] out[5] mlat1in5i
+Xlat[6] c[F] c[T] xx[6] out[6] mlat1in5i
+Xlat[7] c[F] c[T] xx[7] out[7] mlat1in5i
+Xlat[8] c[F] c[T] xx[8] out[8] mlat1in5i
+Xlat[9] c[F] c[T] xx[9] out[9] mlat1in5i
+Xlat[10] c[F] c[T] xx[10] out[10] mlat1in5i
+Xlat[11] c[F] c[T] xx[11] out[11] mlat1in5i
+Xlat[12] c[F] c[T] xx[12] out[12] mlat1in5i
+Xlat[13] c[F] c[T] in[13] out[13] mlat1in5i
+Xlat[14] c[F] c[T] in[14] out[14] mlat1in5i
+Xlat[15] c[F] c[T] in[15] out[15] mlat1in5i
+Xlat[16] c[F] c[T] in[16] out[16] mlat1in5i
+Xlat[17] c[F] c[T] in[17] out[17] mlat1in5i
+Xlat[18] c[F] c[T] in[18] out[18] mlat1in5i
+.ENDS skipReg18
+
+*** CELL: redFour:invLT{sch}
+.SUBCKT invLT-X_30 in out
+XNMOS@0 out in gnd NMOSx-X_60
+XPMOS@0 out in vdd PMOSx-X_30
+.ENDS invLT-X_30
+
+*** CELL: driversL:sucDri20cond{sch}
+.SUBCKT sucDri20cond cond in succ
+XNMOSx@0 succ in net@160 NMOSx-X_5
+XNMOSx@1 succ cond net@160 NMOSx-X_5
+XNMOSx@2 net@160 net@158 gnd NMOSx-X_10
+Xinv@1 succ net@94 inv-X_5
+Xpms2@0 succ cond in pms2-X_20
+Xwire90@0 net@158 net@94 wire90-124_7-layer_1-width_3
+.ENDS sucDri20cond
+
+*** CELL: skipL:timeDrive20{sch}
+.SUBCKT timeDrive20 inA inB out
+XNMOSx@0 out inB inA NMOSx-X_20
+XPMOSx@0 out inB vdd PMOSx-X_10
+.ENDS timeDrive20
+
+*** CELL: skipL:timeDrive40{sch}
+.SUBCKT timeDrive40 inA inB out
+XNMOSx@0 out inB inA NMOSx-X_40
+XPMOSx@0 out inB vdd PMOSx-X_30
+.ENDS timeDrive40
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-287_2-R_34_667m a b
+Ccap@0 gnd net@14 1.053f
+Ccap@1 gnd net@8 1.053f
+Ccap@2 gnd net@11 1.053f
+Rres@0 net@14 a 1.659
+Rres@1 net@11 net@14 3.319
+Rres@2 b net@8 1.659
+Rres@3 net@8 net@11 3.319
+.ENDS wire-C_0_011f-287_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-287_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-287_2-R_34_667m
+.ENDS wire90-287_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-284_2-R_34_667m a b
+Ccap@0 gnd net@14 1.042f
+Ccap@1 gnd net@8 1.042f
+Ccap@2 gnd net@11 1.042f
+Rres@0 net@14 a 1.642
+Rres@1 net@11 net@14 3.284
+Rres@2 b net@8 1.642
+Rres@3 net@8 net@11 3.284
+.ENDS wire-C_0_011f-284_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-284_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-284_2-R_34_667m
+.ENDS wire90-284_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-391_7-R_34_667m a b
+Ccap@0 gnd net@14 1.436f
+Ccap@1 gnd net@8 1.436f
+Ccap@2 gnd net@11 1.436f
+Rres@0 net@14 a 2.263
+Rres@1 net@11 net@14 4.526
+Rres@2 b net@8 2.263
+Rres@3 net@8 net@11 4.526
+.ENDS wire-C_0_011f-391_7-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-391_7-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-391_7-R_34_667m
+.ENDS wire90-391_7-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-296_2-R_34_667m a b
+Ccap@0 gnd net@14 1.086f
+Ccap@1 gnd net@8 1.086f
+Ccap@2 gnd net@11 1.086f
+Rres@0 net@14 a 1.711
+Rres@1 net@11 net@14 3.423
+Rres@2 b net@8 1.711
+Rres@3 net@8 net@11 3.423
+.ENDS wire-C_0_011f-296_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-296_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-296_2-R_34_667m
+.ENDS wire90-296_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-463_3-R_34_667m a b
+Ccap@0 gnd net@14 1.699f
+Ccap@1 gnd net@8 1.699f
+Ccap@2 gnd net@11 1.699f
+Rres@0 net@14 a 2.677
+Rres@1 net@11 net@14 5.354
+Rres@2 b net@8 2.677
+Rres@3 net@8 net@11 5.354
+.ENDS wire-C_0_011f-463_3-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-463_3-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-463_3-R_34_667m
+.ENDS wire90-463_3-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-181-R_34_667m a b
+Ccap@0 gnd net@14 0.664f
+Ccap@1 gnd net@8 0.664f
+Ccap@2 gnd net@11 0.664f
+Rres@0 net@14 a 1.046
+Rres@1 net@11 net@14 2.092
+Rres@2 b net@8 1.046
+Rres@3 net@8 net@11 2.092
+.ENDS wire-C_0_011f-181-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-181-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-181-R_34_667m
+.ENDS wire90-181-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-184-R_34_667m a b
+Ccap@0 gnd net@14 0.675f
+Ccap@1 gnd net@8 0.675f
+Ccap@2 gnd net@11 0.675f
+Rres@0 net@14 a 1.063
+Rres@1 net@11 net@14 2.126
+Rres@2 b net@8 1.063
+Rres@3 net@8 net@11 2.126
+.ENDS wire-C_0_011f-184-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-184-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-184-R_34_667m
+.ENDS wire90-184-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-439_3-R_34_667m a b
+Ccap@0 gnd net@14 1.611f
+Ccap@1 gnd net@8 1.611f
+Ccap@2 gnd net@11 1.611f
+Rres@0 net@14 a 2.538
+Rres@1 net@11 net@14 5.076
+Rres@2 b net@8 2.538
+Rres@3 net@8 net@11 5.076
+.ENDS wire-C_0_011f-439_3-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-439_3-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-439_3-R_34_667m
+.ENDS wire90-439_3-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-191-R_34_667m a b
+Ccap@0 gnd net@14 0.7f
+Ccap@1 gnd net@8 0.7f
+Ccap@2 gnd net@11 0.7f
+Rres@0 net@14 a 1.104
+Rres@1 net@11 net@14 2.207
+Rres@2 b net@8 1.104
+Rres@3 net@8 net@11 2.207
+.ENDS wire-C_0_011f-191-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-191-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-191-R_34_667m
+.ENDS wire90-191-layer_1-width_3
+
+*** CELL: skipL:skipTimer{sch}
+.SUBCKT skipTimer do[L] do[M] doit fire[ODE] ilc[load][F] loadFlags[F] 
++olc[dec][1] olc[dec][2] olc[dec][F] olc[load][1] olc[load][2] olc[load][F] 
++selLO[Co] selLO[Dl] selLO[Dm] selLO[Lf] selLO[Li] selLO[Lo]
+Xinv@1 fire[ODE] net@68 inv-X_20
+Xinv@2 net@249 olc[dec][1] inv-X_10
+Xinv@4 net@252 olc[dec][2] inv-X_10
+Xinv@5 net@261 olc[load][1] inv-X_10
+Xinv@6 olc[load][F] olc[load][2] inv-X_10
+XinvLT@0 doit net@304 invLT-X_30
+Xnor2n@5 selLO[Lf] fire[ODE] net@18 nor2n-X_10
+Xnor2n@7 selLO[Co] fire[ODE] net@0 nor2n-X_10
+Xnor2n@9 selLO[Li] fire[ODE] net@165 nor2n-X_10
+Xnor2n@10 selLO[Co] fire[ODE] net@206 nor2n-X_10
+Xnor2n@12 selLO[Lo] fire[ODE] net@256 nor2n-X_10
+XsucDri20@0 selLO[Dl] net@334 do[L] sucDri20cond
+XsucDri20@1 selLO[Dm] net@334 do[M] sucDri20cond
+XtimeDriv@1 net@133 net@144 loadFlags[F] timeDrive20
+XtimeDriv@3 net@133 net@255 olc[load][F] timeDrive20
+XtimeDriv@4 net@133 net@164 ilc[load][F] timeDrive20
+XtimeDriv@5 net@133 net@147 net@331 timeDrive40
+XtimeDriv@8 net@133 net@207 net@248 timeDrive20
+XtimeDriv@9 net@133 net@145 olc[dec][F] timeDrive20
+XtimeDriv@10 net@133 net@207 net@247 timeDrive20
+XtimeDriv@11 net@133 net@255 net@263 timeDrive20
+Xwire90@0 net@18 net@144 wire90-287_2-layer_1-width_3
+Xwire90@1 net@0 net@145 wire90-284_2-layer_1-width_3
+Xwire90@3 net@68 net@147 wire90-391_7-layer_1-width_3
+Xwire90@4 net@304 net@133 wire90-1092_8-layer_1-width_3
+Xwire90@5 net@165 net@164 wire90-296_2-layer_1-width_3
+Xwire90@6 net@206 net@207 wire90-463_3-layer_1-width_3
+Xwire90@8 net@248 net@249 wire90-181-layer_1-width_3
+Xwire90@9 net@247 net@252 wire90-184-layer_1-width_3
+Xwire90@10 net@256 net@255 wire90-439_3-layer_1-width_3
+Xwire90@11 net@263 net@261 wire90-191-layer_1-width_3
+Xwire90@12 net@331 net@334 wire90-391_7-layer_1-width_3
+.ENDS skipTimer
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-657_5-R_34_667m a b
+Ccap@0 gnd net@14 2.411f
+Ccap@1 gnd net@8 2.411f
+Ccap@2 gnd net@11 2.411f
+Rres@0 net@14 a 3.799
+Rres@1 net@11 net@14 7.598
+Rres@2 b net@8 3.799
+Rres@3 net@8 net@11 7.598
+.ENDS wire-C_0_011f-657_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-657_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-657_5-R_34_667m
+.ENDS wire90-657_5-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-439_9-R_34_667m a b
+Ccap@0 gnd net@14 1.613f
+Ccap@1 gnd net@8 1.613f
+Ccap@2 gnd net@11 1.613f
+Rres@0 net@14 a 2.542
+Rres@1 net@11 net@14 5.083
+Rres@2 b net@8 2.542
+Rres@3 net@8 net@11 5.083
+.ENDS wire-C_0_011f-439_9-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-439_9-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-439_9-R_34_667m
+.ENDS wire90-439_9-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1282_5-R_34_667m a b
+Ccap@0 gnd net@14 4.703f
+Ccap@1 gnd net@8 4.703f
+Ccap@2 gnd net@11 4.703f
+Rres@0 net@14 a 7.41
+Rres@1 net@11 net@14 14.82
+Rres@2 b net@8 7.41
+Rres@3 net@8 net@11 14.82
+.ENDS wire-C_0_011f-1282_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1282_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1282_5-R_34_667m
+.ENDS wire90-1282_5-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3646_5-R_34_667m a b
+Ccap@0 gnd net@14 13.371f
+Ccap@1 gnd net@8 13.371f
+Ccap@2 gnd net@11 13.371f
+Rres@0 net@14 a 21.069
+Rres@1 net@11 net@14 42.137
+Rres@2 b net@8 21.069
+Rres@3 net@8 net@11 42.137
+.ENDS wire-C_0_011f-3646_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3646_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-3646_5-R_34_667m
+.ENDS wire90-3646_5-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2967_8-R_34_667m a b
+Ccap@0 gnd net@14 10.882f
+Ccap@1 gnd net@8 10.882f
+Ccap@2 gnd net@11 10.882f
+Rres@0 net@14 a 17.147
+Rres@1 net@11 net@14 34.295
+Rres@2 b net@8 17.147
+Rres@3 net@8 net@11 34.295
+.ENDS wire-C_0_011f-2967_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2967_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2967_8-R_34_667m
+.ENDS wire90-2967_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1704_4-R_34_667m a b
+Ccap@0 gnd net@14 6.249f
+Ccap@1 gnd net@8 6.249f
+Ccap@2 gnd net@11 6.249f
+Rres@0 net@14 a 9.848
+Rres@1 net@11 net@14 19.695
+Rres@2 b net@8 9.848
+Rres@3 net@8 net@11 19.695
+.ENDS wire-C_0_011f-1704_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1704_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1704_4-R_34_667m
+.ENDS wire90-1704_4-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-649-R_34_667m a b
+Ccap@0 gnd net@14 2.38f
+Ccap@1 gnd net@8 2.38f
+Ccap@2 gnd net@11 2.38f
+Rres@0 net@14 a 3.75
+Rres@1 net@11 net@14 7.5
+Rres@2 b net@8 3.75
+Rres@3 net@8 net@11 7.5
+.ENDS wire-C_0_011f-649-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-649-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-649-R_34_667m
+.ENDS wire90-649-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-306-R_34_667m a b
+Ccap@0 gnd net@14 1.122f
+Ccap@1 gnd net@8 1.122f
+Ccap@2 gnd net@11 1.122f
+Rres@0 net@14 a 1.768
+Rres@1 net@11 net@14 3.536
+Rres@2 b net@8 1.768
+Rres@3 net@8 net@11 3.536
+.ENDS wire-C_0_011f-306-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-306-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-306-R_34_667m
+.ENDS wire90-306-layer_1-width_3
+
+*** CELL: skipL:skipAll{sch}
+.SUBCKT skipAll doLO[7] do[L] do[M] fire[ODE] fire[m1] fire[m2] flag[A] 
++flag[B] flag[C] ilc[load][F] inLO[7] in[10] in[11] in[12] in[13] in[14] 
++in[15] in[16] in[17] in[18] in[1] in[2] in[3] in[4] in[5] in[6] in[7] in[8] 
++in[9] in[C] kill loadC[T] mc olcNZ olc[dec][1] olc[dec][2] olc[load][1] 
++olc[load][2] selLO[Co] selLO[Dl] selLO[Dm] selLO[Lf] selLO[Li] selLO[Lo]
+Xarray@0 net@331 flag[A] flag[B] flag[C] flag[NZ] in[1][F] in[1][T] in[2][F] 
++in[2][T] in[3][F] in[3][T] in[4][F] in[4][T] in[5][F] in[5][T] in[6][F] 
++in[6][T] in[7][F] in[7][T] in[8][F] in[8][T] in[9][F] in[9][T] in[C] loadC[T] 
++loadFlags[F] m1[F] m1[T] mc array
+Xinv@0 m1[F] net@179 inv-X_20
+Xinv@1 fire[m2] net@302 inv-X_80
+Xinv@2 m2[F] net@304 inv-X_40
+Xinv@3 fire[m1] net@308 inv-X_30
+XproposeZ@1 doLO[7] net@177 inLO[7] kill mc olcNZ olc[dec][F] olc[load][F] 
++proposeZero
+XskipReg1@0 m2[F] m2[T] in[10] in[11] in[12] in[13] in[14] in[15] in[16] 
++in[17] in[18] in[1] in[2] in[3] in[4] in[5] in[6] in[7] in[8] in[9] in[5][F] 
++in[6][T] in[6][F] in[7][T] in[7][F] in[8][T] in[8][F] in[9][T] in[9][F] 
++in[1][T] in[1][F] in[2][T] in[2][F] in[3][T] in[3][F] in[4][T] in[4][F] 
++in[5][T] skipReg18
+XskipTime@4 do[L] do[M] doIt fire[ODE] ilc[load][F] loadFlags[F] olc[dec][1] 
++olc[dec][2] olc[dec][F] olc[load][1] olc[load][2] olc[load][F] selLO[Co] 
++selLO[Dl] selLO[Dm] selLO[Lf] selLO[Li] selLO[Lo] skipTimer
+Xwire90@3 net@177 flag[NZ] wire90-657_5-layer_1-width_3
+Xwire90@5 net@331 doIt wire90-439_9-layer_1-width_3
+Xwire90@13 m1[T] net@179 wire90-1282_5-layer_1-width_3
+Xwire90@14 m2[F] net@302 wire90-3646_5-layer_1-width_3
+Xwire90@15 m2[T] net@304 wire90-2967_8-layer_1-width_3
+Xwire90@16 m1[F] net@308 wire90-1704_4-layer_1-width_3
+Xwire90@17 olc[load][F] wire90@17_b wire90-649-layer_1-width_3
+Xwire90@18 olc[dec][F] wire90@18_b wire90-306-layer_1-width_3
+.ENDS skipAll
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-654_3-R_34_667m a b
+Ccap@0 gnd net@14 2.399f
+Ccap@1 gnd net@8 2.399f
+Ccap@2 gnd net@11 2.399f
+Rres@0 net@14 a 3.78
+Rres@1 net@11 net@14 7.561
+Rres@2 b net@8 3.78
+Rres@3 net@8 net@11 7.561
+.ENDS wire-C_0_011f-654_3-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-654_3-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-654_3-R_34_667m
+.ENDS wire90-654_3-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-338_3-R_34_667m a b
+Ccap@0 gnd net@14 1.24f
+Ccap@1 gnd net@8 1.24f
+Ccap@2 gnd net@11 1.24f
+Rres@0 net@14 a 1.955
+Rres@1 net@11 net@14 3.909
+Rres@2 b net@8 1.955
+Rres@3 net@8 net@11 3.909
+.ENDS wire-C_0_011f-338_3-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-338_3-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-338_3-R_34_667m
+.ENDS wire90-338_3-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-467_4-R_34_667m a b
+Ccap@0 gnd net@14 1.714f
+Ccap@1 gnd net@8 1.714f
+Ccap@2 gnd net@11 1.714f
+Rres@0 net@14 a 2.701
+Rres@1 net@11 net@14 5.401
+Rres@2 b net@8 2.701
+Rres@3 net@8 net@11 5.401
+.ENDS wire-C_0_011f-467_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-467_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-467_4-R_34_667m
+.ENDS wire90-467_4-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-466_9-R_34_667m a b
+Ccap@0 gnd net@14 1.712f
+Ccap@1 gnd net@8 1.712f
+Ccap@2 gnd net@11 1.712f
+Rres@0 net@14 a 2.698
+Rres@1 net@11 net@14 5.395
+Rres@2 b net@8 2.698
+Rres@3 net@8 net@11 5.395
+.ENDS wire-C_0_011f-466_9-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-466_9-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-466_9-R_34_667m
+.ENDS wire90-466_9-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2321_3-R_34_667m a b
+Ccap@0 gnd net@14 8.511f
+Ccap@1 gnd net@8 8.511f
+Ccap@2 gnd net@11 8.511f
+Rres@0 net@14 a 13.412
+Rres@1 net@11 net@14 26.824
+Rres@2 b net@8 13.412
+Rres@3 net@8 net@11 26.824
+.ENDS wire-C_0_011f-2321_3-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2321_3-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2321_3-R_34_667m
+.ENDS wire90-2321_3-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2286_4-R_34_667m a b
+Ccap@0 gnd net@14 8.383f
+Ccap@1 gnd net@8 8.383f
+Ccap@2 gnd net@11 8.383f
+Rres@0 net@14 a 13.21
+Rres@1 net@11 net@14 26.421
+Rres@2 b net@8 13.21
+Rres@3 net@8 net@11 26.421
+.ENDS wire-C_0_011f-2286_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2286_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2286_4-R_34_667m
+.ENDS wire90-2286_4-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2339_2-R_34_667m a b
+Ccap@0 gnd net@14 8.577f
+Ccap@1 gnd net@8 8.577f
+Ccap@2 gnd net@11 8.577f
+Rres@0 net@14 a 13.515
+Rres@1 net@11 net@14 27.031
+Rres@2 b net@8 13.515
+Rres@3 net@8 net@11 27.031
+.ENDS wire-C_0_011f-2339_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2339_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2339_2-R_34_667m
+.ENDS wire90-2339_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2336_8-R_34_667m a b
+Ccap@0 gnd net@14 8.568f
+Ccap@1 gnd net@8 8.568f
+Ccap@2 gnd net@11 8.568f
+Rres@0 net@14 a 13.502
+Rres@1 net@11 net@14 27.003
+Rres@2 b net@8 13.502
+Rres@3 net@8 net@11 27.003
+.ENDS wire-C_0_011f-2336_8-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2336_8-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2336_8-R_34_667m
+.ENDS wire90-2336_8-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2277-R_34_667m a b
+Ccap@0 gnd net@14 8.349f
+Ccap@1 gnd net@8 8.349f
+Ccap@2 gnd net@11 8.349f
+Rres@0 net@14 a 13.156
+Rres@1 net@11 net@14 26.312
+Rres@2 b net@8 13.156
+Rres@3 net@8 net@11 26.312
+.ENDS wire-C_0_011f-2277-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2277-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2277-R_34_667m
+.ENDS wire90-2277-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2338_5-R_34_667m a b
+Ccap@0 gnd net@14 8.574f
+Ccap@1 gnd net@8 8.574f
+Ccap@2 gnd net@11 8.574f
+Rres@0 net@14 a 13.511
+Rres@1 net@11 net@14 27.023
+Rres@2 b net@8 13.511
+Rres@3 net@8 net@11 27.023
+.ENDS wire-C_0_011f-2338_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2338_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2338_5-R_34_667m
+.ENDS wire90-2338_5-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1105_2-R_34_667m a b
+Ccap@0 gnd net@14 4.052f
+Ccap@1 gnd net@8 4.052f
+Ccap@2 gnd net@11 4.052f
+Rres@0 net@14 a 6.386
+Rres@1 net@11 net@14 12.771
+Rres@2 b net@8 6.386
+Rres@3 net@8 net@11 12.771
+.ENDS wire-C_0_011f-1105_2-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1105_2-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1105_2-R_34_667m
+.ENDS wire90-1105_2-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2165_4-R_34_667m a b
+Ccap@0 gnd net@14 7.94f
+Ccap@1 gnd net@8 7.94f
+Ccap@2 gnd net@11 7.94f
+Rres@0 net@14 a 12.511
+Rres@1 net@11 net@14 25.022
+Rres@2 b net@8 12.511
+Rres@3 net@8 net@11 25.022
+.ENDS wire-C_0_011f-2165_4-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2165_4-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-2165_4-R_34_667m
+.ENDS wire90-2165_4-layer_1-width_3
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1272_5-R_34_667m a b
+Ccap@0 gnd net@14 4.666f
+Ccap@1 gnd net@8 4.666f
+Ccap@2 gnd net@11 4.666f
+Rres@0 net@14 a 7.352
+Rres@1 net@11 net@14 14.704
+Rres@2 b net@8 7.352
+Rres@3 net@8 net@11 14.704
+.ENDS wire-C_0_011f-1272_5-R_34_667m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1272_5-layer_1-width_3 a b
+Xwire@0 a b wire-C_0_011f-1272_5-R_34_667m
+.ENDS wire90-1272_5-layer_1-width_3
+
+*** CELL: dockPartOD:skipCount{sch}
+.SUBCKT skipCount clS[F] clS[T] cl[F] cl[T] do[L] do[M] fire[ODE] fire[m1] 
++fire[m2] ilc[cnt] ilc[done] inA[1] inA[2] inA[3] inA[4] inA[5] inA[6] inB[1] 
++inB[2] inB[3] inB[4] inB[5] inB[6] inB[8] in[10] in[11] in[12] in[13] in[14] 
++in[15] in[16] in[17] in[18] in[1] in[2] in[3] in[4] in[5] in[6] in[7] in[8] 
++in[9] in[C] kill loadC[T] mc olcNZ rd[F] rd[T] selLO[Co] selLO[Dl] selLO[Dm] 
++selLO[Lf] selLO[Li] selLO[Lo] sel[A] sin sout
+Xilc@0 net@129[6] net@129[5] net@129[4] net@129[3] net@129[2] net@129[1] 
++net@129[0] ilc[cnt] ilc[done] ilc[load] inLO[1] inLO[2] inLO[3] inLO[4] 
++inLO[5] inLO[6] inLO[7] inLO[8] kill mc ilc
+XinMux@0 inA[1] inA[2] inA[3] inA[4] inA[5] inA[6] inB[1] inB[2] inB[3] 
++inB[4] inB[5] inB[6] inB[8] inLO[1] inLO[2] inLO[3] inLO[4] inLO[5] inLO[6] 
++inLO[7] inLO[8] sel[A] inMux
+Xolc@0 net@130[5] net@130[4] net@130[3] net@130[2] net@130[1] net@130[0] 
++net@10 inLO[1] inLO[2] inLO[3] inLO[4] inLO[5] inLO[6] olc[dec][1] 
++olc[dec][2] olc[load][1] olc[load][2] olc
+XscanKx3@0 clS[F] clS[T] cl[F] cl[T] flag[C] flag[B] flag[A] mc rd[F] rd[T] 
++net@104 sout scanKx3
+XscanKx6@0 clS[F] clS[T] cl[F] cl[T] net@130[5] net@130[4] net@130[3] 
++net@130[2] net@130[1] net@130[0] mc rd[F] rd[T] net@103 net@104 scanKx6
+XscanKx7@0 clS[F] clS[T] cl[F] cl[T] net@129[6] net@129[5] net@129[4] 
++net@129[3] net@129[2] net@129[1] net@129[0] mc rd[F] rd[T] sin net@103 
++scanKx7
+XskipAll@0 doLO[7] do[L] do[M] fire[ODE] fire[m1] fire[m2] flag[A] flag[B] 
++flag[C] net@99 inLO[7] in[10] in[11] in[12] in[13] in[14] in[15] in[16] 
++in[17] in[18] in[1] in[2] in[3] in[4] in[5] in[6] in[7] in[8] in[9] in[C] 
++kill loadC[T] mc olcNZ olc[dec][1] olc[dec][2] olc[load][1] olc[load][2] 
++selLO[Co] selLO[Dl] selLO[Dm] selLO[Lf] selLO[Li] selLO[Lo] skipAll
+Xwire90@0 net@10 doLO[7] wire90-654_3-layer_1-width_3
+Xwire90@1 wire90@1_a olc[dec][1] wire90-338_3-layer_1-width_3
+Xwire90@2 wire90@2_a olc[load][1] wire90-467_4-layer_1-width_3
+Xwire90@3 wire90@3_a olc[load][2] wire90-466_9-layer_1-width_3
+Xwire90@4 wire90@4_a olc[dec][2] wire90-338_3-layer_1-width_3
+Xwire90@5 wire90@5_a inLO[1] wire90-2321_3-layer_1-width_3
+Xwire90@6 wire90@6_a inLO[2] wire90-2286_4-layer_1-width_3
+Xwire90@7 wire90@7_a inLO[3] wire90-2339_2-layer_1-width_3
+Xwire90@8 wire90@8_a inLO[4] wire90-2336_8-layer_1-width_3
+Xwire90@9 wire90@9_a inLO[5] wire90-2277-layer_1-width_3
+Xwire90@10 wire90@10_a inLO[6] wire90-2338_5-layer_1-width_3
+Xwire90@11 wire90@11_a inLO[8] wire90-1105_2-layer_1-width_3
+Xwire90@12 wire90@12_a inLO[7] wire90-2165_4-layer_1-width_3
+Xwire90@13 ilc[load] net@99 wire90-1272_5-layer_1-width_3
+.ENDS skipCount
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2416_4-R_26m a b
+Ccap@0 gnd net@14 8.86f
+Ccap@1 gnd net@8 8.86f
+Ccap@2 gnd net@11 8.86f
+Rres@0 net@14 a 10.471
+Rres@1 net@11 net@14 20.942
+Rres@2 b net@8 10.471
+Rres@3 net@8 net@11 20.942
+.ENDS wire-C_0_011f-2416_4-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2416_4-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-2416_4-R_26m
+.ENDS wire90-2416_4-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2384_4-R_26m a b
+Ccap@0 gnd net@14 8.743f
+Ccap@1 gnd net@8 8.743f
+Ccap@2 gnd net@11 8.743f
+Rres@0 net@14 a 10.332
+Rres@1 net@11 net@14 20.665
+Rres@2 b net@8 10.332
+Rres@3 net@8 net@11 20.665
+.ENDS wire-C_0_011f-2384_4-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2384_4-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-2384_4-R_26m
+.ENDS wire90-2384_4-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2330_4-R_26m a b
+Ccap@0 gnd net@14 8.545f
+Ccap@1 gnd net@8 8.545f
+Ccap@2 gnd net@11 8.545f
+Rres@0 net@14 a 10.098
+Rres@1 net@11 net@14 20.197
+Rres@2 b net@8 10.098
+Rres@3 net@8 net@11 20.197
+.ENDS wire-C_0_011f-2330_4-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2330_4-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-2330_4-R_26m
+.ENDS wire90-2330_4-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2135_9-R_26m a b
+Ccap@0 gnd net@14 7.832f
+Ccap@1 gnd net@8 7.832f
+Ccap@2 gnd net@11 7.832f
+Rres@0 net@14 a 9.256
+Rres@1 net@11 net@14 18.511
+Rres@2 b net@8 9.256
+Rres@3 net@8 net@11 18.511
+.ENDS wire-C_0_011f-2135_9-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2135_9-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-2135_9-R_26m
+.ENDS wire90-2135_9-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1987_4-R_26m a b
+Ccap@0 gnd net@14 7.287f
+Ccap@1 gnd net@8 7.287f
+Ccap@2 gnd net@11 7.287f
+Rres@0 net@14 a 8.612
+Rres@1 net@11 net@14 17.224
+Rres@2 b net@8 8.612
+Rres@3 net@8 net@11 17.224
+.ENDS wire-C_0_011f-1987_4-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1987_4-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-1987_4-R_26m
+.ENDS wire90-1987_4-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1996_4-R_26m a b
+Ccap@0 gnd net@14 7.32f
+Ccap@1 gnd net@8 7.32f
+Ccap@2 gnd net@11 7.32f
+Rres@0 net@14 a 8.651
+Rres@1 net@11 net@14 17.302
+Rres@2 b net@8 8.651
+Rres@3 net@8 net@11 17.302
+.ENDS wire-C_0_011f-1996_4-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1996_4-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-1996_4-R_26m
+.ENDS wire90-1996_4-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1636_3-R_26m a b
+Ccap@0 gnd net@14 6f
+Ccap@1 gnd net@8 6f
+Ccap@2 gnd net@11 6f
+Rres@0 net@14 a 7.091
+Rres@1 net@11 net@14 14.181
+Rres@2 b net@8 7.091
+Rres@3 net@8 net@11 14.181
+.ENDS wire-C_0_011f-1636_3-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1636_3-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-1636_3-R_26m
+.ENDS wire90-1636_3-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1776_4-R_26m a b
+Ccap@0 gnd net@14 6.513f
+Ccap@1 gnd net@8 6.513f
+Ccap@2 gnd net@11 6.513f
+Rres@0 net@14 a 7.698
+Rres@1 net@11 net@14 15.395
+Rres@2 b net@8 7.698
+Rres@3 net@8 net@11 15.395
+.ENDS wire-C_0_011f-1776_4-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1776_4-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-1776_4-R_26m
+.ENDS wire90-1776_4-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1870_9-R_26m a b
+Ccap@0 gnd net@14 6.86f
+Ccap@1 gnd net@8 6.86f
+Ccap@2 gnd net@11 6.86f
+Rres@0 net@14 a 8.107
+Rres@1 net@11 net@14 16.214
+Rres@2 b net@8 8.107
+Rres@3 net@8 net@11 16.214
+.ENDS wire-C_0_011f-1870_9-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1870_9-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-1870_9-R_26m
+.ENDS wire90-1870_9-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1565_5-R_26m a b
+Ccap@0 gnd net@14 5.74f
+Ccap@1 gnd net@8 5.74f
+Ccap@2 gnd net@11 5.74f
+Rres@0 net@14 a 6.784
+Rres@1 net@11 net@14 13.568
+Rres@2 b net@8 6.784
+Rres@3 net@8 net@11 13.568
+.ENDS wire-C_0_011f-1565_5-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1565_5-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-1565_5-R_26m
+.ENDS wire90-1565_5-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1506-R_26m a b
+Ccap@0 gnd net@14 5.522f
+Ccap@1 gnd net@8 5.522f
+Ccap@2 gnd net@11 5.522f
+Rres@0 net@14 a 6.526
+Rres@1 net@11 net@14 13.052
+Rres@2 b net@8 6.526
+Rres@3 net@8 net@11 13.052
+.ENDS wire-C_0_011f-1506-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1506-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-1506-R_26m
+.ENDS wire90-1506-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1605_5-R_26m a b
+Ccap@0 gnd net@14 5.887f
+Ccap@1 gnd net@8 5.887f
+Ccap@2 gnd net@11 5.887f
+Rres@0 net@14 a 6.957
+Rres@1 net@11 net@14 13.914
+Rres@2 b net@8 6.957
+Rres@3 net@8 net@11 13.914
+.ENDS wire-C_0_011f-1605_5-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1605_5-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-1605_5-R_26m
+.ENDS wire90-1605_5-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1227_3-R_26m a b
+Ccap@0 gnd net@14 4.5f
+Ccap@1 gnd net@8 4.5f
+Ccap@2 gnd net@11 4.5f
+Rres@0 net@14 a 5.318
+Rres@1 net@11 net@14 10.637
+Rres@2 b net@8 5.318
+Rres@3 net@8 net@11 10.637
+.ENDS wire-C_0_011f-1227_3-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1227_3-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-1227_3-R_26m
+.ENDS wire90-1227_3-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1254_9-R_26m a b
+Ccap@0 gnd net@14 4.601f
+Ccap@1 gnd net@8 4.601f
+Ccap@2 gnd net@11 4.601f
+Rres@0 net@14 a 5.438
+Rres@1 net@11 net@14 10.876
+Rres@2 b net@8 5.438
+Rres@3 net@8 net@11 10.876
+.ENDS wire-C_0_011f-1254_9-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1254_9-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-1254_9-R_26m
+.ENDS wire90-1254_9-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1280_2-R_26m a b
+Ccap@0 gnd net@14 4.694f
+Ccap@1 gnd net@8 4.694f
+Ccap@2 gnd net@11 4.694f
+Rres@0 net@14 a 5.548
+Rres@1 net@11 net@14 11.095
+Rres@2 b net@8 5.548
+Rres@3 net@8 net@11 11.095
+.ENDS wire-C_0_011f-1280_2-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1280_2-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-1280_2-R_26m
+.ENDS wire90-1280_2-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-1012_7-R_26m a b
+Ccap@0 gnd net@14 3.713f
+Ccap@1 gnd net@8 3.713f
+Ccap@2 gnd net@11 3.713f
+Rres@0 net@14 a 4.388
+Rres@1 net@11 net@14 8.777
+Rres@2 b net@8 4.388
+Rres@3 net@8 net@11 8.777
+.ENDS wire-C_0_011f-1012_7-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-1012_7-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-1012_7-R_26m
+.ENDS wire90-1012_7-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-960_9-R_26m a b
+Ccap@0 gnd net@14 3.523f
+Ccap@1 gnd net@8 3.523f
+Ccap@2 gnd net@11 3.523f
+Rres@0 net@14 a 4.164
+Rres@1 net@11 net@14 8.328
+Rres@2 b net@8 4.164
+Rres@3 net@8 net@11 8.328
+.ENDS wire-C_0_011f-960_9-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-960_9-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-960_9-R_26m
+.ENDS wire90-960_9-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-904_3-R_26m a b
+Ccap@0 gnd net@14 3.316f
+Ccap@1 gnd net@8 3.316f
+Ccap@2 gnd net@11 3.316f
+Rres@0 net@14 a 3.919
+Rres@1 net@11 net@14 7.837
+Rres@2 b net@8 3.919
+Rres@3 net@8 net@11 7.837
+.ENDS wire-C_0_011f-904_3-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-904_3-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-904_3-R_26m
+.ENDS wire90-904_3-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-4579_4-R_26m a b
+Ccap@0 gnd net@14 16.791f
+Ccap@1 gnd net@8 16.791f
+Ccap@2 gnd net@11 16.791f
+Rres@0 net@14 a 19.844
+Rres@1 net@11 net@14 39.688
+Rres@2 b net@8 19.844
+Rres@3 net@8 net@11 39.688
+.ENDS wire-C_0_011f-4579_4-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-4579_4-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-4579_4-R_26m
+.ENDS wire90-4579_4-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-4580_9-R_26m a b
+Ccap@0 gnd net@14 16.797f
+Ccap@1 gnd net@8 16.797f
+Ccap@2 gnd net@11 16.797f
+Rres@0 net@14 a 19.851
+Rres@1 net@11 net@14 39.701
+Rres@2 b net@8 19.851
+Rres@3 net@8 net@11 39.701
+.ENDS wire-C_0_011f-4580_9-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-4580_9-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-4580_9-R_26m
+.ENDS wire90-4580_9-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-4864_4-R_26m a b
+Ccap@0 gnd net@14 17.836f
+Ccap@1 gnd net@8 17.836f
+Ccap@2 gnd net@11 17.836f
+Rres@0 net@14 a 21.079
+Rres@1 net@11 net@14 42.158
+Rres@2 b net@8 21.079
+Rres@3 net@8 net@11 42.158
+.ENDS wire-C_0_011f-4864_4-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-4864_4-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-4864_4-R_26m
+.ENDS wire90-4864_4-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-4970_4-R_26m a b
+Ccap@0 gnd net@14 18.225f
+Ccap@1 gnd net@8 18.225f
+Ccap@2 gnd net@11 18.225f
+Rres@0 net@14 a 21.538
+Rres@1 net@11 net@14 43.077
+Rres@2 b net@8 21.538
+Rres@3 net@8 net@11 43.077
+.ENDS wire-C_0_011f-4970_4-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-4970_4-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-4970_4-R_26m
+.ENDS wire90-4970_4-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-5067_4-R_26m a b
+Ccap@0 gnd net@14 18.58f
+Ccap@1 gnd net@8 18.58f
+Ccap@2 gnd net@11 18.58f
+Rres@0 net@14 a 21.959
+Rres@1 net@11 net@14 43.917
+Rres@2 b net@8 21.959
+Rres@3 net@8 net@11 43.917
+.ENDS wire-C_0_011f-5067_4-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-5067_4-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-5067_4-R_26m
+.ENDS wire90-5067_4-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-5238_9-R_26m a b
+Ccap@0 gnd net@14 19.209f
+Ccap@1 gnd net@8 19.209f
+Ccap@2 gnd net@11 19.209f
+Rres@0 net@14 a 22.702
+Rres@1 net@11 net@14 45.404
+Rres@2 b net@8 22.702
+Rres@3 net@8 net@11 45.404
+.ENDS wire-C_0_011f-5238_9-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-5238_9-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-5238_9-R_26m
+.ENDS wire90-5238_9-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-5485_4-R_26m a b
+Ccap@0 gnd net@14 20.113f
+Ccap@1 gnd net@8 20.113f
+Ccap@2 gnd net@11 20.113f
+Rres@0 net@14 a 23.77
+Rres@1 net@11 net@14 47.54
+Rres@2 b net@8 23.77
+Rres@3 net@8 net@11 47.54
+.ENDS wire-C_0_011f-5485_4-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-5485_4-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-5485_4-R_26m
+.ENDS wire90-5485_4-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3582_8-R_26m a b
+Ccap@0 gnd net@14 13.137f
+Ccap@1 gnd net@8 13.137f
+Ccap@2 gnd net@11 13.137f
+Rres@0 net@14 a 15.525
+Rres@1 net@11 net@14 31.051
+Rres@2 b net@8 15.525
+Rres@3 net@8 net@11 31.051
+.ENDS wire-C_0_011f-3582_8-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3582_8-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-3582_8-R_26m
+.ENDS wire90-3582_8-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-4216_8-R_26m a b
+Ccap@0 gnd net@14 15.462f
+Ccap@1 gnd net@8 15.462f
+Ccap@2 gnd net@11 15.462f
+Rres@0 net@14 a 18.273
+Rres@1 net@11 net@14 36.546
+Rres@2 b net@8 18.273
+Rres@3 net@8 net@11 36.546
+.ENDS wire-C_0_011f-4216_8-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-4216_8-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-4216_8-R_26m
+.ENDS wire90-4216_8-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-4217_8-R_26m a b
+Ccap@0 gnd net@14 15.465f
+Ccap@1 gnd net@8 15.465f
+Ccap@2 gnd net@11 15.465f
+Rres@0 net@14 a 18.277
+Rres@1 net@11 net@14 36.554
+Rres@2 b net@8 18.277
+Rres@3 net@8 net@11 36.554
+.ENDS wire-C_0_011f-4217_8-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-4217_8-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-4217_8-R_26m
+.ENDS wire90-4217_8-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-4580_7-R_26m a b
+Ccap@0 gnd net@14 16.796f
+Ccap@1 gnd net@8 16.796f
+Ccap@2 gnd net@11 16.796f
+Rres@0 net@14 a 19.85
+Rres@1 net@11 net@14 39.699
+Rres@2 b net@8 19.85
+Rres@3 net@8 net@11 39.699
+.ENDS wire-C_0_011f-4580_7-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-4580_7-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-4580_7-R_26m
+.ENDS wire90-4580_7-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-4914_8-R_26m a b
+Ccap@0 gnd net@14 18.021f
+Ccap@1 gnd net@8 18.021f
+Ccap@2 gnd net@11 18.021f
+Rres@0 net@14 a 21.297
+Rres@1 net@11 net@14 42.595
+Rres@2 b net@8 21.297
+Rres@3 net@8 net@11 42.595
+.ENDS wire-C_0_011f-4914_8-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-4914_8-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-4914_8-R_26m
+.ENDS wire90-4914_8-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-5109_1-R_26m a b
+Ccap@0 gnd net@14 18.733f
+Ccap@1 gnd net@8 18.733f
+Ccap@2 gnd net@11 18.733f
+Rres@0 net@14 a 22.139
+Rres@1 net@11 net@14 44.279
+Rres@2 b net@8 22.139
+Rres@3 net@8 net@11 44.279
+.ENDS wire-C_0_011f-5109_1-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-5109_1-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-5109_1-R_26m
+.ENDS wire90-5109_1-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-4659_8-R_26m a b
+Ccap@0 gnd net@14 17.086f
+Ccap@1 gnd net@8 17.086f
+Ccap@2 gnd net@11 17.086f
+Rres@0 net@14 a 20.192
+Rres@1 net@11 net@14 40.385
+Rres@2 b net@8 20.192
+Rres@3 net@8 net@11 40.385
+.ENDS wire-C_0_011f-4659_8-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-4659_8-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-4659_8-R_26m
+.ENDS wire90-4659_8-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-3104_3-R_26m a b
+Ccap@0 gnd net@14 11.382f
+Ccap@1 gnd net@8 11.382f
+Ccap@2 gnd net@11 11.382f
+Rres@0 net@14 a 13.452
+Rres@1 net@11 net@14 26.904
+Rres@2 b net@8 13.452
+Rres@3 net@8 net@11 26.904
+.ENDS wire-C_0_011f-3104_3-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-3104_3-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-3104_3-R_26m
+.ENDS wire90-3104_3-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-2227_6-R_26m a b
+Ccap@0 gnd net@14 8.168f
+Ccap@1 gnd net@8 8.168f
+Ccap@2 gnd net@11 8.168f
+Rres@0 net@14 a 9.653
+Rres@1 net@11 net@14 19.306
+Rres@2 b net@8 9.653
+Rres@3 net@8 net@11 19.306
+.ENDS wire-C_0_011f-2227_6-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-2227_6-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-2227_6-R_26m
+.ENDS wire90-2227_6-layer_1-width_4
+
+*** CELL: orangeTSMC090nm:wire{sch}
+.SUBCKT wire-C_0_011f-4552_2-R_26m a b
+Ccap@0 gnd net@14 16.691f
+Ccap@1 gnd net@8 16.691f
+Ccap@2 gnd net@11 16.691f
+Rres@0 net@14 a 19.726
+Rres@1 net@11 net@14 39.452
+Rres@2 b net@8 19.726
+Rres@3 net@8 net@11 39.452
+.ENDS wire-C_0_011f-4552_2-R_26m
+
+*** CELL: orangeTSMC090nm:wire90{sch}
+.SUBCKT wire90-4552_2-layer_1-width_4 a b
+Xwire@0 a b wire-C_0_011f-4552_2-R_26m
+.ENDS wire90-4552_2-layer_1-width_4
+
+*** CELL: dockPartOD:ringSkip{sch}
+.SUBCKT ringSkip clS[F] clS[T] cl[F] cl[T] do[L] do[M] do[epi] ilc[cnt] 
++ilc[done] inA[1] inA[2] inA[3] inA[4] inA[5] inA[6] inE[10] inE[11] inE[12] 
++inE[13] inE[14] inE[15] inE[16] inE[17] inE[18] inE[19] inE[1] inE[20] 
++inE[21] inE[22] inE[23] inE[24] inE[25] inE[26] inE[27] inE[28] inE[29] 
++inE[2] inE[30] inE[31] inE[32] inE[33] inE[34] inE[35] inE[36] inE[3] inE[4] 
++inE[5] inE[6] inE[7] inE[8] inE[9] in[C] kill loadC[T] mc olcNZ rd[F] rd[T] 
++sin sin_1 sout sout_1
+XbitAssig@0 bitAssignments
+XringFIFO@0 clS[F] clS[T] cl[F] cl[T] do[L] do[M] do[epi] fire[ODE] fire[m1] 
++fire[m2] inE[10] inE[11] inE[12] inE[13] inE[14] inE[15] inE[16] inE[17] 
++inE[18] inE[19] inE[1] inE[20] inE[21] inE[22] inE[23] inE[24] inE[25] 
++inE[26] inE[27] inE[28] inE[29] inE[2] inE[30] inE[31] inE[32] inE[33] 
++inE[34] inE[35] inE[36] inE[3] inE[4] inE[5] inE[6] inE[7] inE[8] inE[9] mc 
++m1s[1] m1s[20] m1s[22] m1s[23] m1s[24] m1s[25] m1s[26] m1s[27] m1s[2] m1s[3] 
++m1s[4] m1s[5] m1s[6] m1s[8] pout[10] pout[11] pout[12] pout[13] pout[14] 
++pout[15] pout[16] pout[17] pout[18] pout[1] pout[2] pout[3] pout[4] pout[5] 
++pout[6] pout[7] pout[8] pout[9] rd[F] rd[T] sin_1 sout_1 ringFIFO
+XskipCoun@0 clS[F] clS[T] cl[F] cl[T] do[L] do[M] fire[ODE] fire[m1] fire[m2] 
++ilc[cnt] ilc[done] inA[1] inA[2] inA[3] inA[4] inA[5] inA[6] m1d[1] m1d[2] 
++m1d[3] m1d[4] m1d[5] m1d[6] m1d[8] pout[10] pout[11] pout[12] pout[13] 
++pout[14] pout[15] pout[16] pout[17] pout[18] pout[1] pout[2] pout[3] pout[4] 
++pout[5] pout[6] pout[7] pout[8] pout[9] in[C] kill loadC[T] mc olcNZ rd[F] 
++rd[T] m1d[24] m1d[26] m1d[25] m1d[22] m1d[27] m1d[23] m1d[20] sin sout 
++skipCount
+Xwire90@0 wire90@0_a pout[1] wire90-2416_4-layer_1-width_4
+Xwire90@1 wire90@1_a pout[2] wire90-2384_4-layer_1-width_4
+Xwire90@2 wire90@2_a pout[3] wire90-2330_4-layer_1-width_4
+Xwire90@3 wire90@3_a pout[4] wire90-2135_9-layer_1-width_4
+Xwire90@4 wire90@4_a pout[5] wire90-1987_4-layer_1-width_4
+Xwire90@5 wire90@5_a pout[6] wire90-1996_4-layer_1-width_4
+Xwire90@6 wire90@6_a pout[7] wire90-1636_3-layer_1-width_4
+Xwire90@7 wire90@7_a pout[8] wire90-1776_4-layer_1-width_4
+Xwire90@8 wire90@8_a pout[9] wire90-1870_9-layer_1-width_4
+Xwire90@9 wire90@9_a pout[10] wire90-1565_5-layer_1-width_4
+Xwire90@10 wire90@10_a pout[11] wire90-1506-layer_1-width_4
+Xwire90@11 wire90@11_a pout[12] wire90-1605_5-layer_1-width_4
+Xwire90@12 wire90@12_a pout[13] wire90-1227_3-layer_1-width_4
+Xwire90@13 wire90@13_a pout[14] wire90-1254_9-layer_1-width_4
+Xwire90@14 wire90@14_a pout[15] wire90-1280_2-layer_1-width_4
+Xwire90@15 wire90@15_a pout[16] wire90-1012_7-layer_1-width_4
+Xwire90@16 wire90@16_a pout[17] wire90-960_9-layer_1-width_4
+Xwire90@17 wire90@17_a pout[18] wire90-904_3-layer_1-width_4
+Xwire90@18 m1s[1] m1d[1] wire90-4579_4-layer_1-width_4
+Xwire90@19 m1s[2] m1d[2] wire90-4580_9-layer_1-width_4
+Xwire90@20 m1s[3] m1d[3] wire90-4864_4-layer_1-width_4
+Xwire90@21 m1s[4] m1d[4] wire90-4970_4-layer_1-width_4
+Xwire90@22 m1s[5] m1d[5] wire90-5067_4-layer_1-width_4
+Xwire90@23 m1s[6] m1d[6] wire90-5238_9-layer_1-width_4
+Xwire90@25 m1s[8] m1d[8] wire90-5485_4-layer_1-width_4
+Xwire90@37 m1s[20] m1d[20] wire90-3582_8-layer_1-width_4
+Xwire90@39 m1s[22] m1d[22] wire90-4216_8-layer_1-width_4
+Xwire90@40 m1s[23] m1d[23] wire90-4217_8-layer_1-width_4
+Xwire90@41 m1s[24] m1d[24] wire90-4580_7-layer_1-width_4
+Xwire90@42 m1s[25] m1d[25] wire90-4914_8-layer_1-width_4
+Xwire90@43 m1s[26] m1d[26] wire90-5109_1-layer_1-width_4
+Xwire90@44 m1s[27] m1d[27] wire90-4659_8-layer_1-width_4
+Xwire90@56 wire90@56_a fire[m2] wire90-3104_3-layer_1-width_4
+Xwire90@57 wire90@57_a fire[m1] wire90-2227_6-layer_1-width_4
+Xwire90@58 wire90@58_a fire[ODE] wire90-4552_2-layer_1-width_4
+.ENDS ringSkip
+
+*** CELL: scanConverter{sch}
+.SUBCKT scanConverter clS[F] clS[T] cl[F] cl[T] mc oldScan[2] oldScan[3] 
++oldScan[4] oldScan[5] oldScan[6] oldScan[7] oldScan[8] oldScan[9] rd[F] rd[T]
+Xinv@0 oldScan[2] cl[F] inv-X_5
+Xinv@1 cl[F] cl[T] inv-X_5
+Xinv@2 oldScan[3] clS[F] inv-X_5
+Xinv@3 clS[F] clS[T] inv-X_5
+Xinv@4 oldScan[5] rd[F] inv-X_5
+Xinv@5 rd[F] rd[T] inv-X_5
+Xinv@6 oldScan[9] net@3 inv-X_5
+Xinv@7 net@3 mc inv-X_5
+.ENDS scanConverter
+
 *** CELL: inputDock{sch}
-.SUBCKT inputDock gnd in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] 
+.SUBCKT inputDock in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] 
 +in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] 
 +in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] in[37] 
 +in[38] in[39] in[3] in[40] in[41] in[42] in[43] in[44] in[45] in[46] in[47] 
@@ -1857,20 +10471,20 @@ Xstg[4] net@48[4] net@48[3] net@48[2] net@48[1] net@48[0] net@48[13]
 +ins[27] ins[28] ins[29] ins[2] ins[30] ins[31] ins[32] ins[33] ins[34] 
 +ins[35] ins[36] ins[37] ins[38] ins[39] ins[3] ins[40] ins[41] ins[42] 
 +ins[43] ins[44] ins[45] ins[46] ins[47] ins[48] ins[49] ins[4] ins[50] 
-+ins[51] ins[5] ins[6] ins[7] ins[8] ins[9] ins[T] ship[10] ship[11] ship[12] 
-+ship[13] ship[14] ship[15] ship[16] ship[17] ship[18] ship[19] ship[1] 
-+ship[20] ship[21] ship[22] ship[23] ship[24] ship[25] ship[26] ship[27] 
-+ship[28] ship[29] ship[2] ship[30] ship[31] ship[32] ship[33] ship[34] 
-+ship[35] ship[36] ship[37] ship[38] ship[3] ship[4] ship[5] ship[6] ship[7] 
-+ship[8] ship[9] ship[S] sin sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] sir[8] 
-+sir[9] sout tokOut[10] tokOut[11] tokOut[12] tokOut[13] tokOut[14] tokOut[15] 
-+tokOut[16] tokOut[17] tokOut[18] tokOut[19] tokOut[1] tokOut[20] tokOut[21] 
-+tokOut[22] tokOut[23] tokOut[24] tokOut[25] tokOut[26] tokOut[27] tokOut[28] 
-+tokOut[29] tokOut[2] tokOut[30] tokOut[31] tokOut[32] tokOut[33] tokOut[34] 
-+tokOut[35] tokOut[36] tokOut[37] tokOut[38] tokOut[39] tokOut[3] tokOut[40] 
-+tokOut[41] tokOut[42] tokOut[43] tokOut[44] tokOut[45] tokOut[46] tokOut[47] 
-+tokOut[48] tokOut[49] tokOut[4] tokOut[50] tokOut[51] tokOut[5] tokOut[6] 
-+tokOut[7] tokOut[8] tokOut[9] tokOut[S] tokOut[T]
++ins[51] ins[5] ins[6] ins[7] ins[8] ins[9] ins[S] ins[T] ship[10] ship[11] 
++ship[12] ship[13] ship[14] ship[15] ship[16] ship[17] ship[18] ship[19] 
++ship[1] ship[20] ship[21] ship[22] ship[23] ship[24] ship[25] ship[26] 
++ship[27] ship[28] ship[29] ship[2] ship[30] ship[31] ship[32] ship[33] 
++ship[34] ship[35] ship[36] ship[37] ship[38] ship[3] ship[4] ship[5] ship[6] 
++ship[7] ship[8] ship[9] ship[S] sin sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] 
++sir[8] sir[9] sout tokOut[10] tokOut[11] tokOut[12] tokOut[13] tokOut[14] 
++tokOut[15] tokOut[16] tokOut[17] tokOut[18] tokOut[19] tokOut[1] tokOut[20] 
++tokOut[21] tokOut[22] tokOut[23] tokOut[24] tokOut[25] tokOut[26] tokOut[27] 
++tokOut[28] tokOut[29] tokOut[2] tokOut[30] tokOut[31] tokOut[32] tokOut[33] 
++tokOut[34] tokOut[35] tokOut[36] tokOut[37] tokOut[38] tokOut[39] tokOut[3] 
++tokOut[40] tokOut[41] tokOut[42] tokOut[43] tokOut[44] tokOut[45] tokOut[46] 
++tokOut[47] tokOut[48] tokOut[49] tokOut[4] tokOut[50] tokOut[51] tokOut[5] 
++tokOut[6] tokOut[7] tokOut[8] tokOut[9] tokOut[S] tokOut[T]
 XplainSta@0 in[46] in[47] in[48] in[49] in[50] in[T] in[38] in[39] in[40] 
 +in[41] in[42] in[43] in[44] in[45] in[51] tokOut[46] tokOut[47] tokOut[48] 
 +tokOut[49] tokOut[50] tokOut[T] tokOut[38] tokOut[39] tokOut[40] tokOut[41] 
@@ -1883,8 +10497,17 @@ XplainSta@0 in[46] in[47] in[48] in[49] in[50] in[T] in[38] in[39] in[40]
 +tokOut[23] tokOut[24] tokOut[25] tokOut[26] tokOut[27] tokOut[28] tokOut[29] 
 +tokOut[2] tokOut[30] tokOut[31] tokOut[32] tokOut[33] tokOut[34] tokOut[35] 
 +tokOut[36] tokOut[37] tokOut[3] tokOut[4] tokOut[5] tokOut[6] tokOut[7] 
-+tokOut[8] tokOut[9] in[S] sin sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] 
-+sir[8] sir[9] sout tokOut[S] plainStageFour
++tokOut[8] tokOut[9] in[S] dock2plain sir[2] sir[3] sir[4] sir[5] sir[6] 
++sir[7] sir[8] sir[9] sout tokOut[S] plainStageFour
+XringSkip@0 net@31[3] net@31[4] net@31[5] net@31[6] doL doM ins[S] gnd 
++ilcDone net@21[5] net@21[4] net@21[3] net@21[2] net@21[1] net@21[0] ins[10] 
++ins[11] ins[12] ins[13] ins[14] ins[15] ins[16] ins[17] ins[18] ins[19] 
++ins[1] ins[20] ins[21] ins[22] ins[23] ins[24] ins[25] ins[26] ins[27] 
++ins[28] ins[29] ins[2] ins[30] ins[31] ins[32] ins[33] ins[34] ins[35] 
++ins[36] ins[3] ins[4] ins[5] ins[6] ins[7] ins[8] ins[9] gnd gnd gnd 
++net@31[0] olcNZ net@31[1] net@31[2] net@23 sin dock2plain net@23 ringSkip
+XscanConv@0 net@31[3] net@31[4] net@31[5] net@31[6] net@31[0] sir[2] sir[3] 
++sir[4] sir[5] sir[6] sir[7] sir[8] sir[9] net@31[1] net@31[2] scanConverter
 .ENDS inputDock
 
 *** CELL: scanJ:scanCap{sch}
@@ -1912,17 +10535,17 @@ XdatIn net@6[4] net@6[3] net@6[2] net@6[1] net@6[0] net@6[13] net@6[12]
 +scanInR[4] scanInR[5] scanInR[3] scanInR[2] scanInR[8] scanInR[9] net@11[8] 
 +net@10[8] net@10[7] net@10[6] net@10[5] net@10[4] dockScanR[I] in[S] 
 +properStopper
-XinDock gnd in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] in[18] 
-+in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] in[28] 
-+in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] in[37] in[38] 
-+in[39] in[3] in[40] in[41] in[42] in[43] in[44] in[45] in[46] in[47] in[48] 
-+in[49] in[4] in[50] in[51] in[5] in[6] in[7] in[8] in[9] in[S] in[T] ins[10] 
-+ins[11] ins[12] ins[13] ins[14] ins[15] ins[16] ins[17] ins[18] ins[19] 
-+ins[1] ins[20] ins[21] ins[22] ins[23] ins[24] ins[25] ins[26] ins[27] 
-+ins[28] ins[29] ins[2] ins[30] ins[31] ins[32] ins[33] ins[34] ins[35] 
-+ins[36] ins[37] ins[38] ins[39] ins[3] ins[40] ins[41] ins[42] ins[43] 
-+ins[44] ins[45] ins[46] ins[47] ins[48] ins[49] ins[4] ins[50] ins[51] ins[5] 
-+ins[6] ins[7] ins[8] ins[9] ins[T] ship[10] ship[11] ship[12] ship[13] 
+XinDock in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] in[18] in[19] 
++in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] in[28] in[29] 
++in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] in[37] in[38] in[39] 
++in[3] in[40] in[41] in[42] in[43] in[44] in[45] in[46] in[47] in[48] in[49] 
++in[4] in[50] in[51] in[5] in[6] in[7] in[8] in[9] in[S] in[T] ins[10] ins[11] 
++ins[12] ins[13] ins[14] ins[15] ins[16] ins[17] ins[18] ins[19] ins[1] 
++ins[20] ins[21] ins[22] ins[23] ins[24] ins[25] ins[26] ins[27] ins[28] 
++ins[29] ins[2] ins[30] ins[31] ins[32] ins[33] ins[34] ins[35] ins[36] 
++ins[37] ins[38] ins[39] ins[3] ins[40] ins[41] ins[42] ins[43] ins[44] 
++ins[45] ins[46] ins[47] ins[48] ins[49] ins[4] ins[50] ins[51] ins[5] ins[6] 
++ins[7] ins[8] ins[9] ins[S] ins[T] ship[10] ship[11] ship[12] ship[13] 
 +ship[14] ship[15] ship[16] ship[17] ship[18] ship[19] ship[1] ship[20] 
 +ship[21] ship[22] ship[23] ship[24] ship[25] ship[26] ship[27] ship[28] 
 +ship[29] ship[2] ship[30] ship[31] ship[32] ship[33] ship[34] ship[35] 
@@ -1955,7 +10578,7 @@ XinsIn net@54[4] net@54[3] net@54[2] net@54[1] net@54[0] net@54[13]
 +net@47[5] net@47[4] scanInD[6] scanInD[7] scanInD[8] scanInD[9] net@53[8] 
 +scanInR[2] scanInR[3] scanInR[4] scanInR[5] scanInR[3] scanInR[2] scanInR[8] 
 +scanInR[9] scanInC[8] scanInD[8] scanInD[7] scanInD[6] net@57[5] net@57[4] 
-+scanInR[8] gnd properStopper
++scanInR[8] ins[S] properStopper
 XscanCap@0 scanInD[8] scanInD[7] scanInD[6] net@57[5] net@57[4] scanInD[9] 
 +scanCap
 XscanCap@1 scanInC[8] scanInC[2] scanInC[3] scanInC[4] scanInC[5] scanInC[9] 
diff --git a/testCode/isolatedInDock.xml b/testCode/isolatedInDock.xml
index d824f6d..a98eb25 100644
--- a/testCode/isolatedInDock.xml
+++ b/testCode/isolatedInDock.xml
@@ -33,226 +33,262 @@
 <!ENTITY marina_isolatedInDock_data_dataNets '
   <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.scanCell@0" net="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.scanCell@0_dIn[1](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xscanCell@0.xlatch2in@0.dataBar(WI)" />
   <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.scanCell@1" net="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.scanCell@1_dIn[1](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xscanCell@1.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[1].scanCell@2" net="xdatIn.net@1[51](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[1].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[2].scanCell@2" net="xdatIn.net@1[50](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[2].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[3].scanCell@2" net="xdatIn.net@1[49](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[3].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[4].scanCell@2" net="xdatIn.net@1[48](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[4].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[5].scanCell@2" net="xdatIn.net@1[47](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[5].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[6].scanCell@2" net="xdatIn.net@1[46](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[6].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[7].scanCell@2" net="xdatIn.net@1[45](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[7].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[8].scanCell@2" net="xdatIn.net@1[44](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[8].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[9].scanCell@2" net="xdatIn.net@1[43](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[9].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[10].scanCell@2" net="xdatIn.net@1[42](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[10].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[11].scanCell@2" net="xdatIn.net@1[41](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[11].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[12].scanCell@2" net="xdatIn.net@1[40](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[12].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[13].scanCell@2" net="xdatIn.net@1[39](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[13].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[14].scanCell@2" net="xdatIn.net@1[38](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[14].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[15].scanCell@2" net="xdatIn.net@1[37](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[15].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[16].scanCell@2" net="xdatIn.net@1[36](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[16].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[17].scanCell@2" net="xdatIn.net@1[35](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[17].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[18].scanCell@2" net="xdatIn.net@1[34](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[18].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[19].scanCell@2" net="xdatIn.net@1[33](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[19].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[20].scanCell@2" net="xdatIn.net@1[32](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[20].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[21].scanCell@2" net="xdatIn.net@1[31](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[21].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[22].scanCell@2" net="xdatIn.net@1[30](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[22].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[23].scanCell@2" net="xdatIn.net@1[29](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[23].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[24].scanCell@2" net="xdatIn.net@1[28](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[24].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[25].scanCell@2" net="xdatIn.net@1[27](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[25].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[26].scanCell@2" net="xdatIn.net@1[26](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[26].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[27].scanCell@2" net="xdatIn.net@1[25](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[27].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[28].scanCell@2" net="xdatIn.net@1[24](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[28].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[29].scanCell@2" net="xdatIn.net@1[23](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[29].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[30].scanCell@2" net="xdatIn.net@1[22](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[30].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[31].scanCell@2" net="xdatIn.net@1[21](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[31].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[32].scanCell@2" net="xdatIn.net@1[20](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[32].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[33].scanCell@2" net="xdatIn.net@1[19](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[33].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[34].scanCell@2" net="xdatIn.net@1[18](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[34].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[35].scanCell@2" net="xdatIn.net@1[17](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[35].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[36].scanCell@2" net="xdatIn.net@1[16](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[36].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.ls[37].scanCell@2" net="xdatIn.net@1[15](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[37].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.data1in3@0.latchWsc@1.scanCell@2" net="xdatIn.net@1[14](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xlatchWsc@1.xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.addr1in1@0.ls[1].scanCell@2" net="xdatIn.net@1[13](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xaddr1in1@0.xls[1].xscanCell@2.xlatch2in@0.dataBar(WI)" />
-  <datanet name="datIn.aFillSta@0.all1in52@1.addr1in1@0.ls[2].scanCell@2" net="xdatIn.net@1[12](R)" net2="xdatIn.xaFillSta@0.xall1in52@1.xaddr1in1@0.xls[2].xscanCell@2.xlatch2in@0.dataBar(WI)" />
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+  <datanet name="insIn.aFillSta@0.all1in52@1.data1in3@0.ls[32].scanCell@2" net="xinsIn.ps[32](R)" net2="xinsIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[32].xscanCell@2.xlatch2in@0.dataBar(WI)" />
+  <datanet name="insIn.aFillSta@0.all1in52@1.data1in3@0.ls[33].scanCell@2" net="xinsIn.ps[33](R)" net2="xinsIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[33].xscanCell@2.xlatch2in@0.dataBar(WI)" />
+  <datanet name="insIn.aFillSta@0.all1in52@1.data1in3@0.ls[34].scanCell@2" net="xinsIn.ps[34](R)" net2="xinsIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[34].xscanCell@2.xlatch2in@0.dataBar(WI)" />
+  <datanet name="insIn.aFillSta@0.all1in52@1.data1in3@0.ls[35].scanCell@2" net="xinsIn.ps[35](R)" net2="xinsIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[35].xscanCell@2.xlatch2in@0.dataBar(WI)" />
+  <datanet name="insIn.aFillSta@0.all1in52@1.data1in3@0.ls[36].scanCell@2" net="xinsIn.ps[36](R)" net2="xinsIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[36].xscanCell@2.xlatch2in@0.dataBar(WI)" />
+  <datanet name="insIn.aFillSta@0.all1in52@1.data1in3@0.ls[37].scanCell@2" net="xinsIn.ps[37](R)" net2="xinsIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xls[37].xscanCell@2.xlatch2in@0.dataBar(WI)" />
+  <datanet name="insIn.aFillSta@0.all1in52@1.data1in3@0.latchWsc@1.scanCell@2" net="xinsIn.ps[T](R)" net2="xinsIn.xaFillSta@0.xall1in52@1.xdata1in3@0.xlatchWsc@1.xscanCell@2.xlatch2in@0.dataBar(WI)" />
+  <datanet name="insIn.aFillSta@0.all1in52@1.addr1in1@0.ls[1].scanCell@2" net="xinsIn.ps[38](R)" net2="xinsIn.xaFillSta@0.xall1in52@1.xaddr1in1@0.xls[1].xscanCell@2.xlatch2in@0.dataBar(WI)" />
+  <datanet name="insIn.aFillSta@0.all1in52@1.addr1in1@0.ls[2].scanCell@2" net="xinsIn.ps[39](R)" net2="xinsIn.xaFillSta@0.xall1in52@1.xaddr1in1@0.xls[2].xscanCell@2.xlatch2in@0.dataBar(WI)" />
+  <datanet name="insIn.aFillSta@0.all1in52@1.addr1in1@0.ls[3].scanCell@2" net="xinsIn.ps[40](R)" net2="xinsIn.xaFillSta@0.xall1in52@1.xaddr1in1@0.xls[3].xscanCell@2.xlatch2in@0.dataBar(WI)" />
+  <datanet name="insIn.aFillSta@0.all1in52@1.addr1in1@0.ls[4].scanCell@2" net="xinsIn.ps[41](R)" net2="xinsIn.xaFillSta@0.xall1in52@1.xaddr1in1@0.xls[4].xscanCell@2.xlatch2in@0.dataBar(WI)" />
+  <datanet name="insIn.aFillSta@0.all1in52@1.addr1in1@0.ls[5].scanCell@2" net="xinsIn.ps[42](R)" net2="xinsIn.xaFillSta@0.xall1in52@1.xaddr1in1@0.xls[5].xscanCell@2.xlatch2in@0.dataBar(WI)" />
+  <datanet name="insIn.aFillSta@0.all1in52@1.addr1in1@0.ls[6].scanCell@2" net="xinsIn.ps[43](R)" net2="xinsIn.xaFillSta@0.xall1in52@1.xaddr1in1@0.xls[6].xscanCell@2.xlatch2in@0.dataBar(WI)" />
+  <datanet name="insIn.aFillSta@0.all1in52@1.addr1in1@0.ls[7].scanCell@2" net="xinsIn.ps[44](R)" net2="xinsIn.xaFillSta@0.xall1in52@1.xaddr1in1@0.xls[7].xscanCell@2.xlatch2in@0.dataBar(WI)" />
+  <datanet name="insIn.aFillSta@0.all1in52@1.addr1in1@0.ls[8].scanCell@2" net="xinsIn.ps[45](R)" net2="xinsIn.xaFillSta@0.xall1in52@1.xaddr1in1@0.xls[8].xscanCell@2.xlatch2in@0.dataBar(WI)" />
+  <datanet name="insIn.aFillSta@0.all1in52@1.addr1in1@0.ls[9].scanCell@2" net="xinsIn.ps[46](R)" net2="xinsIn.xaFillSta@0.xall1in52@1.xaddr1in1@0.xls[9].xscanCell@2.xlatch2in@0.dataBar(WI)" />
+  <datanet name="insIn.aFillSta@0.all1in52@1.addr1in1@0.ls[10].scanCell@2" net="xinsIn.ps[47](R)" net2="xinsIn.xaFillSta@0.xall1in52@1.xaddr1in1@0.xls[10].xscanCell@2.xlatch2in@0.dataBar(WI)" />
+  <datanet name="insIn.aFillSta@0.all1in52@1.addr1in1@0.ls[11].scanCell@2" net="xinsIn.ps[48](R)" net2="xinsIn.xaFillSta@0.xall1in52@1.xaddr1in1@0.xls[11].xscanCell@2.xlatch2in@0.dataBar(WI)" />
+  <datanet name="insIn.aFillSta@0.all1in52@1.addr1in1@0.ls[12].scanCell@2" net="xinsIn.ps[49](R)" net2="xinsIn.xaFillSta@0.xall1in52@1.xaddr1in1@0.xls[12].xscanCell@2.xlatch2in@0.dataBar(WI)" />
+  <datanet name="insIn.aFillSta@0.all1in52@1.addr1in1@0.ls[13].scanCell@2" net="xinsIn.ps[50](R)" net2="xinsIn.xaFillSta@0.xall1in52@1.xaddr1in1@0.xls[13].xscanCell@2.xlatch2in@0.dataBar(WI)" />
+  <datanet name="insIn.aFillSta@0.all1in52@1.addr1in1@0.ls[14].scanCell@2" net="xinsIn.ps[51](R)" net2="xinsIn.xaFillSta@0.xall1in52@1.xaddr1in1@0.xls[14].xscanCell@2.xlatch2in@0.dataBar(WI)" />
 '>
 <!ENTITY marina_isolatedInDock_report_dataNets '
   <datanet name="datIn.aFillSta@0.gaspPlai@0.scanEx2v@2.scanCell@1" net="net@24(R)" net2="xdatIn.xaFillSta@0.xgaspPlai@0.xscanEx2v@2.xscanCell@1.xlatch2in@0.dataBar(WI)" />
   <datanet name="datIn.aFillSta@0.gaspPlai@0.scanEx2v@2.scanCell@2" net="xdatIn.xaFillSta@0.xgaspPlai@0.fill(R)" net2="xdatIn.xaFillSta@0.xgaspPlai@0.xscanEx2v@2.xscanCell@2.xlatch2in@0.dataBar(WI)" />
   <datanet name="datIn.aDrainSt@0.gaspPlai@0.scanEx2v@1.scanCell@1" net="xdatIn.net@13(R)" net2="xdatIn.xaDrainSt@0.xgaspPlai@0.xscanEx2v@1.xscanCell@1.xlatch2in@0.dataBar(WI)" />
   <datanet name="datIn.aDrainSt@0.gaspPlai@0.scanEx2v@1.scanCell@2" net="xdatIn.xaDrainSt@0.xgaspPlai@0.stopped(R)" net2="xdatIn.xaDrainSt@0.xgaspPlai@0.xscanEx2v@1.xscanCell@2.xlatch2in@0.dataBar(WI)" />
+  <datanet name="inDock.ringSkip@0.ringFIFO@0.odRQstag@0.scanKhx5@0.scanCell@4" net="xinDock.xringSkip@0.xringFIFO@0.xodRQstag@0.s[1](R)" />
+  <datanet name="inDock.ringSkip@0.ringFIFO@0.odRQstag@0.scanKhx5@0.scanCell@5" net="xinDock.xringSkip@0.xringFIFO@0.xodRQstag@0.s[2](R)" />
+  <datanet name="inDock.ringSkip@0.ringFIFO@0.odRQstag@0.scanKhx5@0.scanCell@6" net="xinDock.xringSkip@0.xringFIFO@0.xodRQstag@0.s[3](R)" />
+  <datanet name="inDock.ringSkip@0.ringFIFO@0.odRQstag@0.scanKhx5@0.scanCell@7" net="xinDock.xringSkip@0.xringFIFO@0.xodRQstag@0.s[4](R)" />
+  <datanet name="inDock.ringSkip@0.ringFIFO@0.odRQstag@0.scanKhx5@0.scanCell@8" net="xinDock.xringSkip@0.xringFIFO@0.xodRQstag@0.s[5](R)" />
+  <datanet name="inDock.ringSkip@0.ringFIFO@0.split10@0.splitSta@0.anAltSta@0.scanKhx2@0.scanCell@1" net="xinDock.xringSkip@0.xringFIFO@0.xsplit10@0.xsplitSta@0.xanAltSta@0.s[1](R)" />
+  <datanet name="inDock.ringSkip@0.ringFIFO@0.split10@0.splitSta@0.anAltSta@0.scanKhx2@0.scanCell@2" net="xinDock.xringSkip@0.xringFIFO@0.xsplit10@0.xsplitSta@0.xanAltSta@0.s[2](R)" />
+  <datanet name="inDock.ringSkip@0.ringFIFO@0.split10@0.splitSta@1.splitSta@4.scanKhx2@0.scanCell@1" net="xinDock.xringSkip@0.xringFIFO@0.xsplit10@0.xsplitSta@1.xsplitSta@4.s[1](R)" />
+  <datanet name="inDock.ringSkip@0.ringFIFO@0.split10@0.splitSta@1.splitSta@4.scanKhx2@0.scanCell@2" net="xinDock.xringSkip@0.xringFIFO@0.xsplit10@0.xsplitSta@1.xsplitSta@4.s[2](R)" />
+  <datanet name="inDock.ringSkip@0.ringFIFO@0.split10@0.splitSta@2.splitSta@4.scanKhx2@0.scanCell@1" net="xinDock.xringSkip@0.xringFIFO@0.xsplit10@0.xsplitSta@2.xsplitSta@4.s[1](R)" />
+  <datanet name="inDock.ringSkip@0.ringFIFO@0.split10@0.splitSta@2.splitSta@4.scanKhx2@0.scanCell@2" net="xinDock.xringSkip@0.xringFIFO@0.xsplit10@0.xsplitSta@2.xsplitSta@4.s[2](R)" />
+  <datanet name="inDock.ringSkip@0.ringFIFO@0.split10@0.splitSta@2.splitSta@5.scanKhx2@0.scanCell@1" net="xinDock.xringSkip@0.xringFIFO@0.xsplit10@0.xsplitSta@2.xsplitSta@5.s[1](R)" />
+  <datanet name="inDock.ringSkip@0.ringFIFO@0.split10@0.splitSta@2.splitSta@5.scanKhx2@0.scanCell@2" net="xinDock.xringSkip@0.xringFIFO@0.xsplit10@0.xsplitSta@2.xsplitSta@5.s[2](R)" />
+  <datanet name="inDock.ringSkip@0.ringFIFO@0.split10@0.splitSta@1.splitSta@5.scanKhx2@0.scanCell@1" net="xinDock.xringSkip@0.xringFIFO@0.xsplit10@0.xsplitSta@1.xsplitSta@5.s[1](R)" />
+  <datanet name="inDock.ringSkip@0.ringFIFO@0.split10@0.splitSta@1.splitSta@5.scanKhx2@0.scanCell@2" net="xinDock.xringSkip@0.xringFIFO@0.xsplit10@0.xsplitSta@1.xsplitSta@5.s[2](R)" />
+  <datanet name="inDock.ringSkip@0.ringFIFO@0.split10@0.splitEnd@0.anAltEnd@1.scanKhx3@0.scanCell@4" net="xinDock.xringSkip@0.xringFIFO@0.xsplit10@0.xsplitEnd@0.xanAltEnd@1.ss[1](R)" />
+  <datanet name="inDock.ringSkip@0.ringFIFO@0.split10@0.splitEnd@0.anAltEnd@1.scanKhx3@0.scanCell@5" net="xinDock.xringSkip@0.xringFIFO@0.xsplit10@0.xsplitEnd@0.xanAltEnd@1.ss[2](R)" />
+  <datanet name="inDock.ringSkip@0.ringFIFO@0.split10@0.splitEnd@0.anAltEnd@1.scanKhx3@0.scanCell@6" net="xinDock.xringSkip@0.xringFIFO@0.xsplit10@0.xsplitEnd@0.xanAltEnd@1.ss[3](R)" />
+  <datanet name="inDock.ringSkip@0.ringFIFO@0.m12stage@0.m1stageD@1.scanKhx2@0.scanCell@1" net="xinDock.xringSkip@0.xringFIFO@0.xm12stage@0.s[m2](R)" />
+  <datanet name="inDock.ringSkip@0.ringFIFO@0.m12stage@0.m1stageD@1.scanKhx2@0.scanCell@2" net="xinDock.xringSkip@0.xringFIFO@0.xm12stage@0.xm1stageD@1.s[m1](R)" />
+  <datanet name="inDock.ringSkip@0.skipCoun@0.scanKx7@0.scanCell@4" net="xinDock.xringSkip@0.xskipCoun@0.net@129[6](R)" />
+  <datanet name="inDock.ringSkip@0.skipCoun@0.scanKx7@0.scanCell@5" net="xinDock.xringSkip@0.xskipCoun@0.net@129[5](R)" />
+  <datanet name="inDock.ringSkip@0.skipCoun@0.scanKx7@0.scanCell@6" net="xinDock.xringSkip@0.xskipCoun@0.net@129[4](R)" />
+  <datanet name="inDock.ringSkip@0.skipCoun@0.scanKx7@0.scanCell@7" net="xinDock.xringSkip@0.xskipCoun@0.net@129[3](R)" />
+  <datanet name="inDock.ringSkip@0.skipCoun@0.scanKx7@0.scanCell@8" net="xinDock.xringSkip@0.xskipCoun@0.net@129[2](R)" />
+  <datanet name="inDock.ringSkip@0.skipCoun@0.scanKx7@0.scanCell@9" net="xinDock.xringSkip@0.xskipCoun@0.net@129[1](R)" />
+  <datanet name="inDock.ringSkip@0.skipCoun@0.scanKx7@0.scanCell@10" net="xinDock.xringSkip@0.xskipCoun@0.net@129[0](R)" />
+  <datanet name="inDock.ringSkip@0.skipCoun@0.scanKx6@0.scanCell@4" net="xinDock.xringSkip@0.xskipCoun@0.net@130[5](R)" />
+  <datanet name="inDock.ringSkip@0.skipCoun@0.scanKx6@0.scanCell@5" net="xinDock.xringSkip@0.xskipCoun@0.net@130[4](R)" />
+  <datanet name="inDock.ringSkip@0.skipCoun@0.scanKx6@0.scanCell@6" net="xinDock.xringSkip@0.xskipCoun@0.net@130[3](R)" />
+  <datanet name="inDock.ringSkip@0.skipCoun@0.scanKx6@0.scanCell@7" net="xinDock.xringSkip@0.xskipCoun@0.net@130[2](R)" />
+  <datanet name="inDock.ringSkip@0.skipCoun@0.scanKx6@0.scanCell@8" net="xinDock.xringSkip@0.xskipCoun@0.net@130[1](R)" />
+  <datanet name="inDock.ringSkip@0.skipCoun@0.scanKx6@0.scanCell@9" net="xinDock.xringSkip@0.xskipCoun@0.net@130[0](R)" />
+  <datanet name="inDock.ringSkip@0.skipCoun@0.scanKx3@0.scanCell@4" net="xinDock.xringSkip@0.xskipCoun@0.flag[C](R)" />
+  <datanet name="inDock.ringSkip@0.skipCoun@0.scanKx3@0.scanCell@5" net="xinDock.xringSkip@0.xskipCoun@0.flag[B](R)" />
+  <datanet name="inDock.ringSkip@0.skipCoun@0.scanKx3@0.scanCell@6" net="xinDock.xringSkip@0.xskipCoun@0.flag[A](R)" />
   <datanet name="inDock.plainSta@0.stg[1].gaspPlai@0.scanEx1v@0.scanCell@1" net="in[S](R)" net2="xinDock.xplainSta@0.xstg[1].xgaspPlai@0.xscanEx1v@0.xscanCell@1.xlatch2in@0.dataBar(WI)" />
   <datanet name="inDock.plainSta@0.stg[2].gaspPlai@0.scanEx1v@0.scanCell@1" net="xinDock.xplainSta@0.net@55(R)" net2="xinDock.xplainSta@0.xstg[2].xgaspPlai@0.xscanEx1v@0.xscanCell@1.xlatch2in@0.dataBar(WI)" />
   <datanet name="inDock.plainSta@0.stg[3].gaspPlai@0.scanEx1v@0.scanCell@1" net="xinDock.xplainSta@0.net@56(R)" net2="xinDock.xplainSta@0.xstg[3].xgaspPlai@0.xscanEx1v@0.xscanCell@1.xlatch2in@0.dataBar(WI)" />
@@ -270,6 +306,54 @@
   <datanet name="insIn.aDrainSt@0.gaspPlai@0.scanEx2v@1.scanCell@1" net="xinsIn.net@13(R)" net2="xinsIn.xaDrainSt@0.xgaspPlai@0.xscanEx2v@1.xscanCell@1.xlatch2in@0.dataBar(WI)" />
   <datanet name="insIn.aDrainSt@0.gaspPlai@0.scanEx2v@1.scanCell@2" net="xinsIn.xaDrainSt@0.xgaspPlai@0.stopped(R)" net2="xinsIn.xaDrainSt@0.xgaspPlai@0.xscanEx2v@1.xscanCell@2.xlatch2in@0.dataBar(WI)" />
 '>
+<!ENTITY dockPartOD_ringSkip_sin '
+	<subchain name="skipCoun@0"> &dockPartOD_skipCount_sin; </subchain>
+'>
+<!ENTITY dockPartOD_ringSkip_sin_1 '
+	<subchain name="ringFIFO@0"> &fifoL_ringFIFO_sin; </subchain>
+'>
+<!ENTITY dockPartOD_skipCount_sin '
+	<subchain name="scanKx7@0"> &scanK_scanKx7_sin; </subchain>
+	<subchain name="scanKx6@0"> &scanK_scanKx6_sin; </subchain>
+	<subchain name="scanKx3@0"> &scanK_scanKx3_sin; </subchain>
+'>
+<!ENTITY fifoL_m12stageD_sin '
+	<subchain name="m1stageD@1"> &fifoL_m1stageD_sin; </subchain>
+'>
+<!ENTITY fifoL_m1stageD_sin '
+	<subchain name="scanKhx2@0"> &scanK_scanKhx2_sin; </subchain>
+'>
+<!ENTITY fifoL_odRQstageD_sin '
+	<subchain name="scanKhx5@0"> &scanK_scanKhx5_sin; </subchain>
+'>
+<!ENTITY fifoL_ringFIFO_sin '
+	<subchain name="odRQstag@0"> &fifoL_odRQstageD_sin; </subchain>
+	<subchain name="split10@0"> &fifoL_split10_sin; </subchain>
+	<subchain name="m12stage@0"> &fifoL_m12stageD_sin; </subchain>
+'>
+<!ENTITY fifoL_split10_sin '
+	<subchain name="splitSta@0"> &fifoL_splitStart_sin; </subchain>
+	<subchain name="splitSta@1"> &fifoL_splitStageDx4_sin_1_; </subchain>
+	<subchain name="splitSta@2"> &fifoL_splitStageDx4_sin_1_; </subchain>
+	<subchain name="splitSta@2_sin[2]"> &fifoL_splitStageDx4_sin_2_; </subchain>
+	<subchain name="splitSta@1_sin[2]"> &fifoL_splitStageDx4_sin_2_; </subchain>
+	<subchain name="splitEnd@0"> &fifoL_splitEnd_sin; </subchain>
+'>
+<!ENTITY fifoL_splitEnd_sin '
+	<subchain name="anAltEnd@1"> &gaspL_anAltEndS_sin; </subchain>
+'>
+<!ENTITY fifoL_splitStageDx2_sin '
+	<subchain name="scanKhx2@0"> &scanK_scanKhx2_sin; </subchain>
+'>
+<!ENTITY fifoL_splitStageDx4_sin_1_ '
+	<subchain name="splitSta@4"> &fifoL_splitStageDx2_sin; </subchain>
+'>
+<!ENTITY fifoL_splitStageDx4_sin_2_ '
+	<subchain name="splitSta@5"> &fifoL_splitStageDx2_sin; </subchain>
+'>
+<!ENTITY fifoL_splitStart_sin '
+	<subchain name="anAltSta@0"> &gaspL_anAltStartS_sin; </subchain>
+'>
 <!ENTITY gaspJ_gaspDrain_sic_1_ '
 	<subchain name="scanFx3h@0"> &scanJ_scanFx3hor_sic_1_; </subchain>
 '>
@@ -285,10 +369,18 @@
 <!ENTITY gaspJ_gaspPlain_sir_1_ '
 	<subchain name="scanEx1v@0"> &scanJ_scanEx1vertA_sir_1_; </subchain>
 '>
+<!ENTITY gaspL_anAltEndS_sin '
+	<subchain name="scanKhx3@0"> &scanK_scanKhx3_sin; </subchain>
+'>
+<!ENTITY gaspL_anAltStartS_sin '
+	<subchain name="scanKhx2@0"> &scanK_scanKhx2_sin; </subchain>
+'>
 <!ENTITY latchGroupsK_latchWscan_sin '
 	<subchain name="scanCell@2" length="1" access="RW" clears="-" />
 '>
 <!ENTITY marina_inputDock_sin '
+	<subchain name="ringSkip@0"> &dockPartOD_ringSkip_sin_1; </subchain>
+	<subchain name="ringSkip@0_sin"> &dockPartOD_ringSkip_sin; </subchain>
 	<subchain name="plainSta@0"> &stageGroupsJ_plainStageFour_rscanIn_1_; </subchain>
 '>
 <!ENTITY registersJ_addr1in14scan_sin '
@@ -369,6 +461,44 @@
 	<subchain name="scanCell@1" length="1" access="RW" clears="L" />
 	<subchain name="scanCell@3" length="1" access="RW" clears="L" />
 '>
+<!ENTITY scanK_scanKhx2_sin '
+	<subchain name="scanCell@1" length="1" access="R" clears="-" />
+	<subchain name="scanCell@2" length="1" access="R" clears="-" />
+'>
+<!ENTITY scanK_scanKhx3_sin '
+	<subchain name="scanCell@4" length="1" access="R" clears="-" />
+	<subchain name="scanCell@5" length="1" access="R" clears="-" />
+	<subchain name="scanCell@6" length="1" access="R" clears="-" />
+'>
+<!ENTITY scanK_scanKhx5_sin '
+	<subchain name="scanCell@4" length="1" access="R" clears="-" />
+	<subchain name="scanCell@5" length="1" access="R" clears="-" />
+	<subchain name="scanCell@6" length="1" access="R" clears="-" />
+	<subchain name="scanCell@7" length="1" access="R" clears="-" />
+	<subchain name="scanCell@8" length="1" access="R" clears="-" />
+'>
+<!ENTITY scanK_scanKx3_sin '
+	<subchain name="scanCell@4" length="1" access="R" clears="-" />
+	<subchain name="scanCell@5" length="1" access="R" clears="-" />
+	<subchain name="scanCell@6" length="1" access="R" clears="-" />
+'>
+<!ENTITY scanK_scanKx6_sin '
+	<subchain name="scanCell@4" length="1" access="R" clears="-" />
+	<subchain name="scanCell@5" length="1" access="R" clears="-" />
+	<subchain name="scanCell@6" length="1" access="R" clears="-" />
+	<subchain name="scanCell@7" length="1" access="R" clears="-" />
+	<subchain name="scanCell@8" length="1" access="R" clears="-" />
+	<subchain name="scanCell@9" length="1" access="R" clears="-" />
+'>
+<!ENTITY scanK_scanKx7_sin '
+	<subchain name="scanCell@4" length="1" access="R" clears="-" />
+	<subchain name="scanCell@5" length="1" access="R" clears="-" />
+	<subchain name="scanCell@6" length="1" access="R" clears="-" />
+	<subchain name="scanCell@7" length="1" access="R" clears="-" />
+	<subchain name="scanCell@8" length="1" access="R" clears="-" />
+	<subchain name="scanCell@9" length="1" access="R" clears="-" />
+	<subchain name="scanCell@10" length="1" access="R" clears="-" />
+'>
 <!ENTITY stageGroupsJ_plainStageFour_rscanIn_1_ '
 	<subchain name="stg[1]"> &stagesJ_plainStage_sir_1_; </subchain>
 	<subchain name="stg[2]"> &stagesJ_plainStage_sir_1_; </subchain>
diff --git a/testCode/marina.bsh b/testCode/marina.bsh
index a067659..f61e564 100644
--- a/testCode/marina.bsh
+++ b/testCode/marina.bsh
@@ -15,6 +15,7 @@ import com.sun.electric.plugins.menus.ScanChainXML;
   // Both data out and data out bar must be specified or left out.
   gen.addScanChainElement("scanJ", "scanCellE", "RW", "-", "sin", "sout", "dIn[1](R)", "latch2in@0.dataBar(WI)");
   gen.addScanChainElement("scanJ", "scanCellF", "RW", "L", "sin", "sout", "dout[1](R)", "latch2in@1.dataBar(WI)");
+  gen.addScanChainElement("scanK", "scanCellKh", "R", "-", "sin", "sout", "din[1](R)", "");
   //gen.addScanChainElement("latchGroupsK", "latchWscan", "RW", "-", "sin", "sout", "scanCell@2.latch2in@0.dataBar(WI)", "out[1](R)");
   //gen.addScanChainElement("latchGroupsK", "latchWscan", "RW", "-", "sin", "sout", "hi2inLat@1.dataBar(WI)", "out[1](R)");
 
-- 
1.7.10.4