From 1a69440d18caad49aca1620a0e37ac4c9b4ef836 Mon Sep 17 00:00:00 2001 From: megacz Date: Sun, 11 Jan 2009 11:08:57 -0800 Subject: [PATCH] eliminate need for a register for the _f flag in the Fpga version --- src/edu/berkeley/fleet/fpga/Fpga.java | 76 +++++++++++++++++---------------- 1 file changed, 39 insertions(+), 37 deletions(-) diff --git a/src/edu/berkeley/fleet/fpga/Fpga.java b/src/edu/berkeley/fleet/fpga/Fpga.java index dc4e878..44e9f91 100644 --- a/src/edu/berkeley/fleet/fpga/Fpga.java +++ b/src/edu/berkeley/fleet/fpga/Fpga.java @@ -177,7 +177,8 @@ public class Fpga extends FleetTwoFleet { pw.println("`define "+name+"_full ("+name+"_r && !"+name+"_a)"); pw.println("`define "+name+"_empty (!"+name+"_r && !"+name+"_a)"); if (dd.isInputDock()) { - pw.println("`define drain_"+name+" if ("+name+"_r && !"+name+"_a) "+name+"_a <= 1;"); + //pw.println("`define drain_"+name+" if ("+name+"_r && !"+name+"_a) "+name+"_a <= 1;"); + pw.println("`define drain_"+name+" "+name+"_a <= 1;"); } else { pw.println("`define fill_"+name+" "+name+"_r <= 1;"); } @@ -186,49 +187,50 @@ public class Fpga extends FleetTwoFleet { pw.print("`define reset "); for(DockDescription bb : sd.ports()) { String bb_name = bb.getName(); - if (bb.isInputDock()) pw.print(bb_name+"_a <= 1; "+bb_name+"_f <= 0; "); + if (bb.isInputDock()) pw.print(bb_name+"_a <= 1; "); else pw.print(bb_name+"_r <= 0; "); } pw.println(); pw.print("`define cleanup "); - for(DockDescription bb : sd.ports()) { - String bb_name = bb.getName(); - if (bb.isInputDock()) pw.print("if (!"+bb_name+"_r && "+bb_name+"_a) "+bb_name+"_a <= 0; "); - else pw.print("if ( "+bb_name+"_r && "+bb_name+"_a) "+bb_name+"_r <= 0; "); - } + + // output docks + for(DockDescription dd : sd.ports()) + if (!dd.isInputDock()) + pw.print("if ( "+dd.getName()+"_r && "+dd.getName()+"_a) "+dd.getName()+"_r <= 0; "); + + // input docks: if all inputs are flushing, drain them all + pw.print("if (1"); for(DockDescription bb : sd.ports()) if (bb.isInputDock()) - pw.print(" if (!"+bb.getName()+"_r_) "+bb.getName()+"_f <= 0; "); - pw.print("if (1"); + pw.print(" && "+bb.getName()+"_f"); + pw.print(") begin "); + for(DockDescription bb : sd.ports()) + if (bb.isInputDock()) + pw.print(bb.getName()+"_a <= 1; "); + + // input docks: if no inputs are flushing, do normal stuff + pw.print("end else if (1"); for(DockDescription bb : sd.ports()) if (bb.isInputDock()) - pw.print(" && "+bb.getName()+"_r_ && !"+bb.getName()+"_a"); + pw.print(" && !"+bb.getName()+"_f"); pw.print(") begin "); - if (true) { - pw.print("if (1"); - for(DockDescription bb : sd.ports()) - if (bb.isInputDock()) - pw.print(" && "+bb.getName()+"_d["+WIDTH_WORD+"] "); - pw.print(") begin "); - if (true) { - for(DockDescription bb : sd.ports()) - if (bb.isInputDock()) - pw.print(bb.getName()+"_f <= 1; "); - } - pw.print(" end else if (0"); - for(DockDescription bb : sd.ports()) - if (bb.isInputDock()) - pw.print(" || "+bb.getName()+"_d["+WIDTH_WORD+"] "); - pw.print(") begin "); - if (true) { - for(DockDescription bb : sd.ports()) - if (bb.isInputDock()) - pw.print(" if (!"+bb.getName()+"_d["+WIDTH_WORD+"]) "+bb.getName()+"_f <= 1; "); + + for(DockDescription bb : sd.ports()) + if (bb.isInputDock()) + pw.print("if (!"+bb.getName()+"_r_ && "+bb.getName()+"_a) "+bb.getName()+"_a <= 0; "); + + // input docks: if some-but-not-all inputs are flushing, drain all non-flushing docks + pw.print("end else begin "); + + for(DockDescription bb : sd.ports()) + if (bb.isInputDock()) { + pw.print("if (!"+bb.getName()+"_r && "+bb.getName()+"_a) "+bb.getName()+"_a <= 0; "); + pw.print("if ("+bb.getName()+"_r && !"+bb.getName()+"_a) "+bb.getName()+"_a <= 1; "); } - pw.print(" end "); - } - pw.print(" end "); + + pw.print(" end"); + pw.println(); pw.println("module " + filename + "( clk, rst "); @@ -279,9 +281,9 @@ public class Fpga extends FleetTwoFleet { pw.println(" output "+bb_name+"_a_;"); pw.println(" reg "+bb_name+"_a;"); pw.println(" initial "+bb_name+"_a = 0;"); - pw.println(" reg "+bb_name+"_f;"); - pw.println(" initial "+bb_name+"_f = 0;"); - pw.println(" assign "+bb_name+"_a_ = "+bb_name+"_a || "+bb_name+"_f;"); + pw.println(" wire "+bb_name+"_f;"); + pw.println(" assign "+bb_name+"_f = "+bb_name+"_r_ & "+bb_name+"_d["+width+"] && ~"+bb_name+"_a;"); + pw.println(" assign "+bb_name+"_a_ = "+bb_name+"_a;"); } else { pw.println(" output ["+width+":0] "+bb_name+"_d_;"); pw.println(" input "+bb_name+"_a;"); @@ -305,7 +307,7 @@ public class Fpga extends FleetTwoFleet { pw.println(" end else begin"); pw.println(" `cleanup"); pw.println(" out_r <= out_r__;"); - pw.println(" in_a <= in_a__;"); + pw.println(" if (in_a__) in_a <= 1;"); pw.println(" end"); pw.println(" end"); } else { -- 1.7.10.4