From 245238ccb01e1c7634e646c9aca1aba3cda16ac8 Mon Sep 17 00:00:00 2001 From: adam Date: Mon, 10 Nov 2008 13:37:24 +0100 Subject: [PATCH] tweak Verilog logic --- src/edu/berkeley/fleet/fpga/verilog/Verilog.java | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/edu/berkeley/fleet/fpga/verilog/Verilog.java b/src/edu/berkeley/fleet/fpga/verilog/Verilog.java index 9ad420d..0cbe193 100644 --- a/src/edu/berkeley/fleet/fpga/verilog/Verilog.java +++ b/src/edu/berkeley/fleet/fpga/verilog/Verilog.java @@ -464,7 +464,7 @@ public class Verilog { if (driver != null) { sb.append("assign " + name +"_r = " + driver.name + "_r;\n"); sb.append("assign " + driver.name +"_a = " + name + "_a;\n"); - if (width>0 && !noDriveLatches) + if (width>0 && !noDriveLatches && latchDriver==null) sb.append("assign " + name +" = " + driver.name + ";\n"); } if (latchDriver != null) { -- 1.7.10.4