From 332238730520d90d41d58330096fa10aa5542139 Mon Sep 17 00:00:00 2001 From: jlexau Date: Fri, 5 Jun 2009 18:57:00 +0000 Subject: [PATCH] added vdd/gnd exports at corner of esd block --- electric/edgesM.jelib | 18 +++++++++--------- electric/fillM.jelib | 17 ++++++++++------- electric/marina_padframe.delib/header | 1 + electric/marina_padframe.delib/marinaPadframe.lay | 15 +++++---------- 4 files changed, 25 insertions(+), 26 deletions(-) diff --git a/electric/edgesM.jelib b/electric/edgesM.jelib index 07e441c..8b616dd 100644 --- a/electric/edgesM.jelib +++ b/electric/edgesM.jelib @@ -12,17 +12,15 @@ Vschematic|sch LfillM|fillM # Tools: -Ouser|DefaultTechnology()Sartwork|SchematicTechnology()Scmos90 +Ouser|DefaultTechnology()Scmos90|SchematicTechnology()Scmos90 Oio|GDSOutputConvertsBracketsInExports()BF|GDSWritesExportPins()BT +OGateLayoutGenerator|enableNCC()SPurpleFour +OSTA|GlobalSDCCommands()S"\n### clock setup\ncreate_clock -period 0.400 -name clk -waveform \"0 0.200\" clk\nset_clock_uncertainty -setup 0.015 clk\nset_clock_uncertainty -hold 0.015 clk\nset_propagated_clock clk\nset_clock_transition -rise 0.025 clk\nset_clock_transition -fall 0.025 clk\n#set_driving_cell -lib_cell inv_X008_0 clk\n" # Technologies: -Tcmos|ScaleFORcmos()D1000.0 -Tcmos90|"GDS(ST)LayerForPad-FrameINcmos90"()S43|"GDS(ST)LayerForPassivationINcmos90"()S169|"GDS(TSMC)LayerForPad-FrameINcmos90"()S43|"GDS(TSMC)LayerForPassivationINcmos90"()S169 -Tmocmos|ScaleFORmocmos()D100.0|SelectedFoundryFormocmos()STSMC -Tmocmosold|CapacitanceParasiticForD-ActiveINmocmosold()D0.10000000149011612|CapacitanceParasiticForMetal-1INmocmosold()D0.029999999329447746|CapacitanceParasiticForMetal-2INmocmosold()D0.029999999329447746|CapacitanceParasiticForPolysiliconINmocmosold()D0.03999999910593033|CapacitanceParasiticForS-ActiveINmocmosold()D0.10000000149011612|ResistanceParasiticForMetal-1INmocmosold()D0.029999999329447746|ResistanceParasiticForMetal-2INmocmosold()D0.029999999329447746 -Tmocmossub|CapacitanceParasiticForMetal-1INmocmossub()D0.07000000029802322|CapacitanceParasiticForMetal-2INmocmossub()D0.03999999910593033|CapacitanceParasiticForMetal-3INmocmossub()D0.03999999910593033|CapacitanceParasiticForMetal-4INmocmossub()D0.03999999910593033|CapacitanceParasiticForMetal-5INmocmossub()D0.03999999910593033|CapacitanceParasiticForMetal-6INmocmossub()D0.03999999910593033|CapacitanceParasiticForN-ActiveINmocmossub()D0.8999999761581421|CapacitanceParasiticForP-ActiveINmocmossub()D0.8999999761581421|CapacitanceParasiticForPolysilicon-1INmocmossub()D0.09000000357627869|ResistanceParasiticForMetal-1INmocmossub()D0.05999999865889549|ResistanceParasiticForMetal-2INmocmossub()D0.05999999865889549|ResistanceParasiticForMetal-3INmocmossub()D0.05999999865889549|ResistanceParasiticForMetal-4INmocmossub()D0.029999999329447746|ResistanceParasiticForMetal-5INmocmossub()D0.029999999329447746|ResistanceParasiticForMetal-6INmocmossub()D0.029999999329447746|ResistanceParasiticForPoly-CutINmocmossub()D2.200000047683716|ResistanceParasiticForVia2INmocmossub()D0.8999999761581421|ResistanceParasiticForVia3INmocmossub()D0.800000011920929|ResistanceParasiticForVia4INmocmossub()D0.800000011920929|ResistanceParasiticForVia5INmocmossub()D0.800000011920929 -Tnmos|CapacitanceParasiticForDiffusionINnmos()D0.10000000149011612|CapacitanceParasiticForMetalINnmos()D0.029999999329447746|CapacitanceParasiticForPolysiliconINnmos()D0.03999999910593033|ResistanceParasiticForMetalINnmos()D0.029999999329447746 -Trcmos|ScaleFORrcmos()D1000.0 +Tartwork|SelectedFoundryForartwork()S"" +Tcmos90|"GDS(TSMC)LayerForOD33INcmos90"()S111 +Ttft|SelectedFoundryFortft()SMOSIS # Cell aPinList;1{doc} CaPinList;1{doc}||artwork|1241172553626|1241177325843||FACET_message()S[This is a list of the pins for Marina,IES 1 May 2009,"",WEST PINS (read down),"",01 Vdd,02 Gnd,03 Vdd,04 Gnd,05 Vdd ,06 Gnd ,07 Vdd ,08 Gnd,09 Vdd,10 Gnd,"",11 I/O,12 raw pin,13 Vdd,14 I/O,15 Vdd,16 Gnd,17 Vdd,18 Gnd,19 Vdd,20 Gnd,"",21 Vdd,22 Gnd,23 I/O,24 I/O,25 Vdd,26 raw pin,27 Vdd,28 Gnd,29 I/O,30 I/O,"",SOUTH PINS (read left to right),"",31 Vdd,32 Gnd,33 I/O,34 raw pin,35 Vdd,36 I/O,37 Vdd,38 Gnd,39 Vdd,40 Gnd,"",41Vdd,42 Gnd,43 Vdd,44 Gnd,45 I/O,46 raw pin,47 Vdd,48 Gnd,49 Vdd,50 Gnd,"",51I/O,52 raw pin,53 Vdd,54 Gnd,55 Vdd,56 Gnd,57 Vdd,58 Gnd,59 Vdd,60 Gnd,"",EAST PINS (read up),"",61 Vdd,62 Gnd,63 Vdd,64 Gnd,65 I/O,66 raw pin,67 Vdd,68 Gnd,69 I/O,"",70 raw pin,71 Vdd,72 Gnd,73 Vdd,74 Gnd,75 Vdd,76 Gnd,77 Vdd,78 Gnd,79 Vdd,"",80 Gnd,81 Vdd,82 Gnd,83 I/O,84 raw pin,85 Vdd,86 I/O,87 Vdd,88 Gnd,89 Vdd,90 Gnd,"",NORTH PINS (read right to left),"",91 Vdd,92 Gnd,93 Vdd,94 Gnd,95 Vdd,96 Gnd,97 Vdd,98 Gnd,99 Vdd,100 Gnd,"",101 Vdd,102 Gnd,103 Vdd,104 Gnd,105 raw pin (Vdd sample?),106 raw pin (Gnd sample?),107 Vdd,108 Gnd,109 Vdd,110 Gnd,"",111 Vdd,112 Gnd,113 Vdd,114 Gnd,115 Vdd,116 Gnd,117 Vdd,118 Gnd,119 Vdd,120 Gnd,"","","","","",""] @@ -15261,7 +15259,7 @@ AThicker|net@7|||FS2700|pin@8||-5|-5|pin@5||-5|5 X # Cell filledFrame;1{lay} -CfilledFrame;1{lay}||cmos90|1239560592240|1243553385355| +CfilledFrame;1{lay}||cmos90|1239560592240|1244228048191| Ngeneric:Facet-Center|art@0||0|0||||AV Iframe;1{lay}|frame@0||0|0|||D5G4; IfillM:marinaFill;1{lay}|marinaFi@0||0|0|||D5G4; @@ -21964,6 +21962,7 @@ Egnd_4364||D5G5;|marinaFi@0|gnd_4364|G Egnd_4365||D5G5;|marinaFi@0|gnd_4365|G Egnd_4366||D5G5;|marinaFi@0|gnd_4366|G Egnd_4367||D5G5;|marinaFi@0|gnd_4367|G +Egnd_4368||D5G2;|marinaFi@0|gnd_4368|G Evdd_1681|vdd|D5G7;|frame@0|vdd_1692|P EvddM3M||D5G6;|frame@0|vddM3M|P Evdd_1686|vdd_27|D5G7;|frame@0|vdd_1697|P @@ -23095,6 +23094,7 @@ Evdd_4343||D5G5;|marinaFi@0|vdd_4343|P Evdd_4344||D5G5;|marinaFi@0|vdd_4344|P Evdd_4345||D5G5;|marinaFi@0|vdd_4345|P Evdd_4346||D5G5;|marinaFi@0|vdd_4346|P +Evdd_4347||D5G2;|marinaFi@0|vdd_4347|P X # Cell filledFrame;1{sch} diff --git a/electric/fillM.jelib b/electric/fillM.jelib index 2aa2679..6685f21 100644 --- a/electric/fillM.jelib +++ b/electric/fillM.jelib @@ -1,5 +1,5 @@ # header information: -HfillM|8.09a +HfillM|8.09k # Views: Vicon|ic @@ -11,14 +11,15 @@ Vschematic|sch LorangeTSMC090nm|orangeTSMC090nm # Tools: -Ouser|DefaultTechnology()Sartwork|SchematicTechnology()Scmos90 +Ouser|DefaultTechnology()Scmos90|SchematicTechnology()Scmos90 Oio|GDSOutputConvertsBracketsInExports()BF|GDSWritesExportPins()BT +OGateLayoutGenerator|enableNCC()SPurpleFour +OSTA|GlobalSDCCommands()S"\n### clock setup\ncreate_clock -period 0.400 -name clk -waveform \"0 0.200\" clk\nset_clock_uncertainty -setup 0.015 clk\nset_clock_uncertainty -hold 0.015 clk\nset_propagated_clock clk\nset_clock_transition -rise 0.025 clk\nset_clock_transition -fall 0.025 clk\n#set_driving_cell -lib_cell inv_X008_0 clk\n" # Technologies: -Tcmos|ScaleFORcmos()D1000.0 -Tcmos90|"GDS(ST)LayerForPad-FrameINcmos90"()S43|"GDS(ST)LayerForPassivationINcmos90"()S169|"GDS(TSMC)LayerForPad-FrameINcmos90"()S43|"GDS(TSMC)LayerForPassivationINcmos90"()S169 -Tmocmos|ScaleFORmocmos()D100.0|SelectedFoundryFormocmos()STSMC -Trcmos|ScaleFORrcmos()D1000.0 +Tartwork|SelectedFoundryForartwork()S"" +Tcmos90|"GDS(TSMC)LayerForOD33INcmos90"()S111 +Ttft|SelectedFoundryFortft()SMOSIS # Cell fill1to4ANY;1{lay} Cfill1to4ANY;1{lay}||cmos90|1238154709550|1241212843263| @@ -21701,7 +21702,7 @@ Awire|net@6|||0|pin@2||8.5|-4.5|pin@3||1|-4.5 X # Cell marinaFill;1{lay} -CmarinaFill;1{lay}||cmos90|1239560269629|1243551591457| +CmarinaFill;1{lay}||cmos90|1239560269629|1244228043491| Ngeneric:Facet-Center|art@0||0|0||||AV IfillAll174x174;1{lay}|fillAll1@1||12528|-12528|||D5G4; IfillAll174x174;1{lay}|fillAll1@2||-12528|12528|||D5G4; @@ -29690,6 +29691,7 @@ Egnd_4364||D5G5;|fillAll1@2|gnd_714|G Egnd_4365||D5G5;|fillAll1@2|gnd_715|G Egnd_4366||D5G5;|fillAll1@2|gnd_718|G Egnd_4367||D5G5;|fillAll1@2|gnd_719|G +Egnd_4368||D5G2;|fillAll1@3|gnd_572|G Evdd||D5G5;|fillAll1@2|vdd|P Evdd_1||D5G5;|fillAll2@10|vdd_1|P Evdd_2||D5G5;|fillAll1@2|vdd_2|P @@ -33598,4 +33600,5 @@ Evdd_4343||D5G5;|fillAll1@2|vdd_711|P Evdd_4344||D5G5;|fillAll1@2|vdd_712|P Evdd_4345||D5G5;|fillAll1@2|vdd_713|P Evdd_4346||D5G5;|fillAll1@2|vdd_716|P +Evdd_4347||D5G2;|fillAll1@2|vdd_846|P X diff --git a/electric/marina_padframe.delib/header b/electric/marina_padframe.delib/header index d1c9bf5..8ad4dd5 100755 --- a/electric/marina_padframe.delib/header +++ b/electric/marina_padframe.delib/header @@ -16,3 +16,4 @@ OSTA|GlobalSDCCommands()S"\n### clock setup\ncreate_clock -period 0.400 -name cl Tartwork|SelectedFoundryForartwork()S"" Tcmos90|"GDS(TSMC)LayerForOD33INcmos90"()S111 Ttft|SelectedFoundryFortft()SMOSIS +C____SEARCH_FOR_CELL_FILES____ diff --git a/electric/marina_padframe.delib/marinaPadframe.lay b/electric/marina_padframe.delib/marinaPadframe.lay index ea660c7..d5a7f86 100644 --- a/electric/marina_padframe.delib/marinaPadframe.lay +++ b/electric/marina_padframe.delib/marinaPadframe.lay @@ -1,4 +1,4 @@ -Hmarina_padframe|8.09a +Hmarina_padframe|8.09k # External Libraries: @@ -9,7 +9,7 @@ LedgesM|edgesM LesdTest|esdTest # Cell marinaPadframe;1{lay} -CmarinaPadframe;1{lay}||cmos90|1185513012222|1244204892189|I|ATTR_NCC(D5G127;NT)S["exportsConnectedByParent gnd /gnd_[0-9]+/"] +CmarinaPadframe;1{lay}||cmos90|1185513012222|1244228053093|I|ATTR_NCC(D5G127;NT)S["exportsConnectedByParent gnd /gnd_[0-9]+/"] Ngeneric:Facet-Center|art@0||0|0||||AV NX-Metal-2-Metal-3-Con|contact@0||-20863|-17377|7.2|7.2|| NX-Metal-2-Metal-3-Con|contact@1||-20863|2592|7.2|7.2|| @@ -77,10 +77,6 @@ NMetal-3-Pin|pin@298||25044|12962|||| NMetal-3-Pin|pin@300||-25477.8|24895|||| NMetal-3-Pin|pin@301||-25428.8|23165|||| NMetal-1-Pin|pin@302||-7930.5|-8025|||| -Ngeneric:Universal-Pin|pin@303||0|12474|-1|-1|| -Ngeneric:Universal-Pin|pin@304||18|12528|-1|-1|| -Ngeneric:Universal-Pin|pin@305||0|12510|-1|-1|| -Ngeneric:Universal-Pin|pin@306||54|12528|-1|-1|| Ametal-9|net@0|||S900|pads_sou@3|VDD_2|-25486.8|-25391.6|pads_sou@0|VDD_1|-25486.8|-25408.4 Ametal-9|net@1|||S900|pads_sou@3|VSS_2|-25693.4|-25391.6|pads_sou@0|VSS_1|-25693.4|-25408.4 Ametal-9|net@2|||S900|pads_sou@3|POC18_1|-26127.1|-25391.6|pads_sou@0|POC18|-26127.1|-25408.4 @@ -2288,11 +2284,10 @@ Ametal-3|net@4925|||S2700|pads_sou@3|vdd_10|-25477.8|24648.1|pin@300||-25477.8|2 Ametal-3|net@4926||32.2|S0|filledFr@0|gndM3M|-25326.5|23165|pin@301||-25428.8|23165 Ametal-3|net@4927|||S2700|pads_sou@3|gnd_3|-25428.8|22950.5|pin@301||-25428.8|23165 Ametal-1|net@4928|||S2700|contact@25||-7930.5|-8030|pin@302||-7930.5|-8025 -Ametal-8|net@4929|||S0|esdTopFi@0|gnd_572|0|12474|pin@303||0|12474 -Ametal-9|net@4930|||S0|esdTopFi@0|vdd_58|18|12528|pin@304||18|12528 -Ametal-8|net@4931|||S0|esdTopFi@0|vdd_568|0|12510|pin@305||0|12510 -Ametal-9|net@4932|||S0|pin@306||54|12528|esdTopFi@0|gnd_60|54|12528 Ametal-1|net@7032|||S2700|contact@22||-12106.5|-3709|marinaGu@1|fout|-12106.5|-3704 +Ametal-8|net@7033|||S0|esdTopFi@0|gnd_572|0|12474|filledFr@0|gnd_4368|0|12474 +Ametal-8|net@7034|||S0|esdTopFi@0|vdd_568|0|12510|filledFr@0|vdd_4347|0|12510 +Ametal-1|net@7035|||S900|marinaGu@1|compFreq|-7930.5|-8024|pin@302||-7930.5|-8025 ETCK||D5G127;|pads_sou@3|VDDPST18_1|I ETDI||D5G127;|pads_sou@3|loop_in|I ETDO||D5G127;|pads_sou@3|VSS_33|O -- 1.7.10.4