From 341b4b8e62e590aa1d2bc244f3bbaefbd4dd34a0 Mon Sep 17 00:00:00 2001 From: adam Date: Mon, 10 Nov 2008 07:29:26 +0100 Subject: [PATCH] fix bug relating to zero-width ports --- src/edu/berkeley/fleet/fpga/verilog/Verilog.java | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/edu/berkeley/fleet/fpga/verilog/Verilog.java b/src/edu/berkeley/fleet/fpga/verilog/Verilog.java index 848f80c..39c9035 100644 --- a/src/edu/berkeley/fleet/fpga/verilog/Verilog.java +++ b/src/edu/berkeley/fleet/fpga/verilog/Verilog.java @@ -424,7 +424,7 @@ public class Verilog { return sb.toString(); } public String doReset() { - return (forceNoLatch||latchDriver!=null) + return (forceNoLatch||latchDriver!=null||width==0) ? name+"_r<=0;" : hasLatch ? (name+"_r<=0; "+("/*NORESET*/".equals(resetBehavior) ? "" : (name+"<=0;"))) -- 1.7.10.4