From 74df8bc43d04ee401d093ab728bf2481faf5e293 Mon Sep 17 00:00:00 2001 From: adam Date: Thu, 13 Mar 2008 18:34:17 -0700 Subject: [PATCH] 12-Mar darcs-hash:20080314013417-5007d-1fff946d6b523047ca4b558a28d4d5a7c8f782d4.gz --- am33.tex | 438 +++++++++++++++++++++++++++++++------------------------- dock.svg | 11 +- indock.svg | 339 +++++++++++++++++++++++++++++++++++++++++++ inner-loop.svg | 396 ++++++++++++++++++++++++++++++++++++++++++++++++++ loops.svg | 396 ++++++++++++++++++++++++++++++++++++++++++++++++++ outdock.svg | 335 +++++++++++++++++++++++++++++++++++++++++++ outer-loop.svg | 396 ++++++++++++++++++++++++++++++++++++++++++++++++++ 7 files changed, 2115 insertions(+), 196 deletions(-) create mode 100644 indock.svg create mode 100644 inner-loop.svg create mode 100644 loops.svg create mode 100644 outdock.svg create mode 100644 outer-loop.svg diff --git a/am33.tex b/am33.tex index cc70730..8d02767 100644 --- a/am33.tex +++ b/am33.tex @@ -52,13 +52,15 @@ \begin{abstract} Changes: -\color{red} \begin{tabular}{rl} +\color{red} 12-Mar -& \\ -\end{tabular} \color{black} -\begin{tabular}{rl} +& renamed loop+repeat to outer+inner (not in red) \\ +& renamed {\tt Z} flag to {\tt L} flag (not in red) \\ +& rewrote ``inner and outer loops'' section \\ +& updated all diagrams \\ +\color{black} 7-Mar & Moved address bits to the LSB-side of a 37-bit instruction \\ & Added {\it micro-instruction} and {\it composite instruction} terms \\ @@ -73,8 +75,7 @@ Changes: \begin{center} \epsfig{file=overview,width=1.5in} -\epsfig{file=ports,width=1.5in} -\epsfig{file=best,width=1.5in} +\epsfig{file=indock,width=3in} \end{center} \pagebreak @@ -109,13 +110,17 @@ From a programmer's perspective, a token packet is indistinguishable from a data packet with a unknown payload. \begin{center} -\epsfig{file=overview,width=4in}\\ -{\it Overview of a Fleet processor} +\epsfig{file=overview,width=3in}\\ +\color{red} +{\it Overview of a Fleet processor; gray shading represents a + packet-switched network fabric; blue lines carry data, red lines + carry instructions.} \end{center} +\color{black} \pagebreak -\section{The Ship-Switch Fabric Interface} +\section{The FleetTwo Pump} The diagram below represents a {\it programmer's} conceptual view of the interface between ships and the switch fabric. Actual @@ -124,99 +129,27 @@ destinations that can send and receive only tokens -- not data items -- are drawn as dashed lines. \begin{center} -\epsfig{file=ports,width=4in}\\ -{\it The interface betwen the switch fabric and the ship} +\epsfig{file=indock,width=3.5in}\\ +{\it an ``input'' dock} + +\epsfig{file=outdock,width=3.5in}\\ +{\it an ``output'' dock} \end{center} The term {\it port} refers to an interface to the ship, the {\it dock} connecting it to the switch fabric, and the corresponding sources and destinations on the switch fabric. -Each dock consists of a {\it data latch}, which is as wide as a -single machine word and a {\it pump}, which is a circular fifo of -instruction-width latches. The values in the instruction fifo -control the data latch. +Each dock consists of a {\it data latch}, which is as wide as a single +machine word and a {\it pump}, which is a circular fifo of +instruction-width latches. The values in the pump control the data +latch. Note that the pump in each dock has a destination of its own; this is the {\it instruction destination} mentioned in the previous section. Note that unlike all other destinations, there is no buffering fifo guarding this one. The size of these fifos are exposed to the -software programmer so she can avoid deadlock. - -\pagebreak - -\section{The FleetTwo Pump} - -The diagram below shows the datapath for the FleetTwo pump circuitry. -The square box marked {\tt D} on the output from the {\tt IH} latch is -the instruction decoder, which decodes word-width instructions into a -set of control signals suitable for operating the pump. The boxes -marked {\tt CD} are carry detectors. These detect zero values in the -count and also generate the partial differences used in the decrement -operation. - -\begin{center} -\epsfig{file=best,width=4in}\\ -{\it The pump datapath} -\end{center} - -The latches of primary interest here are: -\begin{itemize} -\item {\tt IH}: Instruction Horn (leaf node; may be shared) -\item {\tt F0}: Fifo Stage 0 (first fifo stage) -\item {\tt OD}: On Deck -\item {\tt F}: Flags, {\tt NF}: Next Flags -\item {\tt P}: Path (the path to use for outbound data/tokens) -\item {\tt D}: Data -\item {\tt DP}: Data Predecessor (ship for output ports, switch fabric for input ports) -\item {\tt DS}: Data Successor (switch fabric for output ports, ship for input ports) -\item {\tt RC}: Repeat Count, {\tt NRC}: Next Repeat Count -\item {\tt LC}: Loop Count, {\tt NLC}: Next Loop Count -\end{itemize} - -Each instruction that executes causes the latches of the pump to fire -in two phases, denoted as the ``left phase'' and the ``right phase''. -In the diagram, the left phase latches are those to the left of the -vertical line down the center, and the right phase latches are to the -right. Therefore each instruction execution requires two GasP -pipeline stages to complete. - -\subsection{Flags} - -The pump has four flags: {\tt A}, {\tt B}, {\tt S}, {\tt Z}. Of -these four, only the first two may be modified directly by -instructions. - -\begin{itemize} -\item The {\tt A} and {\tt B} flags are general-purpose flags which - may be set and cleared by the programmer. - -\item The {\tt S} flag, known as the {\it summary} flag. Its value is - determined by the ship, but unless stated otherwise, it should - be assumed that whenever the 37th bit of the data ({\tt D}) - latch is loaded, that same bit is also loaded into the {\tt S} - flag. This lets the ship make decisions based on whether or not - the top bit of the data latch is set; if two's complement - numbers are in use, this will indicate whether or not the - latched value is negative. - -\item The {\tt Z} flag, known as the {\it zero} flag, is set whenever - the value in the loop counter ({\tt LC}) is zero. This flag can - be used to perform certain operations (such as sending a - completion token) only on the last iteration of a loop. -\end{itemize} - -Many instruction fields are specified as two-bit {\it predicates}. -These fields contain one of four values, indicating if an action -should be taken unconditionally or conditionally on one of the {\tt A} -or {\tt B} flags: - -\begin{itemize} -\item {\tt 00:} if {\tt A} is set -\item {\tt 10:} if {\tt B} is set -\item {\tt 01:} if {\tt Z} is set ({\tt LC=0}) -\item {\tt 11:} always -\end{itemize} +software programmer so \color{red}he\color{black}\ can avoid deadlock. \pagebreak \section{Instructions} @@ -253,7 +186,8 @@ All instruction words have the following format: \begin{bytefield}{37} \bitheader[b]{0,10,11,36}\\ \color{black} - \bitbox{2}{Hold} + \bitbox{1}{A} + \bitbox{1}{OL} \bitbox{2}{P} \color{light} \bitbox[tbr]{22}{} @@ -263,85 +197,163 @@ All instruction words have the following format: Each instruction word is called a {\it micro instruction}. Collections of one or more micro instruction are known as {\it - composite instructions}. The {\tt Hold} field indicates how micro -instructions are gathered together into composite instructions: + composite instructions}. -\begin{itemize} -\item {\tt 00:} {\tt solo} -- this word is not part of a composite instruction -\item {\tt 01:} {\tt soloT} -- like {\tt solo}, but {\tt torpedo}-able -\item {\tt 10:} {\tt body} -- this word is part of a composite instruction, but not the last -\item {\tt 11:} {\tt tail} -- this is the last micro instruction in a composite instruction -\end{itemize} +\color{red} -Solo instructions never reloop (described later); they are -``one-shot'' instructions. Multiple solo instructions may be in the -instruction fifo simultaneously. A {\tt solo} instruction is immune -to {\tt torpedo}s (described later); a {\tt soloT} instruction is -not\footnote{the {\tt soloT} instruction is meant to be used for - ``standing repeating'' instructions}. +The {\tt A} bit stands for {\tt Armor}\footnote{this is to be + pronounced with a Boston accent (``AAHH-mir'')}. +The {\tt OL} bit indicates whether or not this instruction is part of +an outer loop. Both of the preceding bits are explained in the next section. -Composite instructions reloop until the loop counter is zero. When a -composite instruction is in the instruction fifo, no other -instructions may enter the fifo. A {\tt body} instruction is immune -to {\tt torpedo}s; a {\tt tail} instruction is not. \color{black} +\color{black} The abbreviation {\tt P} stands for {\it predicate}; this is a two-bit code that indicates if the instruction should be executed or ignored. -If an instruction is ignored, it might still reloop. + + \pagebreak -\subsection{RePeating and ReLooping} +\subsection{Life Cycle of an Instruction} +\color{red} +The diagram below shows an input dock for purposes of illustration +(behavior at an output dock is identical). -\begin{table}[htp] -\centering -\begin{minipage}{3in} -\centering \begin{center} -\begin{tabular}{|r|c|c|}\hline - & RePeating? & ReLooping? \\\hline -{\tt send} & Y & Y \\\hline -{\tt literal} & N & Y \\\hline -{\tt flags} & N & Y \\\hline -{\tt repeat} & N & Y \\ -{\tt loop} & N & Y -\footnote{note, however, that the decision to reloop or not is based on the value in the loop counter {\it before} execution of the {\tt loop} instruction} -\\ -{\tt takeLoopCounter} & N & Y \\ -{\tt takeRepeatCounter} & N & Y \\ -\hline -{\tt torpedo} \color{black} & n/a & n/a \\ +\epsfig{file=indock,width=3in}\\ +{\it an input dock} +\end{center} -%{\tt clog} & N & N \\ -%{\tt unclog} & n/a & n/a \\ -%{\tt interrupt} & n/a & n/a \\ -%{\tt massacre} & n/a & n/a \\ -\hline -\end{tabular} +Note the circle on the path between ``instr horn'' and ``instr fifo''; +this is known as ``the hatch''. The hatch has two states: sealed and +unsealed. When the machine powers up, the hatch is unsealed; it is +sealed by the {\tt tail} instruction and unsealed as described below. + +When a non-{\tt torpedo} instruction arrives at the instruction horn, +it waits there until the hatch is in the unsealed state. The +instruction then enters the instruction fifo. + +When an instruction emerges from the instruction fifo, it arrives at +the ``on deck'' stage and starts two processes {\it + concurrently}: + +\begin{itemize} +\item +{\bf Process \#1}\\ +If the instruction has the {\tt OL} bit set and the value of {\tt OC} +is nonzero, this process will wait for the hatch to be {\it sealed} +and then enqueue a duplicate copy of the instruction into the instruction fifo. + +\item +{\bf Process \#2}\\ +If the value of {\tt OC} is zero and the instruction at on-deck is +{\it not} an {\tt setOuter} instruction whose {\tt OL} bit is cleared, +this process will unseal the hatch, set the {\it inner} loop counter +to zero, and terminate. + +Otherwise, the instruction will execute one or more times, as +determined by the flags, predicate, and inner loop counter (see +below). If the instruction's {\tt A}rmor bit is not +set\footnote{note: we need to say something about only {\tt send} + instructions being {\tt torpedo}able}, each execution attempt will +be arbitrated against the arrival of a {\tt torpedo} instruction at +the instruction horn. If the {\tt torpedo} wins, the {\it outer} loop +counter is set to zero and this process terminates immediately. +\end{itemize} + +When both processes have completed, the on deck stage is vacated and +another instruction may enter it. + +Note that when a {\tt torpedo} arrives at the instruction horn it will +wait there until on deck is occupied by an instruction whose {\tt + A}rmor bit is {\it not set}, but it does {\it not} wait for the +hatch to be unsealed. + +\color{black} + +\subsection{Inner and Outer Loops} + +\color{red} + +Using the mechanisms described above, a programmer can perform two +types of loops: {\it inner} loops of only one instruction and {\it + outer} loops of multiple instructions. Inner loops may be nested +within an outer loop, but no other nesting of loops is allowed. The +paths used by inner loops and outer loops are shown below: + +\begin{center} +\begin{minipage}{2in} +\begin{center} +\epsfig{file=inner-loop,width=2in}\\ +{\it inner loop (in red)} +\end{center} +\end{minipage} +\begin{minipage}{2in} +\begin{center} +\epsfig{file=outer-loop,width=2in}\\ +{\it outer loop (in red)} \end{center} \end{minipage} -\caption{classification of instructions} -\end{table} +\end{center} + +Each type of loop has a counter associated with it: the {\tt IC} +counter for inner loops and the {\tt OC} counter for outer loops. +The inner loop counter applies only to {\tt send} instructions; all +other instructions ignore the inner loop counter. When a {\tt send} +instruction reaches the on deck position, it will execute at least +once; the number of times it executes after that is determined by the +inner loop counter. -{\bf RePeating}\\ -An instruction will repeat if it is classified as a repeating -instruction and the repeat counter is nonzero. -Non-repeating instructions have no effect on the repeat -counter (except for {\tt repeat}, of course). +The outer loop counter applies to all instructions {\it except} the +instruction {\tt setOuter} with {\tt OL=0}, because such instructions +are needed to reset the outer loop counter after it becomes zero. +However, {\tt setOuter} with {\tt OL} set to {\it one} is useful for +resetting the loop counter in the middle of the execution of a loop. + +\color{black} -{\bf ReLooping}\\ -Solo instructions (both {\tt solo} and {\tt soloT}) -completely ignore the loop counter; it has no effect on them. +\subsection{Flags} + +The pump has four flags: {\tt A}, {\tt B}, {\tt S}, {\tt L}. Of +these four, only the first two may be modified directly by +instructions. -If a {\tt body} or {\tt tail} instruction reaches the on deck stage -and the loop counter ({\tt LC}) is zero, the instruction dies -immediately without executing or relooping. +\begin{itemize} +\item The {\tt A} and {\tt B} flags are general-purpose flags which + may be set and cleared by the programmer. -If a {\tt body} or {\tt tail} instruction reaches the on deck stage -and the loop counter ({\tt LC}) is nonzero, a (duplicate) copy of that -instruction is immediately enqueued at the head of the instruction -fifo; the original instruction then waits at {\tt OD} until either its -execution conditions are met or it is {\tt torpedo}ed. +\item +\color{red} + The {\tt L} flag, known as the {\it last} flag, is set whenever + the value in the outer counter ({\tt OC}) is one, \color{black} + indicating + that the dock is in the midst of the last iteration of an + outer loop. This flag can be used to perform certain + operations (such as sending a completion token) only on the last + iteration of an outer loop. + +\item The {\tt S} flag, known as the {\it summary} flag. Its value is + determined by the ship, but unless stated otherwise, it should + be assumed that whenever the 37th bit of the data ({\tt D}) + latch is loaded, that same bit is also loaded into the {\tt S} + flag. This lets the ship make decisions based on whether or not + the top bit of the data latch is set; if two's complement + numbers are in use, this will indicate whether or not the + latched value is negative. +\end{itemize} + +Many instruction fields are specified as two-bit {\it predicates}. +These fields contain one of four values, indicating if an action +should be taken unconditionally or conditionally on one of the {\tt A} +or {\tt B} flags: + +\begin{itemize} +\item {\tt 00:} if {\tt A} is set +\item {\tt 10:} if {\tt B} is set +\item {\tt 01:} if {\tt L} is set ({\tt OC=1}) +\item {\tt 11:} always +\end{itemize} \pagebreak @@ -352,7 +364,8 @@ execution conditions are met or it is {\tt torpedo}ed. \begin{bytefield}{26} \bitheader[b]{12-16,19,21}\\ \color{light} - \bitbox{2}{Hold} + \bitbox{1}{A} + \bitbox{1}{OL} \bitbox{2}{P} \color{black} \bitbox{3}{001} @@ -423,14 +436,14 @@ execution conditions are met or it is {\tt torpedo}ed. \item {\tt To} - Token Output: fill the token successor. \end{itemize} -The {\tt F0}, {\tt DS}, and {\tt TS} stages must all be empty in order for an -instruction to execute. +The data successor and token successor must both be empty in order for +a {\tt send} instruction to attempt execution. -The repeat counter can hold a number {\tt 0..MAX} or a special value -$\infty$. If the repeat count ({\tt RC}) holds a value other than -$\infty$, it is latched with {\tt max(RC-1, 0)}. If the repeat -counter reaches zero, the instruction ceases executing and either -reloops or retires (see earlier section for details). +The inner loop counter can hold a number {\tt 0..MAX} or a special +value $\infty$. If {\tt IC} is nonzero after execution of a {\tt + send} instruction, the instruction will execute again, and {\tt IC} +will be latched with {\tt (IC==$\infty$?$\infty$:max(IC-1, 0))}. When +the inner loop counter reaches zero, the instruction ceases executing. \pagebreak @@ -445,7 +458,8 @@ These instructions load part or all of the data latch ({\tt D}). \begin{bytefield}{26} \bitheader[b]{0,18,19,21}\\ \color{light} - \bitbox{2}{Hold} + \bitbox{1}{A} + \bitbox{1}{OL} \bitbox{2}{P} \color{black} \bitbox{1}{0} @@ -463,7 +477,8 @@ These instructions load part or all of the data latch ({\tt D}). \begin{bytefield}{26} \bitheader[b]{0,18,19,21}\\ \color{light} - \bitbox{2}{Hold} + \bitbox{1}{A} + \bitbox{1}{OL} \bitbox{2}{P} \color{black} \bitbox{1}{0} @@ -478,7 +493,8 @@ These instructions load part or all of the data latch ({\tt D}). \begin{bytefield}{26} \bitheader[b]{0,18,19,21}\\ \color{light} - \bitbox{2}{Hold} + \bitbox{1}{A} + \bitbox{1}{OL} \bitbox{2}{P} \color{black} \bitbox{1}{1} @@ -506,7 +522,8 @@ sel & D[37:20] & D[19:1] \\\hline \begin{bytefield}{26} \bitheader[b]{0,7,8,15,16-19,21}\\ \color{light} - \bitbox{2}{Hold} + \bitbox{1}{A} + \bitbox{1}{OL} \bitbox{2}{P} \color{black} \bitbox{3}{000} @@ -532,8 +549,8 @@ the new value as the logical {\tt OR} of zero or more inputs: \bitbox{1}{$\overline{\text{\tt B}}$} \bitbox{1}{${\text{\tt S}}$} \bitbox{1}{$\overline{\text{\tt S}}$} - \bitbox{1}{${\text{\tt Z}}$} - \bitbox{1}{$\overline{\text{\tt Z}}$} + \bitbox{1}{${\text{\tt L}}$} + \bitbox{1}{$\overline{\text{\tt L}}$} \end{bytefield}} \end{center} @@ -546,9 +563,9 @@ is zero. Note also that it is possible to produce a {\tt 1} by {\tt \pagebreak -\subsection{{\tt repeat}} +\subsection{{\tt setInner}} -This instruction loads the repeat counter with either a literal +This instruction loads the inner loop counter with either a literal number, the special value $\infty$, or the contents of the {\tt data} register. @@ -557,7 +574,8 @@ register. \begin{bytefield}{26} \bitheader[b]{16-19,21}\\ \color{light} - \bitbox{2}{Hold} + \bitbox{1}{A} + \bitbox{1}{OL} \bitbox{2}{P} \color{black} \bitbox{3}{000} @@ -594,17 +612,19 @@ register. \end{bytefield} -\subsection{{\tt loop}} +\subsection{{\tt setOuter}} -This instruction loads the loop counter {\tt LC} with either {\tt max(0,LC-1)}, a literal or the -contents of the {\tt data} register. +This instruction loads the outer loop counter {\tt OC} with either +{\tt max(0,OC-1)}, a literal or the contents of the {\tt data} +register. \setlength{\bitwidth}{5mm} {\tt \begin{bytefield}{26} \bitheader[b]{16-19,21,24}\\ \color{light} - \bitbox{2}{Hold} + \bitbox{1}{A} + \bitbox{1}{OL} \color{light} \bitbox[tbr]{2}{P} \color{black} @@ -618,7 +638,7 @@ contents of the {\tt data} register. \end{bytefield}}\\ \begin{bytefield}{26} - \bitbox[r]{19}{\raggedleft {\tt max(0,LC-1)}:\hspace{0.2cm}\ } + \bitbox[r]{19}{\raggedleft {\tt max(0,OC-1)}:\hspace{0.2cm}\ } \bitbox{2}{\tt 00} %\color{light} \bitbox[tbr]{5}{} @@ -642,14 +662,15 @@ contents of the {\tt data} register. \end{bytefield} \pagebreak -\subsection{{\tt takeLoopCounter}} +\subsection{{\tt takeOuterLoopCounter}} \setlength{\bitwidth}{5mm} {\tt \begin{bytefield}{26} \bitheader[b]{16-19,21}\\ \color{light} - \bitbox{2}{Hold} + \bitbox{1}{A} + \bitbox{1}{OL} \bitbox{2}{P} \color{black} \bitbox{3}{000} @@ -660,19 +681,19 @@ contents of the {\tt data} register. \color{black} \end{bytefield}} -The {\tt P} field is a predicate; if it does not hold, the instruction -is ignored (but may reloop). This instruction copies the value in the -loop counter {\tt LC} into the least significant bits of the data -latch and leaves all other bits of the data latch unchanged. +This instruction copies the value in the outer loop counter {\tt OC} +into the least significant bits of the data latch and leaves all other +bits of the data latch unchanged. -\subsection{{\tt takeRepeatCounter}} +\subsection{{\tt takeInnerLoopCounter}} \setlength{\bitwidth}{5mm} {\tt \begin{bytefield}{26} \bitheader[b]{16-19,21}\\ \color{light} - \bitbox{2}{Hold} + \bitbox{1}{A} + \bitbox{1}{OL} \bitbox{2}{P} \color{black} \bitbox{3}{???} @@ -683,12 +704,11 @@ latch and leaves all other bits of the data latch unchanged. \color{black} \end{bytefield}} -The {\tt P} field is a predicate; if it does not hold, the instruction -is ignored (but may reloop). This instruction copies the value in the -repeat counter {\tt RC} into the least significant bits of the data -latch and leaves all other bits of the data latch unchanged. +This instruction copies the value in the inner loop counter {\tt IC} +into the least significant bits of the data latch and leaves all other +bits of the data latch unchanged. + -\pagebreak \subsection{{\tt torpedo}} \setlength{\bitwidth}{5mm} @@ -705,10 +725,31 @@ latch and leaves all other bits of the data latch unchanged. \bitbox[tbr]{16}{} \end{bytefield}} -When a {\tt torpedo} instruction reaches {\tt IH}, it will wait there -until an instruction is on deck (at {\tt OD}) and that instruction's -{\tt Hold} field is {\tt tail} or {\tt soloT}. The {\tt torpedo} will then -annihilate the on-deck instruction {\it and set the loop counter to zero}. +\color{red} +When a {\tt torpedo} instruction reaches the instruction horn, it will +wait there until an instruction is on deck whose {\tt A}rmor bit is +not set. The {\tt torpedo} will then cause ``Process \#2'' of the on +deck instruction to terminate and will set the outer loop counter to zero. + +\subsection{{\tt tail}} + +\setlength{\bitwidth}{5mm} +{\tt +\begin{bytefield}{26} + \bitheader[b]{0,5,16-19,21}\\ +\color{light} + \bitbox{4}{} +\color{black} + \bitbox{3}{000} + \bitbox{1}{1} + \bitbox{2}{01} +\color{light} + \bitbox[tbr]{16}{} +\end{bytefield}} + +When a {\tt tail} instruction reaches {\tt IH}, it seals the hatch. +The {\tt tail} instruction does not enter the instruction fifo. + \color{black} @@ -813,10 +854,19 @@ annihilate the on-deck instruction {\it and set the loop counter to zero}. \epsfig{file=overview,height=5in,angle=90} \pagebreak -\epsfig{file=ports,height=5in,angle=90} +\subsection*{Input Dock} +\epsfig{file=indock,width=7in,angle=90} \pagebreak -\epsfig{file=best,height=5in,angle=90} +\subsection*{Output Dock} +\epsfig{file=outdock,width=6.5in,angle=90} + + +%\pagebreak +%\epsfig{file=ports,height=5in,angle=90} + +%\pagebreak +%\epsfig{file=best,height=5in,angle=90} \end{document} diff --git a/dock.svg b/dock.svg index e0cba50..6930a7f 100644 --- a/dock.svg +++ b/dock.svg @@ -13,7 +13,7 @@ id="svg2" sodipodi:version="0.32" inkscape:version="0.45+devel" - sodipodi:docname="drawing.svg" + sodipodi:docname="dock.svg" inkscape:output_extension="org.inkscape.output.svg.inkscape"> @@ -23,6 +23,13 @@ inkscape:vp_y="0 : 1000 : 0" inkscape:vp_z="700 : 600 : 1" inkscape:persp3d-origin="300 : 400 : 1" + id="perspective65" /> + + + + + + + + + + + + + + + + + + + + + + + + + image/svg+xml + + + + + + + + + + + + + + + Path + OnDeck + InstrFifo + + InstrHorn + + + Ship + + + + + + + + Data + + + + + + + + diff --git a/inner-loop.svg b/inner-loop.svg new file mode 100644 index 0000000..0ad9835 --- /dev/null +++ b/inner-loop.svg @@ -0,0 +1,396 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + image/svg+xml + + + + + + + + + + + + + + + + Path + OnDeck + InstrFifo + + InstrHorn + + + Ship + + + + + + + + + + + + Data + + + diff --git a/loops.svg b/loops.svg new file mode 100644 index 0000000..269c99f --- /dev/null +++ b/loops.svg @@ -0,0 +1,396 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + image/svg+xml + + + + + + + + + + + + + + + + Path + OnDeck + InstrFifo + + InstrHorn + + + Ship + + + + + + + + + + + + Data + + + diff --git a/outdock.svg b/outdock.svg new file mode 100644 index 0000000..cacd144 --- /dev/null +++ b/outdock.svg @@ -0,0 +1,335 @@ + + + + + + + + + + + + + + + + + + + + + + + + + image/svg+xml + + + + + + + + + + + + + + + Path + OnDeck + InstrFifo + + InstrHorn + + + Ship + + + + + + + + + + + + Data + + diff --git a/outer-loop.svg b/outer-loop.svg new file mode 100644 index 0000000..a5ec956 --- /dev/null +++ b/outer-loop.svg @@ -0,0 +1,396 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + image/svg+xml + + + + + + + + + + + + + + + + + Path + OnDeck + InstrFifo + + InstrHorn + + Ship + + + + + + + + + + + + Data + + + -- 1.7.10.4