From c7bbd9321867bb10fb425c39e68d504468ff5b4a Mon Sep 17 00:00:00 2001 From: adam Date: Sat, 12 Apr 2008 13:58:44 +0100 Subject: [PATCH] only generate break signal if rx_bit_cnt==9 to avoid mid-transmit resets --- src/edu/berkeley/fleet/fpga/sasc_top.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/edu/berkeley/fleet/fpga/sasc_top.v b/src/edu/berkeley/fleet/fpga/sasc_top.v index 2f5a1ae..a5dfa77 100644 --- a/src/edu/berkeley/fleet/fpga/sasc_top.v +++ b/src/edu/berkeley/fleet/fpga/sasc_top.v @@ -245,7 +245,7 @@ assign break_o = break_r; always @(posedge clk) rx_valid <= #1 (rx_bit_cnt == 4'h9) && (rxd_s == STOP_BIT); always @(posedge clk) - break_r <= #1 /*(rx_bit_cnt == 4'h9) &&*/ (rxr[9:0]==10'b0) && (rxd_dly == 5'b0) && (rxd_s == 0) && (rxd_r == 0); + break_r <= #1 (rx_bit_cnt == 4'h9) && (rxr[9:0]==10'b0) && (rxd_dly == 5'b0) && (rxd_s == 0) && (rxd_r == 0); always @(posedge clk) rx_valid_r <= #1 rx_valid; -- 1.7.10.4