From e791c5a0c7602eb4761e6d2eb38a3602843466f5 Mon Sep 17 00:00:00 2001 From: rkao Date: Wed, 5 Nov 2008 16:07:47 +0000 Subject: [PATCH] got sendToken to work for the first time --- electric/dockPartOD.jelib | 5 +- electric/dockPartsK.jelib | 6 +- electric/loopCountL.jelib | 34 ++++----- electric/marina.jelib | 16 +++-- .../vlsi/chips/marina/test/InstructionStopper.java | 24 +++++-- .../com/sun/vlsi/chips/marina/test/MarinaTest.java | 35 +++++---- testCode/isolatedInDock.spi | 74 +++++++++++--------- testCode/isolatedInDock.xml | 4 +- 8 files changed, 120 insertions(+), 78 deletions(-) diff --git a/electric/dockPartOD.jelib b/electric/dockPartOD.jelib index 7fd3201..46ba05a 100755 --- a/electric/dockPartOD.jelib +++ b/electric/dockPartOD.jelib @@ -1,5 +1,5 @@ # header information: -HdockPartOD|8.08j +HdockPartOD|8.08k # Views: Vicon|ic @@ -3206,7 +3206,7 @@ Evdd_63||D5G2;|scanKx3@0|vdd_1|P X # Cell skipCount;1{sch} -CskipCount;1{sch}||schematic|1222687330473|1224771786020| +CskipCount;1{sch}||schematic|1222687330473|1225830586193| Ngeneric:Facet-Center|art@0||0|0||||AV NOff-Page|conn@0||33|-15|||XYRR| NOff-Page|conn@1||-4.5|5|||XRR| @@ -3277,6 +3277,7 @@ NBus_Pin|pin@72||10|12|-1|-1|| NBus_Pin|pin@73||20|30|-1|-1|| NWire_Pin|pin@75||-33|5|||| NWire_Pin|pin@76||-33|9|||| +Ngeneric:Invisible-Pin|pin@77||-54|15|||||ART_message(D5G1;)Stext IscanK:scanKx3;1{ic}|scanKx3@0||12|24|XY||D5G4; IscanK:scanKx6;1{ic}|scanKx6@0||29|24|XY||D5G4; IscanK:scanKx7;1{ic}|scanKx7@0||50|24|XY||D5G4; diff --git a/electric/dockPartsK.jelib b/electric/dockPartsK.jelib index 0a6fff1..d7d502a 100755 --- a/electric/dockPartsK.jelib +++ b/electric/dockPartsK.jelib @@ -1,5 +1,5 @@ # header information: -HdockPartsK|8.08j +HdockPartsK|8.08k # Views: Vicon|ic @@ -860,7 +860,7 @@ Evdd_57||D5G2;|wellCont@7|vdd_3|P X # Cell moveC;1{sch} -CmoveC;1{sch}||schematic|1210427649196|1225490381826| +CmoveC;1{sch}||schematic|1210427649196|1225838450384| IarbiterK:arbiter2;1{ic}|arbiter2@0||-6|0|Y||D5G4; Ngeneric:Facet-Center|art@0||0|0||||AV NOff-Page|conn@6||-72|42|||Y| @@ -881,7 +881,7 @@ IredFour:inv;1{ic}|inv@50||15.5|60|XRR||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATT IredFour:inv;1{ic}|inv@51||-84|8|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S10|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1 IredFour:inv;1{ic}|inv@52||-84|16|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S10|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1 IlatchesK:mlat1in10i;1{ic}|mlat1in1@0||0|60|XRR||D5G4; -ImoveC;1{ic}|moveC@0||-84|40|||D5G4; +ImoveC;1{ic}|moveC@0||-88|49|||D5G4; IredFour:nand2;1{ic}|nand2@3||-7|13|XRR||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5G1.5;NPX2.5;Y2.5;)S10|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1 IredFour:nand2_sy;1{ic}|nand2_sy@0||30|17|R||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5G1.5;NPX2.5;Y2.5;)S20|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1 IredFour:nand2n;1{ic}|nand2n@1||12|9|||D0G4;|ATTR_Delay(D5G1;NPY-3;)I100|ATTR_X(D5G1.5;NPX2.5;Y2.5;)S10|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1 diff --git a/electric/loopCountL.jelib b/electric/loopCountL.jelib index 132c2dd..9eb8d7b 100755 --- a/electric/loopCountL.jelib +++ b/electric/loopCountL.jelib @@ -1715,7 +1715,7 @@ Eout[TT]|zeroLO|D5G2;|latchZ10@0|out[TT]|O X # Cell ilcOdd;5{sch} -CilcOdd;5{sch}||schematic|1216766649341|1224762065331| +CilcOdd;5{sch}||schematic|1216766649341|1225900427921| Ngeneric:Facet-Center|art@0||0|0||||AV NOff-Page|conn@1||15|12|||XY| NOff-Page|conn@2||-15|12|||XY| @@ -1727,7 +1727,7 @@ NOff-Page|conn@7||38|-30|||XY| NOff-Page|conn@12||-64|-30|||Y| NOff-Page|conn@13||-27.5|24|||XY| NOff-Page|conn@16||-72|-2|||X| -NOff-Page|conn@17||-60|13|||YR| +NOff-Page|conn@17||-61|13|||YR| NOff-Page|conn@18||-66|13.5|||YR| NWire_Con|conn@19||-15|-25|||| NOff-Page|conn@20||-15|-31|||RRR| @@ -1736,7 +1736,7 @@ IredFour:inv;1{ic}|inv@3||13|-30|X||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X( IredFour:inv;1{ic}|inv@4||-36|-30|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S30|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1 IredFour:inv;1{ic}|inv@5||-54|-30|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S30|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1 IredFour:inv;1{ic}|inv@6||29|-30|X||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S30|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1 -IlatchesK:latchZ10;1{ic}|latchZ10@0||-60|0|X||D5G4; +IlatchesK:latchZ10;1{ic}|latchZ10@0||-61|0|X||D5G4; IlatchesK:mlat1in5i;1{ic}|mlat1in5@0||-35|24|X||D5G4; IredFour:nor2n;1{ic}|nor2n@0||-48|13|XRRR||D0G4;|ATTR_Delay(D5G1;NPX3;Y-3;)I100|ATTR_X(D5G1.5;NPX2.25;Y2.25;)S10|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1 Ngeneric:Invisible-Pin|pin@0||-31|45|||||ART_message(D5G6;)SilcOdd @@ -1771,10 +1771,10 @@ NBus_Pin|pin@136||-12|-18|-1|-1|| Ngeneric:Invisible-Pin|pin@137||-79.5|32.5|||||ART_message(D3G2;)S["bit[7] is the zero bit.",zeroLO goes LO,"upon master clear, or","if OLC is set to zero, or","when OLC reaches zero, or",when kill goes HI.] Ngeneric:Invisible-Pin|pin@138||-60|-17|||||ART_message(D3G2;)S["inLO[7] must be HI","if inLO[1:6] is all HI = 0."] Ngeneric:Invisible-Pin|pin@139||43|26|||||ART_message(D3G2;)S[ILC stops,counting,at allZero.] -NBus_Pin|pin@163||-60|-12|-1|-1|| +NBus_Pin|pin@163||-61|-12|-1|-1|| NWire_Pin|pin@175||-66|8.5|||| -NWire_Pin|pin@176||-62|8.5|||| -NWire_Pin|pin@178||-58|8.5|||| +NWire_Pin|pin@176||-63|8.5|||| +NWire_Pin|pin@178||-59|8.5|||| NWire_Pin|pin@179||-48|8.5|||| NWire_Pin|pin@183||-47|24|||| NWire_Pin|pin@184||-49|21|||| @@ -1835,22 +1835,22 @@ Abus|net@280||-0.5|IJ0|pin@67||35|-12|pin@68||5|-12 Abus|net@281||-0.5|IJ0|pin@124||34.5|18|pin@123||4.5|18 Abus|net@282||-0.5|IJ1800|pin@122||-25.5|18|pin@133||-12|18 Abus|net@284||-0.5|IJ1800|pin@69||-25|-12|pin@135||-12|-12 -Abus|net@340||-0.5|IJ900|latchZ10@0|cl[T,F]|-60|-4|pin@163||-60|-12 -Abus|net@351||-0.5|IJ0|pin@69||-25|-12|pin@163||-60|-12 -Awire|net@355|||0|pin@83||-54|0|latchZ10@0|in[1]|-58|0 -Awire|net@364|||2700|latchZ10@0|c[1]|-60|5|conn@17|y|-60|11 +Abus|net@340||-0.5|IJ900|latchZ10@0|cl[T,F]|-61|-4|pin@163||-61|-12 +Abus|net@351||-0.5|IJ0|pin@69||-25|-12|pin@163||-61|-12 +Awire|net@355|||0|pin@83||-54|0|latchZ10@0|in[1]|-59|0 +Awire|net@364|||2700|latchZ10@0|c[1]|-61|5|conn@17|y|-61|11 Awire|net@365|||900|conn@18|y|-66|11.5|pin@175||-66|8.5 -Awire|net@366|||1800|pin@175||-66|8.5|pin@176||-62|8.5 -Awire|net@369|||0|wire90@10|a|-55|8.5|pin@178||-58|8.5 -Awire|net@370|||900|pin@178||-58|8.5|latchZ10@0|c[2]|-58|5 +Awire|net@366|||1800|pin@175||-66|8.5|pin@176||-63|8.5 +Awire|net@369|||0|wire90@10|a|-55|8.5|pin@178||-59|8.5 +Awire|net@370|||900|pin@178||-59|8.5|latchZ10@0|c[2]|-59|5 Awire|net@372|||0|pin@179||-48|8.5|wire90@10|b|-50|8.5 Awire|net@376|||0|mlat1in5@0|out|-37|24|wire90@11|a|-40|24 Awire|net@378|||900|pin@183||-47|24|nor2n@0|ina|-47|15.5 Awire|net@383|||0|conn@13|y|-29.5|24|mlat1in5@0|in|-33|24 Awire|net@384|||2700|pin@179||-48|8.5|nor2n@0|out|-48|10.5 Awire|net@385|||0|wire90@11|b|-45|24|pin@183||-47|24 -Awire|net@392|||1800|conn@16|a|-70|-2|latchZ10@0|out[TT]|-63|-2 -Awire|net@394|||900|pin@176||-62|8.5|latchZ10@0|mc|-62|5 +Awire|net@392|||1800|conn@16|a|-70|-2|latchZ10@0|out[TT]|-64|-2 +Awire|net@394|||900|pin@176||-63|8.5|latchZ10@0|mc|-63|5 Awire|net@396|||0|pwr@0||46|12|ringB@2|do[1]|40|12 Abus|net@397||-0.5|IJ900|conn@19||-15|-25|conn@20|a|-15|-29 Ebit[1]||D6G2;|conn@3|y|O @@ -2302,7 +2302,7 @@ Evdd_29||D5G2;|pinsVddG@10|vdd_1|P X # Cell inMux;2{sch} -CinMux;2{sch}||schematic|1216238895693|1224016580127| +CinMux;2{sch}||schematic|1216238895693|1225902098462| Ngeneric:Facet-Center|art@0||0|0||||AV NOff-Page|conn@0||-5.5|-7.5|||| NOff-Page|conn@1||-6.5|8|||| @@ -2349,7 +2349,7 @@ NWire_Pin|pin@53||-12.5|6|||| IorangeTSMC090nm:wire90;1{ic}|wire90@0||-0.5|15.5|||D0G4;|ATTR_L(D5FLeave alone;G1;PUD)D1400.8999999999996|ATTR_LEWIRE(P)I1|ATTR_layer(D5FLeave alone;G1;NPY-1;)I1|ATTR_width(D5FLeave alone;G1;NPY-2;)I3 IorangeTSMC090nm:wire90;1{ic}|wire90@1||15|15.5|||D0G4;|ATTR_L(D5FLeave alone;G1;PUD)D1400.8999999999996|ATTR_LEWIRE(P)I1|ATTR_layer(D5FLeave alone;G1;NPY-1;)I1|ATTR_width(D5FLeave alone;G1;NPY-2;)I3 IorangeTSMC090nm:wire90;1{ic}|wire90@2||-41.5|6|||D0G4;|ATTR_L(D5FLeave alone;G1;PUD)D1400.8999999999996|ATTR_LEWIRE(P)I1|ATTR_layer(D5FLeave alone;G1;NPY-1;)I1|ATTR_width(D5FLeave alone;G1;NPY-2;)I3 -IorangeTSMC090nm:wire90;1{ic}|wire90@3||-30.5|6|||D0G4;|ATTR_L(D5FLeave alone;G1;PUD)D1400.8999999999996|ATTR_LEWIRE(P)I1|ATTR_layer(D5FLeave alone;G1;NPY-1;)I1|ATTR_width(D5FLeave alone;G1;NPY-2;)I3 +IorangeTSMC090nm:wire90;1{ic}|wire90@3||-30.5|6|||D0G4;|ATTR_L(D5FLeave alone;G1;PUD)S1.4009|ATTR_LEWIRE(P)I1|ATTR_layer(D5FLeave alone;G1;NPY-1;)I1|ATTR_width(D5FLeave alone;G1;NPY-2;)I3 Abus|inA[1:6],xx|D5G2;|-0.5|IJ900|pin@3||-3|6|pin@4||-3|2 Abus|inB[1:6,8]|D5G2;|-0.5|IJ2700|pin@5||-3|-6|pin@6||-3|-2 Abus|net@2||-0.5|IJ1800|pin@4||-3|2|mux[1:6,8]|inA[1]|5|2 diff --git a/electric/marina.jelib b/electric/marina.jelib index b7a52eb..aedb7a9 100644 --- a/electric/marina.jelib +++ b/electric/marina.jelib @@ -169,7 +169,7 @@ EtokOut[1:37,T,38:51,S]||D5G2;|pin@2||O X # Cell inputDock;1{sch} -CinputDock;1{sch}||schematic|1217961575693|1225741057325| +CinputDock;1{sch}||schematic|1217961575693|1225903898315| Ngeneric:Facet-Center|art@0||0|0||||AV NOff-Page|conn@0||7|-19.5|||| NOff-Page|conn@2||21|3.5|||| @@ -179,6 +179,7 @@ NOff-Page|conn@6||22.5|19|||| NOff-Page|conn@7||-36.5|34|||Y| NOff-Page|conn@8||-37|28|||Y| NWire_Con|conn@10||-7|3|||| +NWire_Con|conn@11||-21|-22|||| NGround|gnd@0||-17|3|||| NGround|gnd@2||-7|0|||| IinputDock;1{ic}|inputDoc@1||26.5|40.5|||D5G4; @@ -203,11 +204,12 @@ NWire_Pin|pin@55||-17|11|||| NWire_Pin|pin@56||-17|21|||| NWire_Pin|pin@57||1|25|||| NWire_Pin|pin@58||1|21|||| +NBus_Pin|pin@59||1|13|-1|-1|| IstageGroupsJ:plainStageFour;1{ic}|plainSta@0||-11|-12.5|||D5G4; +NPower|pwr@0||-21|-26|||| IdockPartOD:ringSkipMoveLit;1{ic}|ringSkip@1||-7|23|||D5G4; IscanConverter;1{ic}|scanConv@0||-26|34|||D5G4; -Abus|datIn[1:37,T,38:51]|D5G1;X-1;Y1;|-0.5|IJ0|plainSta@0|ain[1:14,T],in[1:37]|-13|-19.5|pin@6||-21|-19.5 -Awire|datIn[S]|D5G1;Y1;||0|plainSta@0|pred|-13|-10.5|pin@8||-18|-10.5 +Abus|data[1:37,T,38:51]|D5G1;X-1;Y1;|-0.5|IJ0|plainSta@0|ain[1:14,T],in[1:37]|-13|-19.5|pin@6||-21|-19.5 Awire|dock2plain|D5G1;X9;||1800|ringSkip@1|sout|-5|28|pin@49||7|28 Abus|dock2plain,sir[2:9]|D5G1;X-5;Y1;|-0.5|IJ0|plainSta@0|rscanIn[1:9]|-12|-6.5|pin@4||-17|-6.5 Awire|fireL|D5G1;X4;||1800|ringSkip@1|fire[L]|-4|25|pin@57||1|25 @@ -229,7 +231,11 @@ Awire|net@52|||2700|pin@54||-17|9|pin@55||-17|11 Awire|net@53|||1800|pin@55||-17|11|ringSkip@1|loadC[T]|-10|11 Awire|net@54|||2700|pin@55||-17|11|pin@56||-17|21 Awire|net@55|||1800|pin@56||-17|21|ringSkip@1|torp|-10|21 +Awire|net@57|||2700|pwr@0||-21|-26|conn@11||-21|-22 +Abus|net@58||-0.5|IJ900|pin@6||-21|-19.5|conn@11||-21|-22 Abus|sout,unused1[2:9]|D5G1;X2;Y1;|-0.5|IJ1800|plainSta@0|rscanOut[1:9]|-9|-6.5|pin@5||-5|-6.5 +Abus|succ[T,D]|D5G1;Y-1;|-0.5|IJ1800|ringSkip@1|succ[T,D]|-4|13|pin@59||1|13 +Awire|succ[T]|D5G1;Y1;||0|plainSta@0|pred|-13|-10.5|pin@8||-18|-10.5 Abus|tokOut[1:37,T,38:51]|D5G1;X2;Y1;|-0.5|IJ1800|plainSta@0|aout[1:14,T],out[1:37]|-9|-19.5|pin@7||-1|-19.5 Awire|tokOut[S]|D5G1;X1;Y1;||1800|plainSta@0|succ|-9|-10.5|pin@9||-5|-10.5 Ein[1:37,T,38:51,S]|datIn[1:37,T,38:51,S]|D4G2;|conn@5|a|I @@ -242,7 +248,7 @@ EtokOut[1:37,T,38:51,S]||D6G2;|conn@0|y|O X # Cell isolatedInDock;1{sch} -CisolatedInDock;1{sch}||schematic|1220652359667|1225473632830| +CisolatedInDock;1{sch}||schematic|1220652359667|1225831735496| Ngeneric:Facet-Center|art@0||0|0||||AV NOff-Page|conn@0||-35|21|||| NOff-Page|conn@1||-35|18|||| @@ -287,6 +293,8 @@ NBus_Pin|pin@35||-38|-35|-1|-1|| NBus_Pin|pin@36||-35|-48|-1|-1|| NWire_Pin|pin@37||-34|-39|||| NWire_Pin|pin@38||-16|-39|||| +Ngeneric:Invisible-Pin|pin@39||9|-10|||||ART_message(D5G1;)Stext +Ngeneric:Invisible-Pin|pin@40||2|1|||||ART_message(D5G1;)Stext IscanJ:scanCap;1{ic}|scanCap@0||-23|-29|||D5G4; IscanJ:scanCap;1{ic}|scanCap@1||-19|-32|||D5G4; IscanJ:scanCap;1{ic}|scanCap@2||-23|-35|||D5G4; diff --git a/testCode/com/sun/vlsi/chips/marina/test/InstructionStopper.java b/testCode/com/sun/vlsi/chips/marina/test/InstructionStopper.java index 5353dc7..c17b773 100644 --- a/testCode/com/sun/vlsi/chips/marina/test/InstructionStopper.java +++ b/testCode/com/sun/vlsi/chips/marina/test/InstructionStopper.java @@ -1,13 +1,29 @@ package com.sun.vlsi.chips.marina.test; +import java.util.ArrayList; +import java.util.List; + import com.sun.async.test.BitVector; import com.sun.async.test.ChainControl; import com.sun.async.test.ChipModel; +import edu.berkeley.fleet.api.Dock; +import edu.berkeley.fleet.api.Instruction; +import edu.berkeley.fleet.marina.MarinaFleet; + /** InstructionStopper is a scaffold that lets us create a 36 bit propperStopper * by using a 52 bit propperStopper and throwing away the unused bits. */ public class InstructionStopper extends ProperStopper { public static final int INSTR_SZ = 36; + public static final MarinaFleet MARINA = new MarinaFleet(); + public static final Dock DOCK = MARINA.getOnlyInputDock(); + + // Convert a Berkeley BitVector into a Sun BitVector + private BitVector berkToSun(edu.berkeley.fleet.api.BitVector berkBits) { + BitVector sunBits = new BitVector(INSTR_SZ, "instr"); + for(int i=0; i toks = inDock.tokOut.drainMany(); + fatal(toks.size()!=1, "Expected 1 token but got: "+toks.size()); + + prln("Token="+MarinaUtils.formatDataTokAddr(toks.get(0))); adjustIndent(-2); prln("End sendToken"); @@ -388,7 +394,10 @@ public class MarinaTest { prln("OLC="+olc); int ilc = inDock.getILC(); - prln("ILC="+ilc); + int infinity = (ilc>>7) & 1; + int zero = (ilc>>6) & 1; + int count = ilc & 0x3f; + prln("ILC.infinity="+infinity+" ILC.zero="+zero+" ILC.count="+count); boolean a = inDock.getFlagA(); prln("flagA="+a); @@ -405,8 +414,8 @@ public class MarinaTest { for (int i=0; i<7; i++) { int inOlc = 0x20 >> i; prln("inOlc="+inOlc); - inDock.instrIn.fill(MARINA.encodeInstruction(DOCK, new - Instruction.Set(DOCK,Instruction.Set.SetDest.InnerLoopCounter, inOlc))); + inDock.instrIn.fill(new + Instruction.Set(DOCK,false,Predicate.IgnoreOLC,SetDest.OuterLoopCounter, inOlc)); int outOlc = inDock.getOLC(); fatal(outOlc!=inOlc, "walkOneOLC: got="+outOlc+" expected="+inOlc); } diff --git a/testCode/isolatedInDock.spi b/testCode/isolatedInDock.spi index 6d656fa..852658d 100644 --- a/testCode/isolatedInDock.spi +++ b/testCode/isolatedInDock.spi @@ -1,7 +1,7 @@ *** SPICE deck for cell isolatedInDock{sch} from library marina *** Created on Fri Sep 05, 2008 15:05:59 -*** Last revised on Fri Oct 31, 2008 09:20:32 -*** Written on Mon Nov 03, 2008 14:43:36 by Electric VLSI Design System, +*** Last revised on Tue Nov 04, 2008 12:48:55 +*** Written on Wed Nov 05, 2008 08:52:50 by Electric VLSI Design System, *version 8.08k *** Layout tech: cmos90, foundry TSMC *** UC SPICE *** , MIN_RESIST 50.0, MIN_CAPAC 0.04FF @@ -8766,6 +8766,22 @@ Rres@3 net@8 net@11 16.188 Xwire@0 a b wire-C_0_011f-1400_9-R_34_667m .ENDS wire90-1400_9-layer_1-width_3 +*** CELL: orangeTSMC090nm:wire{sch} +.SUBCKT wire-C_0_011f-1_401-R_34_667m a b +Ccap@0 gnd net@14 0.00514f +Ccap@1 gnd net@8 0.00514f +Ccap@2 gnd net@11 0.00514f +Rres@0 net@14 a 8.094m +Rres@1 net@11 net@14 16.188m +Rres@2 b net@8 8.094m +Rres@3 net@8 net@11 16.188m +.ENDS wire-C_0_011f-1_401-R_34_667m + +*** CELL: orangeTSMC090nm:wire90{sch} +.SUBCKT wire90-1_4009-layer_1-width_3 a b +Xwire@0 a b wire-C_0_011f-1_401-R_34_667m +.ENDS wire90-1_4009-layer_1-width_3 + *** CELL: loopCountL:inMux{sch} .SUBCKT inMux inA[1] inA[2] inA[3] inA[4] inA[5] inA[6] inB[1] inB[2] inB[3] +inB[4] inB[5] inB[6] inB[8] out[1] out[2] out[3] out[4] out[5] out[6] out[7] @@ -8785,7 +8801,7 @@ Xnor2n_sy@0 net@18 net@20 out[7] nor2n_sy-X_10 Xwire90@0 net@10 s[F] wire90-1400_9-layer_1-width_3 Xwire90@1 net@12 s[T] wire90-1400_9-layer_1-width_3 Xwire90@2 net@24 net@20 wire90-1400_9-layer_1-width_3 -Xwire90@3 net@18 net@25 wire90-1400_9-layer_1-width_3 +Xwire90@3 net@18 net@25 wire90-1_4009-layer_1-width_3 .ENDS inMux *** CELL: orangeTSMC090nm:wire{sch} @@ -9061,22 +9077,22 @@ Xwire@0 a b wire-C_0_011f-426-R_34_667m .ENDS wire90-426-layer_1-width_3 *** CELL: loopCountL:olc{sch} -.SUBCKT olc bitt[2] bitt[3] bitt[4] bitt[5] bitt[6] doLO[7] gnd inLO[1] +.SUBCKT olc bitt[1] bitt[2] bitt[3] bitt[4] bitt[5] bitt[6] doLO[7] inLO[1] +inLO[2] inLO[3] inLO[4] inLO[5] inLO[6] olc[dec][1] olc[dec][2] olc[load][1] +olc[load][2] Xinv@6 net@270 doLO[7] inv-X_20 -XolcCente@1 gnd bitt[2] bitt[3] bitt[4] bitt[5] bitt[6] do[2] do[3] do[4] +XolcCente@1 bitt[1] bitt[2] bitt[3] bitt[4] bitt[5] bitt[6] do[2] do[3] do[4] +do[5] do[6] net@271 countLogic XolcEven@0 bitt[2] bitt[4] bitt[6] olc[dec][2] do[2] do[4] do[6] inLO[2] +inLO[4] inLO[6] olc[load][2] olcEven -XolcOdd@1 gnd bitt[3] bitt[5] olc[dec][1] do[3] do[5] inLO[1] inLO[3] inLO[5] -+olc[load][1] olcOdd +XolcOdd@1 bitt[1] bitt[3] bitt[5] olc[dec][1] do[3] do[5] inLO[1] inLO[3] ++inLO[5] olc[load][1] olcOdd Xwire90@1 wire90@1_a do[2] wire90-374_2-layer_1-width_3 Xwire90@2 wire90@2_a do[3] wire90-538_8-layer_1-width_3 Xwire90@3 wire90@3_a do[4] wire90-472_8-layer_1-width_3 Xwire90@4 wire90@4_a do[5] wire90-548_8-layer_1-width_3 Xwire90@5 wire90@5_a do[6] wire90-457_8-layer_1-width_3 -Xwire90@7 wire90@7_a gnd wire90-1049_7-layer_1-width_3 +Xwire90@7 wire90@7_a bitt[1] wire90-1049_7-layer_1-width_3 Xwire90@8 wire90@8_a bitt[2] wire90-1049_4-layer_1-width_3 Xwire90@9 wire90@9_a bitt[3] wire90-979_8-layer_1-width_3 Xwire90@10 wire90@10_a bitt[4] wire90-786_3-layer_1-width_3 @@ -10213,13 +10229,13 @@ Xilc@0 net@129[6] net@129[5] net@129[4] net@129[3] net@129[2] net@129[1] XinMux@0 inA[1] inA[2] inA[3] inA[4] inA[5] inA[6] inB[1] inB[2] inB[3] +inB[4] inB[5] inB[6] inB[8] inLO[1] inLO[2] inLO[3] inLO[4] inLO[5] inLO[6] +inLO[7] inLO[8] sel[A] inMux -Xolc@0 net@130[4] net@130[3] net@130[2] net@130[1] net@130[0] net@10 gnd -+inLO[1] inLO[2] inLO[3] inLO[4] inLO[5] inLO[6] olc[dec][1] olc[dec][2] -+olc[load][1] olc[load][2] olc +Xolc@0 net@130[5] net@130[4] net@130[3] net@130[2] net@130[1] net@130[0] ++net@10 inLO[1] inLO[2] inLO[3] inLO[4] inLO[5] inLO[6] olc[dec][1] ++olc[dec][2] olc[load][1] olc[load][2] olc XscanKx3@0 clS[F] clS[T] cl[F] cl[T] flag[C] flag[B] flag[A] mc rd[F] rd[T] +net@104 sout scanKx3 -XscanKx6@0 clS[F] clS[T] cl[F] cl[T] gnd net@130[4] net@130[3] net@130[2] -+net@130[1] net@130[0] mc rd[F] rd[T] net@103 net@104 scanKx6 +XscanKx6@0 clS[F] clS[T] cl[F] cl[T] net@130[5] net@130[4] net@130[3] ++net@130[2] net@130[1] net@130[0] mc rd[F] rd[T] net@103 net@104 scanKx6 XscanKx7@0 clS[F] clS[T] cl[F] cl[T] net@129[6] net@129[5] net@129[4] +net@129[3] net@129[2] net@129[1] net@129[0] mc rd[F] rd[T] sin net@103 +scanKx7 @@ -11100,23 +11116,18 @@ Xinv@7 net@3 mc inv-X_5 +tokOut[40] tokOut[41] tokOut[42] tokOut[43] tokOut[44] tokOut[45] tokOut[46] +tokOut[47] tokOut[48] tokOut[49] tokOut[4] tokOut[50] tokOut[51] tokOut[5] +tokOut[6] tokOut[7] tokOut[8] tokOut[9] tokOut[S] tokOut[T] -XplainSta@0 datIn[46] datIn[47] datIn[48] datIn[49] datIn[50] datIn[T] -+datIn[38] datIn[39] datIn[40] datIn[41] datIn[42] datIn[43] datIn[44] -+datIn[45] datIn[51] tokOut[46] tokOut[47] tokOut[48] tokOut[49] tokOut[50] -+tokOut[T] tokOut[38] tokOut[39] tokOut[40] tokOut[41] tokOut[42] tokOut[43] -+tokOut[44] tokOut[45] tokOut[51] datIn[10] datIn[11] datIn[12] datIn[13] -+datIn[14] datIn[15] datIn[16] datIn[17] datIn[18] datIn[19] datIn[1] -+datIn[20] datIn[21] datIn[22] datIn[23] datIn[24] datIn[25] datIn[26] -+datIn[27] datIn[28] datIn[29] datIn[2] datIn[30] datIn[31] datIn[32] -+datIn[33] datIn[34] datIn[35] datIn[36] datIn[37] datIn[3] datIn[4] datIn[5] -+datIn[6] datIn[7] datIn[8] datIn[9] tokOut[10] tokOut[11] tokOut[12] -+tokOut[13] tokOut[14] tokOut[15] tokOut[16] tokOut[17] tokOut[18] tokOut[19] -+tokOut[1] tokOut[20] tokOut[21] tokOut[22] tokOut[23] tokOut[24] tokOut[25] -+tokOut[26] tokOut[27] tokOut[28] tokOut[29] tokOut[2] tokOut[30] tokOut[31] -+tokOut[32] tokOut[33] tokOut[34] tokOut[35] tokOut[36] tokOut[37] tokOut[3] -+tokOut[4] tokOut[5] tokOut[6] tokOut[7] tokOut[8] tokOut[9] datIn[S] -+dock2plain sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] sir[8] sir[9] sout -+tokOut[S] plainStageFour +XplainSta@0 vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd ++tokOut[46] tokOut[47] tokOut[48] tokOut[49] tokOut[50] tokOut[T] tokOut[38] ++tokOut[39] tokOut[40] tokOut[41] tokOut[42] tokOut[43] tokOut[44] tokOut[45] ++tokOut[51] vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd ++vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd ++vdd vdd tokOut[10] tokOut[11] tokOut[12] tokOut[13] tokOut[14] tokOut[15] ++tokOut[16] tokOut[17] tokOut[18] tokOut[19] tokOut[1] tokOut[20] tokOut[21] ++tokOut[22] tokOut[23] tokOut[24] tokOut[25] tokOut[26] tokOut[27] tokOut[28] ++tokOut[29] tokOut[2] tokOut[30] tokOut[31] tokOut[32] tokOut[33] tokOut[34] ++tokOut[35] tokOut[36] tokOut[37] tokOut[3] tokOut[4] tokOut[5] tokOut[6] ++tokOut[7] tokOut[8] tokOut[9] succ[T] dock2plain sir[2] sir[3] sir[4] sir[5] ++sir[6] sir[7] sir[8] sir[9] sout tokOut[S] plainStageFour XringSkip@1 net@43[3] net@43[4] net@43[5] net@43[6] instr[S] fireL fireM +net@49[5] net@49[4] net@49[3] net@49[2] net@49[1] net@49[0] instr[10] +instr[11] instr[12] instr[13] instr[14] instr[15] instr[16] instr[17] @@ -11125,8 +11136,7 @@ XringSkip@1 net@43[3] net@43[4] net@43[5] net@43[6] instr[S] fireL fireM +instr[30] instr[31] instr[32] instr[33] instr[34] instr[35] instr[36] +instr[3] instr[4] instr[5] instr[6] instr[7] instr[8] instr[9] gnd gnd +net@43[0] ringSkip@1_olcNZ ringSkip@1_pred[D] ringSkip@1_pred[T] net@43[1] -+net@43[2] sin dock2plain ringSkip@1_succ[D] ringSkip@1_succ[T] gnd -+ringSkipMoveLit ++net@43[2] sin dock2plain succ[D] succ[T] gnd ringSkipMoveLit XscanConv@0 net@43[3] net@43[4] net@43[5] net@43[6] net@43[0] sir[2] sir[3] +sir[4] sir[5] sir[6] sir[7] sir[8] sir[9] net@43[1] net@43[2] scanConverter .ENDS inputDock diff --git a/testCode/isolatedInDock.xml b/testCode/isolatedInDock.xml index 54b4de5..40985e7 100644 --- a/testCode/isolatedInDock.xml +++ b/testCode/isolatedInDock.xml @@ -280,7 +280,7 @@ - + @@ -294,7 +294,7 @@ - + -- 1.7.10.4