From eef7b1e4546fb5952155d8a605fb581213e6407f Mon Sep 17 00:00:00 2001 From: adam Date: Sun, 16 Nov 2008 15:23:10 +0100 Subject: [PATCH] better parenthesization in FpgaDock --- src/edu/berkeley/fleet/fpga/FpgaDock.java | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/edu/berkeley/fleet/fpga/FpgaDock.java b/src/edu/berkeley/fleet/fpga/FpgaDock.java index b4f44cc..2fd0b6e 100644 --- a/src/edu/berkeley/fleet/fpga/FpgaDock.java +++ b/src/edu/berkeley/fleet/fpga/FpgaDock.java @@ -218,12 +218,12 @@ public class FpgaDock extends FleetTwoDock implements FabricElement { String data_latch_input = inbox ? data_in.getName() : data_in.getName(); String magic_standing_value = "(1<<"+fpga.SET_ILC_FROM_IMMEDIATE.valmaskwidth+")"; - String done_executing = "(ilc==0 || ilc==1 || !"+fpga.MOVE.verilog(ondeck.getName())+")"; + String done_executing = "((ilc==0) || (ilc==1) || !"+fpga.MOVE.verilog(ondeck.getName())+")"; String predicate_met = "("+ "("+ - "!"+fpga.MOVE.verilog(ondeck.getName())+" || ilc!=0"+ + "!"+fpga.MOVE.verilog(ondeck.getName())+" || (ilc!=0)"+ ") && ("+ "("+ fpga.P_ALWAYS.verilog(ondeck.getName())+ -- 1.7.10.4