From f399db15adce59c2201b86c42826e629c6f68d69 Mon Sep 17 00:00:00 2001 From: Adam Megacz Date: Thu, 28 May 2009 06:16:40 +0000 Subject: [PATCH] changes for kesselsCounter, flip initial state of D-flag in verilog --- .../com/sun/vlsi/chips/marina/test/Marina.java | 40 +++++++++++++------- 1 file changed, 27 insertions(+), 13 deletions(-) diff --git a/testCode/com/sun/vlsi/chips/marina/test/Marina.java b/testCode/com/sun/vlsi/chips/marina/test/Marina.java index 1db7833..e91f8a9 100644 --- a/testCode/com/sun/vlsi/chips/marina/test/Marina.java +++ b/testCode/com/sun/vlsi/chips/marina/test/Marina.java @@ -149,8 +149,10 @@ public class Marina { vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_A__clr_", 1); vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_B__set_", 0); vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_B__clr_", 1); - vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_D__set_", 0); - vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_D__clr_", 1); + + vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_D__set_", 1); + vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_D__clr_", 0); + vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flags@0.aFlag@0.net_50", 0); // A vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flags@0.aFlag@1.net_50", 0); // B vm.setNodeState("outputDo@0.outM1Pre@0.litDandP@0.latch2in@0.hi2inLat@0.latchKee@0.out_B_", 0); // C @@ -160,8 +162,9 @@ public class Marina { vm.setNodeState("northFif@1.upDown8w@2.weakStag@22.ain["+(INDEX_OF_ADDRESS_BIT_COPIED_TO_C_FLAG_WHEN_DC_EQUALS_ZERO+1)+"]", 0); // force the OLC to zero - for(int i=1; i<=6; i++) - vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.olc@0.inLO["+i+"]", (i==1)?0:1); + if (!kesselsCounter) + for(int i=1; i<=6; i++) + vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.olc@0.inLO["+i+"]", (i==1)?0:1); // set the ILC input to 1 for(int i=1; i<=8; i++) { @@ -187,19 +190,24 @@ public class Marina { vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.ilc_load_", 1); vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.ilc_decLO_", 1); vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.ilc_torpLO_", 1); - vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.olc@0.olc_load_", 1); + if (!kesselsCounter) + vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.olc@0.olc_load_", 1); model.waitNS(100); + model.waitNS(1); vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.ilc_load_"); vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.ilc_decLO_"); vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.ilc_torpLO_"); - vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.olc@0.olc_load_"); + if (!kesselsCounter) + vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.olc@0.olc_load_"); vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_A__set_"); vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_A__clr_"); vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_B__set_"); vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_B__clr_"); + vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_D__set_"); vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_D__clr_"); + vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flags@0.aFlag@0.net_50"); vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flags@0.aFlag@1.net_50"); @@ -217,8 +225,10 @@ public class Marina { vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.\\inLO["+i+"] "); } model.waitNS(1000); - for(int i=1; i<=6; i++) - vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.olc@0.inLO["+i+"]"); + + if (!kesselsCounter) + for(int i=1; i<=6; i++) + vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.olc@0.inLO["+i+"]"); // the proper stopper states come up in an undefined ("X") // state, so under Verilog we need to force them to a @@ -260,17 +270,20 @@ public class Marina { //tokOut.resetAfterMasterClear(); instrIn.resetAfterMasterClear(); } + public static boolean kesselsCounter = true; + /** Get the 6 bit outer loop counter. */ public int getOLC() { shiftReport(true, false); BitVector odd = cc.getOutBits(REPORT_CHAIN+"."+OLC_PATH_ODD).bitReverse().not(); BitVector even = cc.getOutBits(REPORT_CHAIN+"."+OLC_PATH_EVEN).bitReverse().not(); - BitVector ret = new BitVector(6, "olc"); + BitVector bv = new BitVector(6, "olc"); for(int i=0; i<3; i++) { - ret.set(i*2, odd.get(i)); - ret.set(i*2+1, even.get(i)); + bv.set(i*2, odd.get(i)); + bv.set(i*2+1, even.get(i)); } - return (int)ret.toLong(); + int ret = (int)bv.toLong(); + return kesselsCounter ? (64-ret) : ret; } /** Get the 7 bit inner loop counter. The MSB is the zero bit. * The low order 6 bits are the count */ @@ -387,7 +400,8 @@ public class Marina { enableInstructionSend(false); enableInstructionRecirculate(true); for(Instruction i : instructions) - instrIn.fill(i); + if (i!=null) + instrIn.fill(i); enableInstructionRecirculate(repeat); enableInstructionSend(true); instrIn.run(); -- 1.7.10.4