X-Git-Url: http://git.megacz.com/?p=coq-hetmet.git;a=blobdiff_plain;f=examples%2FVerilogDemo.hs;fp=examples%2FVerilogDemo.hs;h=9c0b4fd7d9bb089fff8314db5b6d9812c5304c71;hp=0000000000000000000000000000000000000000;hb=ec996e8cb550676d89d187061db7d018af9ec88d;hpb=2f22f2f26622f85e457060de3a5c534004a26e79

diff --git a/examples/VerilogDemo.hs b/examples/VerilogDemo.hs
new file mode 100644
index 0000000..9c0b4fd
--- /dev/null
+++ b/examples/VerilogDemo.hs
@@ -0,0 +1,9 @@
+{-# OPTIONS_GHC -XModalTypes -fflatten -funsafe-skolemize -dcore-lint -XScopedTypeVariables -fsimpleopt-before-flatten -XKindSignatures #-}
+module VerilogDemo (oscillator) where
+
+oscillator :: <[ (w,()) ~~> w ]>@a -> <[ (w,(w,())) ~~> w ]>@a -> <[ (w,()) ~~> w ]>@a
+oscillator reg xor =
+  <[ \input ->
+        let output  = ~~xor input delayed
+            delayed = ~~reg output
+        in output ]>