X-Git-Url: http://git.megacz.com/?p=coq-hetmet.git;a=blobdiff_plain;f=src%2FHaskProof.v;h=55b0b032a6f5655002f2729462d42122aeaf96ab;hp=046e28e7c55d2420ebd45baac72cc35d488c2380;hb=b3214686b18b2d6f6905394494da8d1c17587bdb;hpb=3d4dc42bf3f6e2ad7dc35b14ecb8facdb89e9324 diff --git a/src/HaskProof.v b/src/HaskProof.v index 046e28e..55b0b03 100644 --- a/src/HaskProof.v +++ b/src/HaskProof.v @@ -50,15 +50,14 @@ Definition UJudg2judg {Γ}{Δ}(ej:@UJudg Γ Δ) : Judg := Coercion UJudg2judg : UJudg >-> Judg. (* information needed to define a case branch in a HaskProof *) -Record ProofCaseBranch {tc:TyCon}{Γ}{Δ}{lev}{branchtype : HaskType Γ ★}{avars} := -{ pcb_scb : @StrongAltCon tc -; pcb_freevars : Tree ??(LeveledHaskType Γ ★) -; pcb_judg := sac_Γ pcb_scb Γ > sac_Δ pcb_scb Γ avars (map weakCK' Δ) +Record ProofCaseBranch {tc:TyCon}{Γ}{Δ}{lev}{branchtype : HaskType Γ ★}{avars}{sac:@StrongAltCon tc} := +{ pcb_freevars : Tree ??(LeveledHaskType Γ ★) +; pcb_judg := sac_Γ sac Γ > sac_Δ sac Γ avars (map weakCK' Δ) > (mapOptionTree weakLT' pcb_freevars),,(unleaves (map (fun t => t@@weakL' lev) - (vec2list (sac_types pcb_scb Γ avars)))) + (vec2list (sac_types sac Γ avars)))) |- [weakLT' (branchtype @@ lev)] }. -Coercion pcb_scb : ProofCaseBranch >-> StrongAltCon. +(*Coercion pcb_scb : ProofCaseBranch >-> StrongAltCon.*) Implicit Arguments ProofCaseBranch [ ]. (* Figure 3, production $\vdash_E$, Uniform rules *) @@ -111,11 +110,11 @@ HaskCoercion Γ Δ (σ₁∼∼∼σ₂) -> [Γ > Δ > Σ |- [σ₁∼∼σ₂⇒ σ @@l]] | RLetRec : forall Γ Δ Σ₁ τ₁ τ₂ lev, Rule [Γ > Δ > Σ₁,,(τ₂@@@lev) |- ([τ₁],,τ₂)@@@lev ] [Γ > Δ > Σ₁ |- [τ₁@@lev] ] | RCase : forall Γ Δ lev tc Σ avars tbranches - (alts:Tree ??(@ProofCaseBranch tc Γ Δ lev tbranches avars)), + (alts:Tree ??{ sac : @StrongAltCon tc & @ProofCaseBranch tc Γ Δ lev tbranches avars sac }), Rule - ((mapOptionTree pcb_judg alts),, + ((mapOptionTree (fun x => pcb_judg (projT2 x)) alts),, [Γ > Δ > Σ |- [ caseType tc avars @@ lev ] ]) - [Γ > Δ > (mapOptionTreeAndFlatten pcb_freevars alts),,Σ |- [ tbranches @@ lev ] ] + [Γ > Δ > (mapOptionTreeAndFlatten (fun x => pcb_freevars (projT2 x)) alts),,Σ |- [ tbranches @@ lev ] ] . Coercion RURule : URule >-> Rule.