######################################
## System clock pins
######################################

NET User_Clk PERIOD=100MHz;

NET Clkin_p		LOC = AP21 | IOSTANDARD = LVDS_25;
NET Clkin_m		LOC = AN21 | IOSTANDARD = LVDS_25;

######################################
## SelectMAP interface pins
######################################

NET D_I<0>		LOC = AU9  | IOSTANDARD = LVCMOS25;
NET D_I<1>		LOC = AV9  | IOSTANDARD = LVCMOS25;
NET D_I<2>		LOC = AY9  | IOSTANDARD = LVCMOS25;
NET D_I<3>		LOC = AW9  | IOSTANDARD = LVCMOS25;
NET D_I<4>		LOC = AW34 | IOSTANDARD = LVCMOS25;
NET D_I<5>		LOC = AY34 | IOSTANDARD = LVCMOS25;
NET D_I<6>		LOC = AV34 | IOSTANDARD = LVCMOS25;
NET D_I<7>		LOC = AU34 | IOSTANDARD = LVCMOS25;

NET RDWR_B		LOC = AR34 | IOSTANDARD = LVCMOS25;
NET CS_B		LOC = AT34 | IOSTANDARD = LVCMOS25;
NET INIT_B		LOC = AR9  | IOSTANDARD = LVCMOS25;
NET CCLK                LOC = C14  | IOSTANDARD = LVCMOS25;

NET gpleds<1>                       LOC = AB6   | IOSTANDARD = LVCMOS18 | DRIVE = 24;
NET gpleds<2>                       LOC = AB7   | IOSTANDARD = LVCMOS18 | DRIVE = 24;
NET gpleds<3>                       LOC = AB9   | IOSTANDARD = LVCMOS18 | DRIVE = 24;
NET gpleds<4>                       LOC = AB10  | IOSTANDARD = LVCMOS18 | DRIVE = 24;
NET gpleds<5>                       LOC = AD7   | IOSTANDARD = LVCMOS18 | DRIVE = 24;
NET gpleds<6>                       LOC = AF1   | IOSTANDARD = LVCMOS18 | DRIVE = 24;