From 7eb116f9f80e8d4aeca2a668509060fec18c8aec Mon Sep 17 00:00:00 2001
From: Adam Megacz <adam@megacz.com>
Date: Fri, 11 Sep 2009 22:31:51 -0700
Subject: [PATCH] updates to am33

---
 chips/marina/doc/am33/am33.tex |   21 ++++++++++++---------
 1 file changed, 12 insertions(+), 9 deletions(-)

diff --git a/chips/marina/doc/am33/am33.tex b/chips/marina/doc/am33/am33.tex
index 78c3c5e..cee35ab 100644
--- a/chips/marina/doc/am33/am33.tex
+++ b/chips/marina/doc/am33/am33.tex
@@ -66,7 +66,10 @@ Adam Megacz
 
 \begin{abstract}
 
-This document describes the Docks on the Marina test chip.
+This document describes the instruction format for the docks on the
+Marina test chip, as well as their software-visible behavior.  Two
+subsequent memos will describe the chip's circuit design and
+experimental results.
 
 %Changes:
 %
@@ -659,7 +662,7 @@ counter, outer loop counter, and data latch.
 
 \begin{bytefield}{25}
   \bitheader[b]{0,5,12-18}\\
-  \bitbox[1]{6}{\raggedleft {\tt Immediate}\to{\tt OLC}}
+  \bitbox[1]{5}{\raggedleft {\tt Immediate}\to{\tt OLC}}
   \bitbox[r]{1}{}
   \bitbox{4}{\tt 1000\color{black}}
   \bitbox{3}{\tt 100}
@@ -669,7 +672,7 @@ counter, outer loop counter, and data latch.
 
 \begin{bytefield}{25}
   \bitheader[b]{12-18}\\
-  \bitbox[1]{6}{\raggedleft {\tt Data Latch}\to{\tt OLC}}
+  \bitbox[1]{5}{\raggedleft {\tt Data Latch}\to{\tt OLC}}
   \bitbox[r]{1}{}
   \bitbox{4}{\tt 1000\color{black}}
   \bitbox{3}{\tt 010}
@@ -678,7 +681,7 @@ counter, outer loop counter, and data latch.
 
 \begin{bytefield}{25}
   \bitheader[b]{12-18}\\
-  \bitbox[1]{6}{\raggedleft {\tt OLC-1}\to{\tt OLC}}
+  \bitbox[1]{5}{\raggedleft {\tt OLC-1}\to{\tt OLC}}
   \bitbox[r]{1}{}
   \bitbox{4}{\tt 1000\color{black}}
   \bitbox{3}{\tt 001}
@@ -687,7 +690,7 @@ counter, outer loop counter, and data latch.
 
 \begin{bytefield}{25}
   \bitheader[b]{0,5,6,12-18}\\
-  \bitbox[1]{6}{\raggedleft {\tt Immediate}\to{\tt ILC}}
+  \bitbox[1]{5}{\raggedleft {\tt Immediate}\to{\tt ILC}}
   \bitbox[r]{1}{}
   \bitbox{4}{\tt 0100\color{black}}
   \bitbox{3}{\tt 100}
@@ -698,7 +701,7 @@ counter, outer loop counter, and data latch.
 
 \begin{bytefield}{25}
   \bitheader[b]{6,12-18}\\
-  \bitbox[1]{6}{\raggedleft $\infty$\to{\tt ILC}}
+  \bitbox[1]{5}{\raggedleft $\infty$\to{\tt ILC}}
   \bitbox[r]{1}{}
   \bitbox{4}{\tt 0100\color{black}}
   \bitbox{3}{\tt 100}
@@ -709,7 +712,7 @@ counter, outer loop counter, and data latch.
 
 \begin{bytefield}{25}
   \bitheader[b]{12-18}\\
-  \bitbox[1]{6}{\raggedleft {\tt Data Latch}\to{\tt ILC}}
+  \bitbox[1]{5}{\raggedleft {\tt Data Latch}\to{\tt ILC}}
   \bitbox[r]{1}{}
   \bitbox{4}{\tt 0100\color{black}}
   \bitbox{3}{\tt 010}
@@ -718,7 +721,7 @@ counter, outer loop counter, and data latch.
 
 \begin{bytefield}{25}
   \bitheader[b]{0,13-18}\\
-  \bitbox[1]{6}{\raggedleft \footnotesize {\tt Sign-Extended Immediate}\to{\tt Data Latch}}
+  \bitbox[1]{5}{\raggedleft \footnotesize {\tt Sign-Extended Immediate}\to{\tt Data Latch}}
   \bitbox[r]{1}{}
   \bitbox{4}{\tt 0010\color{black}}
   \bitbox{1}{\begin{minipage}{0.5cm}{
@@ -733,7 +736,7 @@ counter, outer loop counter, and data latch.
 
 \begin{bytefield}{25}
   \bitheader[b]{0,5,6,11,15-18}\\
-  \bitbox[1]{6}{\raggedleft {\tt Update Flags}}
+  \bitbox[1]{5}{\raggedleft {\tt Update Flags}}
   \bitbox[r]{1}{}
   \bitbox{4}{\tt 0001\color{black}}
   \bitbox{3}{}
-- 
1.7.10.4