Split Reg into vreg/hreg and add register pairs

[ghc-hetmet.git] / compiler / nativeGen / RegAlloc / Linear / X86 / FreeRegs.hs

diff --git a/compiler/nativeGen/RegAlloc/Linear/X86/FreeRegs.hs b/compiler/nativeGen/RegAlloc/Linear/X86/FreeRegs.hs
index eedaca8..2b69da0 100644 (file)
--- a/compiler/nativeGen/RegAlloc/Linear/X86/FreeRegs.hs
+++ b/compiler/nativeGen/RegAlloc/Linear/X86/FreeRegs.hs
@@ -28,7 +28,7 @@ getFreeRegs cls f = go f 0
 
   where go 0 _ = []
         go n m 
-         | n .&. 1 /= 0 && regClass (RealReg m) == cls
+         | n .&. 1 /= 0 && regClass (regSingle m) == cls
          = m : (go (n `shiftR` 1) $! (m+1))
 
          | otherwise