Add new LLVM code generator to GHC. (Version 2)

[ghc-hetmet.git] / compiler / nativeGen / SPARC / Regs.hs

diff --git a/compiler/nativeGen/SPARC/Regs.hs b/compiler/nativeGen/SPARC/Regs.hs
index 1c41e88..98151ec 100644 (file)
--- a/compiler/nativeGen/SPARC/Regs.hs
+++ b/compiler/nativeGen/SPARC/Regs.hs
@@ -18,7 +18,6 @@ module SPARC.Regs (
 
        -- allocatable
        allocatableRegs,
-       get_GlobalReg_reg_or_addr,
 
        -- args
        argRegs, 
@@ -38,9 +37,7 @@ import Reg
 import RegClass
 import Size
 
-import Cmm
 import PprCmm          ()
-import CgUtils          ( get_GlobalReg_addr )
 
 import Unique
 import Outputable
@@ -54,7 +51,7 @@ import FastBool
        prepared for any eventuality.
 
        The whole fp-register pairing thing on sparcs is a huge nuisance.  See
-       fptools/ghc/includes/MachRegs.h for a description of what's going on
+       includes/stg/MachRegs.h for a description of what's going on
        here.
 -}
 
@@ -95,22 +92,21 @@ virtualRegSqueeze cls vr
         -> case vr of
                VirtualRegI{}           -> _ILIT(1)
                VirtualRegHi{}          -> _ILIT(1)
-               VirtualRegF{}           -> _ILIT(0)
-               VirtualRegD{}           -> _ILIT(0)
+                _other                  -> _ILIT(0)
 
        RcFloat
         -> case vr of
-               VirtualRegI{}           -> _ILIT(0)
-               VirtualRegHi{}          -> _ILIT(0)
                VirtualRegF{}           -> _ILIT(1)
                VirtualRegD{}           -> _ILIT(2)
+                _other                  -> _ILIT(0)
 
        RcDouble
         -> case vr of
-               VirtualRegI{}           -> _ILIT(0)
-               VirtualRegHi{}          -> _ILIT(0)
                VirtualRegF{}           -> _ILIT(1)
                VirtualRegD{}           -> _ILIT(1)
+                _other                  -> _ILIT(0)
+
+        _other -> _ILIT(0)
 
 {-# INLINE realRegSqueeze #-}
 realRegSqueeze :: RegClass -> RealReg -> FastInt
@@ -141,6 +137,7 @@ realRegSqueeze cls rr
                        
                RealRegPair{}           -> _ILIT(1)
                                        
+        _other -> _ILIT(0)
        
 -- | All the allocatable registers in the machine, 
 --     including register pairs.
@@ -214,21 +211,6 @@ allocatableRegs
      in        filter isFree allRealRegs
 
 
-
--- We map STG registers onto appropriate CmmExprs.  Either they map
--- to real machine registers or stored as offsets from BaseReg.  Given
--- a GlobalReg, get_GlobalReg_reg_or_addr produces either the real
--- register it is in, on this platform, or a CmmExpr denoting the
--- address in the register table holding it.
--- (See also get_GlobalReg_addr in CgUtils.)
-
-get_GlobalReg_reg_or_addr :: GlobalReg -> Either RealReg CmmExpr
-get_GlobalReg_reg_or_addr mid
-   = case globalRegMaybe mid of
-        Just rr -> Left  rr
-        Nothing -> Right (get_GlobalReg_addr mid)
-
-
 -- | The registers to place arguments for function calls, 
 --     for some number of arguments.
 --
@@ -283,18 +265,20 @@ regDotColor reg
  = case classOfRealReg reg of
        RcInteger       -> text "blue"
        RcFloat         -> text "red"
-       RcDouble        -> text "green"
+       _other          -> text "green"
 
 
 
 
 -- Hard coded freeReg / globalRegMaybe -----------------------------------------
 -- This isn't being used at the moment because we're generating
---     these functions from the information in includes/MachRegs.hs via RegPlate.hs
+--     these functions from the information in
+--     includes/stg/MachRegs.hs via RegPlate.hs
        
 -- | Check whether a machine register is free for allocation.
---     This needs to match the info in includes/MachRegs.h otherwise modules
---     compiled with the NCG won't be compatible with via-C ones.
+--     This needs to match the info in includes/stg/MachRegs.h
+--     otherwise modules compiled with the NCG won't be compatible
+--     with via-C ones.
 --
 {-
 freeReg :: RegNo -> FastBool