RTS tidyup sweep, first phase

[ghc-hetmet.git] / compiler / nativeGen / X86 / Regs.hs

diff --git a/compiler/nativeGen/X86/Regs.hs b/compiler/nativeGen/X86/Regs.hs
index 840736f..64d835b 100644 (file)
--- a/compiler/nativeGen/X86/Regs.hs
+++ b/compiler/nativeGen/X86/Regs.hs
@@ -54,7 +54,7 @@ where
 -- HACK: go for the max
 #endif
 
-#include "../includes/MachRegs.h"
+#include "../includes/stg/MachRegs.h"
 
 import Reg
 import RegClass
@@ -65,7 +65,6 @@ import Cmm
 import CLabel           ( CLabel )
 import Pretty
 import Outputable      ( panic )
-import qualified Outputable
 import FastTypes
 import FastBool
 
@@ -108,12 +107,10 @@ virtualRegSqueeze cls vr
                VirtualRegD{}           -> _ILIT(1)
                VirtualRegF{}           -> _ILIT(0)
 
-
-
-#if defined(i386_TARGET_ARCH)
 {-# INLINE realRegSqueeze #-}
 realRegSqueeze :: RegClass -> RealReg -> FastInt
 
+#if defined(i386_TARGET_ARCH)
 realRegSqueeze cls rr
  = case cls of
        RcInteger
@@ -172,7 +169,7 @@ realRegSqueeze cls rr
                RealRegPair{}           -> _ILIT(0)
 
 #else
-realRegSqueeze = _ILIT(0)
+realRegSqueeze _ _     = _ILIT(0)
 #endif