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RTS tidyup sweep, first phase
[ghc-hetmet.git]
/
compiler
/
nativeGen
/
X86
/
Regs.hs
diff --git
a/compiler/nativeGen/X86/Regs.hs
b/compiler/nativeGen/X86/Regs.hs
index
9f62c25
..
64d835b
100644
(file)
--- a/
compiler/nativeGen/X86/Regs.hs
+++ b/
compiler/nativeGen/X86/Regs.hs
@@
-54,7
+54,7
@@
where
-- HACK: go for the max
#endif
-- HACK: go for the max
#endif
-#include "../includes/MachRegs.h"
+#include "../includes/stg/MachRegs.h"
import Reg
import RegClass
import Reg
import RegClass
@@
-65,7
+65,6
@@
import Cmm
import CLabel ( CLabel )
import Pretty
import Outputable ( panic )
import CLabel ( CLabel )
import Pretty
import Outputable ( panic )
-import qualified Outputable
import FastTypes
import FastBool
import FastTypes
import FastBool
@@
-108,10
+107,10
@@
virtualRegSqueeze cls vr
VirtualRegD{} -> _ILIT(1)
VirtualRegF{} -> _ILIT(0)
VirtualRegD{} -> _ILIT(1)
VirtualRegF{} -> _ILIT(0)
+{-# INLINE realRegSqueeze #-}
realRegSqueeze :: RegClass -> RealReg -> FastInt
#if defined(i386_TARGET_ARCH)
realRegSqueeze :: RegClass -> RealReg -> FastInt
#if defined(i386_TARGET_ARCH)
-{-# INLINE realRegSqueeze #-}
realRegSqueeze cls rr
= case cls of
RcInteger
realRegSqueeze cls rr
= case cls of
RcInteger