Implement SSE2 floating-point support in the x86 native code generator (#594)

[ghc-hetmet.git] / docs / users_guide / using.xml

diff --git a/docs/users_guide/using.xml b/docs/users_guide/using.xml
index eb6b0c0..329c31f 100644 (file)
--- a/docs/users_guide/using.xml
+++ b/docs/users_guide/using.xml
@@ -2074,9 +2074,27 @@ f "2"    = 2
     <variablelist>
 
       <varlistentry>
+       <term><option>-msse2</option>:</term>
+       <listitem>
+          <para>
+            (x86 only, added in GHC 6.14.1) Use the SSE2 registers and
+            instruction set to implement floating point operations
+            when using the native code generator.  This gives a
+            substantial performance improvement for floating point,
+            but the resulting compiled code will only run on
+            processors that support SSE2 (Intel Pentium 4 and later,
+            or AMD Athlon 64 and later).
+          </para>
+          <para>
+            SSE2 is unconditionally used on x86-64 platforms.
+          </para>
+        </listitem>
+      </varlistentry>
+
+      <varlistentry>
        <term><option>-monly-[32]-regs</option>:</term>
        <listitem>
-         <para>(iX86 machines)<indexterm><primary>-monly-N-regs
+         <para>(x86 only)<indexterm><primary>-monly-N-regs
           option (iX86 only)</primary></indexterm> GHC tries to
           &ldquo;steal&rdquo; four registers from GCC, for performance
           reasons; it almost always works.  However, when GCC is