= RIReg Reg
| RIImm Imm
-#endif {- alpha_TARGET_ARCH -}
+#endif /* alpha_TARGET_ARCH */
\end{code}
Intel, in their infinite wisdom, selected a stack model for floating
GFREE -> panic "is_G_instr: GFREE (!)"
other -> False
-#endif {- i386_TARGET_ARCH -}
+#endif /* i386_TARGET_ARCH */
\end{code}
\begin{code}
fPair :: Reg -> Reg
fPair (RealReg n) | n >= 32 && n `mod` 2 == 0 = RealReg (n+1)
fPair other = pprPanic "fPair(sparc NCG)" (ppr other)
-#endif {- sparc_TARGET_ARCH -}
+#endif /* sparc_TARGET_ARCH */
\end{code}
\begin{code}
condToSigned GEU = GE
condToSigned LEU = LE
condToSigned x = x
-#endif {- powerpc_TARGET_ARCH -}
+#endif /* powerpc_TARGET_ARCH */
\end{code}