X-Git-Url: http://git.megacz.com/?p=ghc-hetmet.git;a=blobdiff_plain;f=compiler%2FnativeGen%2FAsmCodeGen.lhs;h=a5988fc62bab8bde97543026ab390bb18aababc3;hp=b607434ddff0f4f41fe476d9604ddef788f94f96;hb=8133a9f47b99f4e65ed30551de32ad72c6b61b27;hpb=622c3cfe2b3ebde891981544c0eea525eaa55e6f diff --git a/compiler/nativeGen/AsmCodeGen.lhs b/compiler/nativeGen/AsmCodeGen.lhs index b607434..a5988fc 100644 --- a/compiler/nativeGen/AsmCodeGen.lhs +++ b/compiler/nativeGen/AsmCodeGen.lhs @@ -132,7 +132,7 @@ The machine-dependent bits break down as follows: -- Top-level of the native codegen data NcgImpl instr jumpDest = NcgImpl { - cmmTopCodeGen :: DynFlags -> RawCmmTop -> NatM [NatCmmTop instr], + cmmTopCodeGen :: RawCmmTop -> NatM [NatCmmTop instr], generateJumpTableForInstr :: instr -> Maybe (NatCmmTop instr), getJumpDestBlockId :: jumpDest -> Maybe BlockId, canShortcut :: instr -> Maybe jumpDest, @@ -199,6 +199,8 @@ nativeCodeGen dflags h us cmms } ArchPPC_64 -> panic "nativeCodeGen: No NCG for PPC 64" + ArchUnknown -> + panic "nativeCodeGen: No NCG for unknown arch" nativeCodeGen' :: (Instruction instr, Outputable instr) => DynFlags @@ -422,7 +424,7 @@ cmmNativeGen dflags ncgImpl us cmm count = {-# SCC "RegAlloc" #-} initUs usLive $ liftM unzip - $ mapUs Linear.regAlloc withLiveness + $ mapUs (Linear.regAlloc dflags) withLiveness dumpIfSet_dyn dflags Opt_D_dump_asm_regalloc "Registers allocated" @@ -757,7 +759,7 @@ apply_mapping ncgImpl ufm (CmmProc info lbl (ListGraph blocks)) genMachCode :: DynFlags - -> (DynFlags -> RawCmmTop -> NatM [NatCmmTop instr]) + -> (RawCmmTop -> NatM [NatCmmTop instr]) -> RawCmmTop -> UniqSM ( [NatCmmTop instr] @@ -766,7 +768,7 @@ genMachCode genMachCode dflags cmmTopCodeGen cmm_top = do { initial_us <- getUs ; let initial_st = mkNatM_State initial_us 0 dflags - (new_tops, final_st) = initNat initial_st (cmmTopCodeGen dflags cmm_top) + (new_tops, final_st) = initNat initial_st (cmmTopCodeGen cmm_top) final_delta = natm_delta final_st final_imports = natm_imports final_st ; if final_delta == 0