X-Git-Url: http://git.megacz.com/?p=ghc-hetmet.git;a=blobdiff_plain;f=compiler%2FnativeGen%2FRegAlloc%2FLinear%2FBase.hs;h=26262327c9f302093a887c28492956221bae1565;hp=a986c0ff32ec047102265c1305cbd36a0e193653;hb=f9288086f935c97812b2d80defcff38baf7b6a6c;hpb=a842f3d5e7c9026a642589948ef67dbaf6272396

diff --git a/compiler/nativeGen/RegAlloc/Linear/Base.hs b/compiler/nativeGen/RegAlloc/Linear/Base.hs
index a986c0f..2626232 100644
--- a/compiler/nativeGen/RegAlloc/Linear/Base.hs
+++ b/compiler/nativeGen/RegAlloc/Linear/Base.hs
@@ -20,9 +20,8 @@ where
 
 import RegAlloc.Linear.FreeRegs
 import RegAlloc.Linear.StackMap
-
-import RegLiveness
-import MachRegs
+import RegAlloc.Liveness
+import Reg
 
 import Outputable
 import Unique
@@ -52,14 +51,14 @@ type BlockAssignment
 --
 data Loc 
 	-- | vreg is in a register
-	= InReg   {-# UNPACK #-} !RegNo
+	= InReg   {-# UNPACK #-}  !RealReg
 
 	-- | vreg is held in a stack slot
-	| InMem   {-# UNPACK #-} !StackSlot
+	| InMem   {-# UNPACK #-}  !StackSlot
 
 
 	-- | vreg is held in both a register and a stack slot
-	| InBoth  {-# UNPACK #-}  !RegNo
+	| InBoth  {-# UNPACK #-}  !RealReg
 		   {-# UNPACK #-} !StackSlot
 	deriving (Eq, Show, Ord)
 
@@ -68,7 +67,7 @@ instance Outputable Loc where
 
 
 -- | Get the reg numbers stored in this Loc.
-regsOfLoc :: Loc -> [RegNo]
+regsOfLoc :: Loc -> [RealReg]
 regsOfLoc (InReg r)    = [r]
 regsOfLoc (InBoth r _) = [r]
 regsOfLoc (InMem _)    = []
@@ -105,9 +104,10 @@ data RegAllocStats
 data RA_State 
 	= RA_State 
 
+	{ 
 	-- | the current mapping from basic blocks to 
 	-- 	the register assignments at the beginning of that block.
-	{ ra_blockassig	:: BlockAssignment
+	  ra_blockassig	:: BlockAssignment
 	
 	-- | free machine registers
 	, ra_freeregs   :: {-#UNPACK#-}!FreeRegs