SRC_CC_OPTS += -I. -I../rts
+ifneq "$(GhcWithSMP)" "YES"
+SRC_CC_OPTS += -DNOSMP
+endif
+
#
# Header file built from the configure script's findings
#
/* No such thing as a MainCapability under THREADED_RTS - each thread must have
* its own Capability.
*/
-#if IN_STG_CODE && !defined(THREADED_RTS)
+#if IN_STG_CODE && !(defined(THREADED_RTS) && !defined(NOSMP))
extern W_ MainCapability[];
#endif
GLOBAL_REG_DECL(StgRegTable *,BaseReg,REG_Base)
#define ASSIGN_BaseReg(e) (BaseReg = (e))
#else
-#ifdef THREADED_RTS
+#if defined(THREADED_RTS) && !defined(NOSMP)
#error BaseReg must be in a register for THREADED_RTS
#endif
#define BaseReg (&((struct PartCapability_ *)MainCapability)->r)
:"=r" (result)
:"r" (w), "r" (p)
);
+#elif !defined(WITHSMP)
+ result = *p;
+ *p = w;
#else
#error xchg() unimplemented on this architecture
#endif
:"cc", "memory"
);
return result;
+#elif !defined(WITHSMP)
+ StgWord result;
+ result = *p;
+ if (result == o) {
+ *p = n;
+ }
+ return result;
#else
#error cas() unimplemented on this architecture
#endif
__asm__ __volatile__ ("" : : : "memory");
#elif powerpc_HOST_ARCH
__asm__ __volatile__ ("lwsync" : : : "memory");
+#elif !defined(WITHSMP)
+ return;
#else
#error memory barriers unimplemented on this architecture
#endif
INLINE_HEADER StgInfoTable *
lockClosure(StgClosure *p)
{
-#if i386_HOST_ARCH || x86_64_HOST_ARCH || powerpc_HOST_ARCH
StgWord info;
do {
nat i = 0;
} while (++i < SPIN_COUNT);
yieldThread();
} while (1);
-#else
- ACQUIRE_SM_LOCK
-#endif
}
INLINE_HEADER void
unlockClosure(StgClosure *p, StgInfoTable *info)
{
-#if i386_HOST_ARCH || x86_64_HOST_ARCH || powerpc_HOST_ARCH
// This is a strictly ordered write, so we need a wb():
write_barrier();
p->header.info = info;
-#else
- RELEASE_SM_LOCK;
-#endif
}
#else /* !THREADED_RTS */
HaveLibDL = @HaveLibDL@
+ArchSupportsSMP=$(strip $(patsubst $(HostArch_CPP), YES, $(findstring $(HostArch_CPP), i386 x86_64)))
+
+ifeq "$(ArchSupportsSMP)" "YES"
+GhcWithSMP=YES
+else
+GhcWithSMP=NO
+endif
+
# Whether to include GHCi in the compiler. Depends on whether the RTS linker
# has support for this OS/ARCH combination.
SRC_CC_OPTS += $(GhcRtsCcOpts)
SRC_HC_OPTS += $(GhcRtsHcOpts)
+ifneq "$(GhcWithSMP)" "YES"
+SRC_CC_OPTS += -DNOSMP
+SRC_HC_OPTS += -optc-DNOSMP
+endif
+
ifneq "$(DLLized)" "YES"
SRC_HC_OPTS += -static
endif
" -Dz DEBUG: stack squezing",
"",
#endif /* DEBUG */
-#if defined(THREADED_RTS)
+#if defined(THREADED_RTS) && !defined(NOSMP)
" -N<n> Use <n> OS threads (default: 1)",
" -qm Don't automatically migrate threads between CPUs",
" -qw Migrate a thread to the current CPU when it is woken up",
}
break;
-#ifdef THREADED_RTS
+#if defined(THREADED_RTS) && !defined(NOSMP)
case 'N':
THREADED_BUILD_ONLY(
if (rts_argv[arg][2] != '\0') {
StgRegTable * StgRun(StgFunPtr f, StgRegTable *basereg STG_UNUSED)
{
while (f) {
+ /* XXX Disabled due to RtsFlags[]/RtsFlags mismatch
IF_DEBUG(interpreter,
debugBelch("Jumping to ");
printPtr((P_)f); fflush(stdout);
debugBelch("\n");
);
+ */
f = (StgFunPtr) (f)();
}
return (StgRegTable *)R1.p;