From: Ben.Lippmeier@anu.edu.au <unknown>
Date: Tue, 3 Feb 2009 06:24:33 +0000 (+0000)
Subject: SPARC NCG: Give regs o0-o5 back to the allocator
X-Git-Tag: 2009-03-13~131
X-Git-Url: http://git.megacz.com/?p=ghc-hetmet.git;a=commitdiff_plain;h=71b016caf68eb14fbd9319ebb7a4356b71ec9e82

SPARC NCG: Give regs o0-o5 back to the allocator
---

diff --git a/compiler/nativeGen/RegAlloc/Linear/SPARC/FreeRegs.hs b/compiler/nativeGen/RegAlloc/Linear/SPARC/FreeRegs.hs
index d284a45..e46d87d 100644
--- a/compiler/nativeGen/RegAlloc/Linear/SPARC/FreeRegs.hs
+++ b/compiler/nativeGen/RegAlloc/Linear/SPARC/FreeRegs.hs
@@ -120,15 +120,53 @@ releaseReg :: RegNo -> FreeRegs -> FreeRegs
 releaseReg r regs@(FreeRegs g f d)
 
 	-- used by STG machine, or otherwise unavailable
-	| r >= 0  && r <= 15	= regs
---	| r >= 3  && r <= 15	= regs
-
-	| r >= 17 && r <= 21	= regs
+	--	see includes/MachRegs.h for more info
+
+	-- Global Regs g0-g7
+	--         r0: always zero
+	--      r1-r4: allocable
+	--      r5-r7: reserved for OS
+	| r == 0 		= regs
+	| r >= 5 && r <= 7	= regs
+	
+	-- Output Regs o0-o7
+	--   caller saves
+	--   r8 - r13: allocable
+	--        r14: C stack ptr
+	--        r15: C ret addr
+	| r >= 14 && r <= 15	= regs
+	
+	-- Local Regs 
+	--        r16: allocable
+	--  r17 - r21: R1-R5
+	--  r22 - r23: allocable
+	| r >= 17 && r <= 21	= regs		
+
+	-- Input Regs
+	--  r24 - r29: Sp, Base, SpLim, Hp, HpLim, R6
+	--        r30: C frame ptr
+	--        r31: C ret addr
 	| r >= 24 && r <= 31	= regs
+	
+	-- Float regs
+	--  r32 & r33: floating point return from C fun
+	--  r34 & r35: D1
+	--  r36 & r37: D2
+	--  r38 & r39: NCG spill tmp
+	--  r40 & r41: NCG spill tmp
 	| r >= 32 && r <= 41	= regs
+
+	--  r42 - r53: allocatable as double prec float regs
+
+	--  r54 - r57: F1-F4
+	--  r58 - r59: NCG spill tmps
 	| r >= 54 && r <= 59	= regs
 
+	--  r60-r64: allocatable as single prec float regs.
+
+
 	-- never release the high part of double regs.
+	--	this prevents them from being allocated as single precison regs.
 	| r == 43		= regs
 	| r == 45		= regs
 	| r == 47		= regs
diff --git a/includes/MachRegs.h b/includes/MachRegs.h
index 6543bb8..adc132b 100644
--- a/includes/MachRegs.h
+++ b/includes/MachRegs.h
@@ -559,17 +559,49 @@
    output registers visible in one register window.  The 8 %g (global)
    registers are visible all the time.
    
-   %o0..%o7 	       	not available; can be zapped by callee
-   			  (%o6 is C-stack ptr; %o7 hold ret addrs)
-   %i0..%i7            	available (except %i6 is used as frame ptr)
-   			  (and %i7 tends to have ret-addr-ish things)
-   %l0..%l7	       	available
-   %g0..%g4 		not available; prone to stomping by division, etc.
-   %g5..%g7 		not available; reserved for the OS
-
-   Note: %g3 is *definitely* clobbered in the builtin divide code (and
-   our save/restore machinery is NOT GOOD ENOUGH for that); discretion
-   being the better part of valor, we also don't take %g4.
+      zero: always zero
+   scratch: volatile across C-fn calls. used by linker.
+       app: usable by application
+    system: reserved for system
+ 
+     alloc: allocated to in the register allocator, intra-closure only
+   
+                GHC usage     v8 ABI        v9 ABI
+   Global
+     %g0	zero        zero          zero
+     %g1	alloc       scratch       scrach
+     %g2	alloc       app           app
+     %g3	alloc       app           app
+     %g4	alloc       app           scratch
+     %g5                    system        scratch    
+     %g6                    system        system
+     %g7                    system        system
+
+   Output: can be zapped by callee
+     %o0-o5	alloc       caller saves
+     %o6                    C stack ptr
+     %o7                    C ret addr
+   
+   Local: maintained by register windowing mechanism
+     %l0	alloc        
+     %l1	R1
+     %l2	R2
+     %l3	R3
+     %l4	R4
+     %l5	R5
+     %l6	alloc
+     %l7	alloc
+
+   Input
+     %i0	Sp
+     %i1        Base
+     %i2        SpLim
+     %i3        Hp
+     %i4        HpLim
+     %i5        R6
+     %i6                    C frame ptr
+     %i7                    C ret addr
+     
 
    The paired nature of the floating point registers causes complications for
    the native code generator.  For convenience, we pretend that the first 22
@@ -638,12 +670,14 @@
 
 #define REG_Base	i1
 
+/*
 #define NCG_SpillTmp_I1	g1
 #define NCG_SpillTmp_I2	g2
 #define NCG_SpillTmp_F1	f26
 #define NCG_SpillTmp_F2 f27
 #define NCG_SpillTmp_D1	f6
 #define NCG_SpillTmp_D2	f8
+*/
 
 #define NCG_FirstFloatReg f22